From: Priit Laes <plaes@plaes.org>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-sunxi@googlegroups.com
Cc: Priit Laes <plaes@plaes.org>
Subject: [PATCH 2/4] clk: sunxi-ng: a20: export a regmap to access the GMAC register
Date: Sat, 18 Apr 2020 01:17:28 +0300 [thread overview]
Message-ID: <20200417221730.555954-3-plaes@plaes.org> (raw)
In-Reply-To: <20200417221730.555954-1-plaes@plaes.org>
Only GMAC register is allowed to be written, read access to registers
is not restricted.
Export a regmap of the CCU.
Signed-off-by: Priit Laes <plaes@plaes.org>
---
drivers/clk/sunxi-ng/ccu-sun4i-a10.c | 31 ++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
index 839e9d5a1cff..cba51c2c7eba 100644
--- a/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
+++ b/drivers/clk/sunxi-ng/ccu-sun4i-a10.c
@@ -1426,6 +1426,30 @@ static const struct sunxi_ccu_desc sun7i_a20_ccu_desc = {
.num_resets = ARRAY_SIZE(sunxi_a10_a20_ccu_resets),
};
+/*
+ * Add regmap for the GMAC driver (dwmac-sun8i) to allow access to
+ * GMAC configuration register.
+ */
+
+#define SUN7I_A20_GMAC_CFG_REG 0x164
+static bool sun7i_a20_ccu_regmap_accessible_reg(struct device *dev,
+ unsigned int reg)
+{
+ if (reg == SUN7I_A20_GMAC_CFG_REG)
+ return true;
+ return false;
+}
+
+static struct regmap_config sun7i_a20_ccu_regmap_config = {
+ .reg_bits = 32,
+ .val_bits = 32,
+ .reg_stride = 4,
+ .max_register = 0x1f4, /* clk_out_b */
+
+ .readable_reg = sun7i_a20_ccu_regmap_accessible_reg,
+ .writeable_reg = sun7i_a20_ccu_regmap_accessible_reg,
+};
+
static void bootstrap_clocks(void __iomem *reg)
{
u32 val;
@@ -1474,6 +1498,7 @@ static int sun4i_a10_ccu_probe(struct platform_device *pdev)
static int sun7i_a20_ccu_probe(struct platform_device *pdev)
{
+ struct regmap *regmap;
struct resource *res;
void __iomem *reg;
@@ -1484,6 +1509,12 @@ static int sun7i_a20_ccu_probe(struct platform_device *pdev)
bootstrap_clocks(reg);
+ regmap = devm_regmap_init_mmio(&pdev->dev, reg,
+ &sun7i_a20_ccu_regmap_config);
+ if (IS_ERR(regmap))
+ return PTR_ERR(regmap);
+
+
return sunxi_ccu_probe(pdev->dev.of_node, reg, &sun7i_a20_ccu_desc);
}
--
2.25.2
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next prev parent reply other threads:[~2020-04-17 22:23 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-17 22:17 [PATCH 0/4] ARM: sun7i: Convert A20 GMAC driver to CCU Priit Laes
2020-04-17 22:17 ` [PATCH 1/4] clk: sunxi-ng: a10/a20: rewrite init code to a platform driver Priit Laes
2020-04-20 12:49 ` Maxime Ripard
2020-04-20 20:32 ` Priit Laes
2020-04-29 14:35 ` Maxime Ripard
2020-04-30 6:21 ` Priit Laes
2020-04-30 15:05 ` Maxime Ripard
2020-04-17 22:17 ` Priit Laes [this message]
2020-04-20 12:50 ` [PATCH 2/4] clk: sunxi-ng: a20: export a regmap to access the GMAC register Maxime Ripard
2020-04-17 22:17 ` [PATCH 3/4] net: stmmac: dwmac-sunxi: Implement syscon-based clock handling Priit Laes
2020-04-20 12:58 ` Maxime Ripard
2020-04-17 22:17 ` [PATCH 4/4] ARM: dts: sun7i: Use syscon-based implementation for gmac Priit Laes
2020-04-20 12:59 ` Maxime Ripard
2020-04-20 13:23 ` Priit Laes
2020-04-20 12:32 ` [PATCH 0/4] ARM: sun7i: Convert A20 GMAC driver to CCU Priit Laes
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