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From: Priit Laes <plaes@plaes.org>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-sunxi@googlegroups.com
Cc: Priit Laes <plaes@plaes.org>
Subject: [PATCH 4/4] ARM: dts: sun7i: Use syscon-based implementation for gmac
Date: Sat, 18 Apr 2020 01:17:30 +0300	[thread overview]
Message-ID: <20200417221730.555954-5-plaes@plaes.org> (raw)
In-Reply-To: <20200417221730.555954-1-plaes@plaes.org>

Use syscon-based approach to access gmac clock configuration
register, instead of relying on a custom clock driver.

As a bonus, we can now drop the custom clock implementation
and dummy clocks making sun7i fully CCU-compatible.

Signed-off-by: Priit Laes <plaes@plaes.org>
---
 arch/arm/boot/dts/sun7i-a20.dtsi | 36 +++-----------------------------
 1 file changed, 3 insertions(+), 33 deletions(-)

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index ffe1d10a1a84..750962a94fad 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -219,37 +219,6 @@ osc32k: clk-32k {
 			clock-frequency = <32768>;
 			clock-output-names = "osc32k";
 		};
-
-		/*
-		 * The following two are dummy clocks, placeholders
-		 * used in the gmac_tx clock. The gmac driver will
-		 * choose one parent depending on the PHY interface
-		 * mode, using clk_set_rate auto-reparenting.
-		 *
-		 * The actual TX clock rate is not controlled by the
-		 * gmac_tx clock.
-		 */
-		mii_phy_tx_clk: clk-mii-phy-tx {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <25000000>;
-			clock-output-names = "mii_phy_tx";
-		};
-
-		gmac_int_tx_clk: clk-gmac-int-tx {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <125000000>;
-			clock-output-names = "gmac_int_tx";
-		};
-
-		gmac_tx_clk: clk@1c20164 {
-			#clock-cells = <0>;
-			compatible = "allwinner,sun7i-a20-gmac-clk";
-			reg = <0x01c20164 0x4>;
-			clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
-			clock-output-names = "gmac_tx";
-		};
 	};
 
 
@@ -1511,11 +1480,12 @@ mali: gpu@1c40000 {
 
 		gmac: ethernet@1c50000 {
 			compatible = "allwinner,sun7i-a20-gmac";
+			syscon = <&ccu>;
 			reg = <0x01c50000 0x10000>;
 			interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
-			clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
-			clock-names = "stmmaceth", "allwinner_gmac_tx";
+			clocks = <&ccu CLK_AHB_GMAC>;
+			clock-names = "stmmaceth";
 			snps,pbl = <2>;
 			snps,fixed-burst;
 			snps,force_sf_dma_mode;
-- 
2.25.2


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  parent reply	other threads:[~2020-04-17 22:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 22:17 [PATCH 0/4] ARM: sun7i: Convert A20 GMAC driver to CCU Priit Laes
2020-04-17 22:17 ` [PATCH 1/4] clk: sunxi-ng: a10/a20: rewrite init code to a platform driver Priit Laes
2020-04-20 12:49   ` Maxime Ripard
2020-04-20 20:32     ` Priit Laes
2020-04-29 14:35       ` Maxime Ripard
2020-04-30  6:21         ` Priit Laes
2020-04-30 15:05           ` Maxime Ripard
2020-04-17 22:17 ` [PATCH 2/4] clk: sunxi-ng: a20: export a regmap to access the GMAC register Priit Laes
2020-04-20 12:50   ` Maxime Ripard
2020-04-17 22:17 ` [PATCH 3/4] net: stmmac: dwmac-sunxi: Implement syscon-based clock handling Priit Laes
2020-04-20 12:58   ` Maxime Ripard
2020-04-17 22:17 ` Priit Laes [this message]
2020-04-20 12:59   ` [PATCH 4/4] ARM: dts: sun7i: Use syscon-based implementation for gmac Maxime Ripard
2020-04-20 13:23     ` Priit Laes
2020-04-20 12:32 ` [PATCH 0/4] ARM: sun7i: Convert A20 GMAC driver to CCU Priit Laes

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