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* [PATCH 1/2] arm64: dts: allwinner: h6: add voltage range to OPP table
@ 2020-05-08 19:10 Clément Péron
  2020-05-08 19:10 ` [PATCH 2/2] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6 Clément Péron
  0 siblings, 1 reply; 3+ messages in thread
From: Clément Péron @ 2020-05-08 19:10 UTC (permalink / raw)
  To: Maxime Ripard, Chen-Yu Tsai, Rob Herring
  Cc: Ondřej Jirman, devicetree, linux-kernel, linux-sunxi,
	Clément Péron, linux-arm-kernel

Some boards have a fixed regulator and can't reach the voltage set
by the OPP table.

Add a range where the minimal voltage is the target and the maximal
voltage is 1.2V.

Suggested-by: Ondřej Jirman <megous@megous.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 60 +++++++++----------
 1 file changed, 30 insertions(+), 30 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
index dcb789519797..1a5eddc5a40f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
@@ -12,90 +12,90 @@
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <480000000>;
 
-			opp-microvolt-speed0 = <880000>;
-			opp-microvolt-speed1 = <820000>;
-			opp-microvolt-speed2 = <820000>;
+			opp-microvolt-speed0 = <880000 880000 1200000>;
+			opp-microvolt-speed1 = <820000 820000 1200000>;
+			opp-microvolt-speed2 = <820000 820000 1200000>;
 		};
 
 		opp@720000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <720000000>;
 
-			opp-microvolt-speed0 = <880000>;
-			opp-microvolt-speed1 = <820000>;
-			opp-microvolt-speed2 = <820000>;
+			opp-microvolt-speed0 = <880000 880000 1200000>;
+			opp-microvolt-speed1 = <820000 820000 1200000>;
+			opp-microvolt-speed2 = <820000 820000 1200000>;
 		};
 
 		opp@816000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <816000000>;
 
-			opp-microvolt-speed0 = <880000>;
-			opp-microvolt-speed1 = <820000>;
-			opp-microvolt-speed2 = <820000>;
+			opp-microvolt-speed0 = <880000 880000 1200000>;
+			opp-microvolt-speed1 = <820000 820000 1200000>;
+			opp-microvolt-speed2 = <820000 820000 1200000>;
 		};
 
 		opp@888000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <888000000>;
 
-			opp-microvolt-speed0 = <880000>;
-			opp-microvolt-speed1 = <820000>;
-			opp-microvolt-speed2 = <820000>;
+			opp-microvolt-speed0 = <880000 880000 1200000>;
+			opp-microvolt-speed1 = <820000 820000 1200000>;
+			opp-microvolt-speed2 = <820000 820000 1200000>;
 		};
 
 		opp@1080000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1080000000>;
 
-			opp-microvolt-speed0 = <940000>;
-			opp-microvolt-speed1 = <880000>;
-			opp-microvolt-speed2 = <880000>;
+			opp-microvolt-speed0 = <940000 940000 1200000>;
+			opp-microvolt-speed1 = <880000 880000 1200000>;
+			opp-microvolt-speed2 = <880000 880000 1200000>;
 		};
 
 		opp@1320000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1320000000>;
 
-			opp-microvolt-speed0 = <1000000>;
-			opp-microvolt-speed1 = <940000>;
-			opp-microvolt-speed2 = <940000>;
+			opp-microvolt-speed0 = <1000000 1000000 1200000>;
+			opp-microvolt-speed1 = <940000 940000 1200000>;
+			opp-microvolt-speed2 = <940000 940000 1200000>;
 		};
 
 		opp@1488000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1488000000>;
 
-			opp-microvolt-speed0 = <1060000>;
-			opp-microvolt-speed1 = <1000000>;
-			opp-microvolt-speed2 = <1000000>;
+			opp-microvolt-speed0 = <1060000 1060000 1200000>;
+			opp-microvolt-speed1 = <1000000 1000000 1200000>;
+			opp-microvolt-speed2 = <1000000 1000000 1200000>;
 		};
 
 		opp@1608000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1608000000>;
 
-			opp-microvolt-speed0 = <1090000>;
-			opp-microvolt-speed1 = <1030000>;
-			opp-microvolt-speed2 = <1030000>;
+			opp-microvolt-speed0 = <1090000 1090000 1200000>;
+			opp-microvolt-speed1 = <1030000 1030000 1200000>;
+			opp-microvolt-speed2 = <1030000 1030000 1200000>;
 		};
 
 		opp@1704000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1704000000>;
 
-			opp-microvolt-speed0 = <1120000>;
-			opp-microvolt-speed1 = <1060000>;
-			opp-microvolt-speed2 = <1060000>;
+			opp-microvolt-speed0 = <1120000 1120000 1200000>;
+			opp-microvolt-speed1 = <1060000 1060000 1200000>;
+			opp-microvolt-speed2 = <1060000 1060000 1200000>;
 		};
 
 		opp@1800000000 {
 			clock-latency-ns = <244144>; /* 8 32k periods */
 			opp-hz = /bits/ 64 <1800000000>;
 
-			opp-microvolt-speed0 = <1160000>;
-			opp-microvolt-speed1 = <1100000>;
-			opp-microvolt-speed2 = <1100000>;
+			opp-microvolt-speed0 = <1160000 1160000 1200000>;
+			opp-microvolt-speed1 = <1100000 1100000 1200000>;
+			opp-microvolt-speed2 = <1100000 1100000 1200000>;
 		};
 	};
 };
-- 
2.20.1


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^ permalink raw reply related	[flat|nested] 3+ messages in thread
* [PATCH 2/2] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
  2020-05-08 19:10 [PATCH 1/2] arm64: dts: allwinner: h6: add voltage range to OPP table Clément Péron
@ 2020-05-08 19:10 ` Clément Péron
  2020-05-13 14:20   ` Maxime Ripard
  0 siblings, 1 reply; 3+ messages in thread
From: Clément Péron @ 2020-05-08 19:10 UTC (permalink / raw)
  To: Maxime Ripard, Chen-Yu Tsai, Rob Herring
  Cc: devicetree, linux-kernel, Jernej Škrabec, linux-sunxi,
	Clément Péron, linux-arm-kernel

Enable CPU opp tables for Tanix TX6.

Also add the fixed regulator that provided vdd-cpu-gpu required for
CPU opp tables.

This voltage has been found using a voltmeter and could be wrong.

Tested-by: Jernej Škrabec <jernej.skrabec@gmail.com>
Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 .../boot/dts/allwinner/sun50i-h6-tanix-tx6.dts      | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
index 83e6cb0e59ce..be81330db14f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-tanix-tx6.dts
@@ -4,6 +4,7 @@
 /dts-v1/;
 
 #include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 
@@ -37,6 +38,17 @@
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 	};
+
+	reg_vdd_cpu_gpu: vdd-cpu-gpu {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-cpu-gpu";
+		regulator-min-microvolt = <1135000>;
+		regulator-max-microvolt = <1135000>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_vdd_cpu_gpu>;
 };
 
 &de {
@@ -56,6 +68,7 @@
 };
 
 &gpu {
+	mali-supply = <&reg_vdd_cpu_gpu>;
 	status = "okay";
 };
 
-- 
2.20.1


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^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH 2/2] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6
  2020-05-08 19:10 ` [PATCH 2/2] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6 Clément Péron
@ 2020-05-13 14:20   ` Maxime Ripard
  0 siblings, 0 replies; 3+ messages in thread
From: Maxime Ripard @ 2020-05-13 14:20 UTC (permalink / raw)
  To: Clément Péron
  Cc: devicetree, Chen-Yu Tsai, Jernej Škrabec, linux-kernel,
	linux-sunxi, Rob Herring, linux-arm-kernel


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On Fri, May 08, 2020 at 09:10:35PM +0200, Clément Péron wrote:
> Enable CPU opp tables for Tanix TX6.
> 
> Also add the fixed regulator that provided vdd-cpu-gpu required for
> CPU opp tables.
> 
> This voltage has been found using a voltmeter and could be wrong.
> 
> Tested-by: Jernej Škrabec <jernej.skrabec@gmail.com>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>

Applied both, thanks!
Maxime

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^ permalink raw reply	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-05-13 14:20 UTC | newest]

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2020-05-08 19:10 [PATCH 1/2] arm64: dts: allwinner: h6: add voltage range to OPP table Clément Péron
2020-05-08 19:10 ` [PATCH 2/2] arm64: dts: allwinner: h6: Enable CPU opp tables for Tanix TX6 Clément Péron
2020-05-13 14:20   ` Maxime Ripard

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