From: Marc Zyngier <maz@kernel.org>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Sumit Garg <sumit.garg@linaro.org>,
Russell King <linux@arm.linux.org.uk>,
Jason Cooper <jason@lakedaemon.net>,
Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-kernel@vger.kernel.org,
Thomas Gleixner <tglx@linutronix.de>,
kernel-team@android.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 01/11] genirq: Add fasteoi IPI flow
Date: Fri, 12 Jun 2020 10:54:26 +0100 [thread overview]
Message-ID: <20200612105426.39ff61bb@why> (raw)
In-Reply-To: <b691a46e-7461-89c8-c760-a1ef9769091f@gmail.com>
On Tue, 19 May 2020 12:47:24 -0700
Florian Fainelli <f.fainelli@gmail.com> wrote:
> On 5/19/2020 9:17 AM, Marc Zyngier wrote:
> > For irqchips using the fasteoi flow, IPIs are a bit special.
> >
> > They need to be EOId early (before calling the handler), as
> > funny things may happen in the handler (they do not necessarily
> > behave like a normal interrupt), and that the arch code is
> > already handling the stats.
> >
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> > include/linux/irq.h | 1 +
> > kernel/irq/chip.c | 26 ++++++++++++++++++++++++++
> > 2 files changed, 27 insertions(+)
> >
> > diff --git a/include/linux/irq.h b/include/linux/irq.h
> > index 8d5bc2c237d7..726f94d8b8cc 100644
> > --- a/include/linux/irq.h
> > +++ b/include/linux/irq.h
> > @@ -621,6 +621,7 @@ static inline int irq_set_parent(int irq, int parent_irq)
> > */
> > extern void handle_level_irq(struct irq_desc *desc);
> > extern void handle_fasteoi_irq(struct irq_desc *desc);
> > +extern void handle_percpu_devid_fasteoi_ipi(struct irq_desc *desc);
> > extern void handle_edge_irq(struct irq_desc *desc);
> > extern void handle_edge_eoi_irq(struct irq_desc *desc);
> > extern void handle_simple_irq(struct irq_desc *desc);
> > diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
> > index 41e7e37a0928..7b0b789cfed4 100644
> > --- a/kernel/irq/chip.c
> > +++ b/kernel/irq/chip.c
> > @@ -955,6 +955,32 @@ void handle_percpu_devid_irq(struct irq_desc *desc)
> > chip->irq_eoi(&desc->irq_data);
> > }
> >
> > +/**
> > + * handle_percpu_devid_fasteoi_ipi - Per CPU local IPI handler with per cpu
> > + * dev ids
> > + * @desc: the interrupt description structure for this irq
> > + *
> > + * The biggest differences with the IRQ version are that:
> > + * - the interrupt is EOIed early, as the IPI could result in a context
> > + * switch, and we need to make sure the IPI can fire again
> > + * - Stats are usually handled at the architecture level, so we ignore them
> > + * here
> > + */
> > +void handle_percpu_devid_fasteoi_ipi(struct irq_desc *desc)
> > +{
> > + struct irq_chip *chip = irq_desc_get_chip(desc);
> > + struct irqaction *action = desc->action;
> > + unsigned int irq = irq_desc_get_irq(desc);
> > + irqreturn_t res;
>
> Should not this have a:
>
> if (!irq_settings_is_no_accounting(desc))
> __kstat_incr_irqs_this_cpu(desc);
>
> here in case you are using that handler with a SGI interrupt which is
> not used as an IPI?
I see you coming... ;-)
Yes, could do. TBH, I plan on killing the "no accounting" altogether
and move to the core IRQ one, so this would only be temporary. All I
need is to update the rest of the arm32 interrupt controllers...
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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next prev parent reply other threads:[~2020-06-12 9:54 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 16:17 [PATCH 00/11] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-05-19 16:17 ` [PATCH 01/11] genirq: Add fasteoi IPI flow Marc Zyngier
2020-05-19 19:47 ` Florian Fainelli
2020-06-12 9:54 ` Marc Zyngier [this message]
2020-05-19 22:25 ` Valentin Schneider
2020-05-19 22:29 ` Valentin Schneider
2020-06-12 9:58 ` Marc Zyngier
2020-05-19 16:17 ` [PATCH 02/11] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-05-19 16:17 ` [PATCH 03/11] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-05-21 14:03 ` Valentin Schneider
2020-05-19 16:17 ` [PATCH 04/11] ARM: " Marc Zyngier
2020-05-19 22:24 ` Russell King - ARM Linux admin
2020-05-21 14:03 ` Valentin Schneider
2020-05-21 15:12 ` Russell King - ARM Linux admin
2020-05-21 16:11 ` Valentin Schneider
2020-05-19 16:17 ` [PATCH 05/11] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-05-19 16:17 ` [PATCH 06/11] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-05-20 9:52 ` Sumit Garg
2020-05-20 10:24 ` Marc Zyngier
2020-05-21 14:04 ` Valentin Schneider
2020-06-12 10:39 ` Marc Zyngier
2020-05-19 16:17 ` [PATCH 07/11] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-05-19 16:17 ` [PATCH 08/11] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
2021-04-20 20:37 ` dann frazier
2021-04-20 21:25 ` dann frazier
2021-04-21 10:58 ` Marc Zyngier
2021-04-21 14:52 ` dann frazier
2021-04-21 15:49 ` Marc Zyngier
2020-05-19 16:17 ` [PATCH 09/11] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-05-19 16:17 ` [PATCH 10/11] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
2020-05-19 16:17 ` [PATCH 11/11] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-05-19 17:50 ` [PATCH 00/11] arm/arm64: Turning IPIs into normal interrupts Florian Fainelli
2020-05-19 19:47 ` Florian Fainelli
2020-06-12 9:49 ` Marc Zyngier
2020-06-12 16:57 ` Florian Fainelli
2020-05-19 22:25 ` Valentin Schneider
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