From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>,
Rob Herring <robh+dt@kernel.org>,
Tom Joseph <tjoseph@cadence.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>
Cc: devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl
Date: Mon, 16 Nov 2020 23:01:41 +0530 [thread overview]
Message-ID: <20201116173141.31873-4-kishon@ti.com> (raw)
In-Reply-To: <20201116173141.31873-1-kishon@ti.com>
Remove "syscon" nodes added for pcieX_ctrl and have the PCIe node
point to the parent with an offset argument.
Link: http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 48 ++++-------------------
1 file changed, 8 insertions(+), 40 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 620e69e42974..23a0024dda79 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -28,38 +28,6 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x00100000 0x1c000>;
- pcie0_ctrl: syscon@4070 {
- compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
- reg = <0x00004070 0x4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x4070 0x4070 0x4>;
- };
-
- pcie1_ctrl: syscon@4074 {
- compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
- reg = <0x00004074 0x4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x4074 0x4074 0x4>;
- };
-
- pcie2_ctrl: syscon@4078 {
- compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
- reg = <0x00004078 0x4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x4078 0x4078 0x4>;
- };
-
- pcie3_ctrl: syscon@407c {
- compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
- reg = <0x0000407c 0x4>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x407c 0x407c 0x4>;
- };
-
serdes_ln_ctrl: mux@4080 {
compatible = "mmio-mux";
reg = <0x00004080 0x50>;
@@ -619,7 +587,7 @@
interrupt-names = "link_state";
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
- ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
@@ -646,7 +614,7 @@
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
- ti,syscon-pcie-ctrl = <&pcie0_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
@@ -668,7 +636,7 @@
interrupt-names = "link_state";
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
- ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
@@ -695,7 +663,7 @@
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
- ti,syscon-pcie-ctrl = <&pcie1_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
@@ -717,7 +685,7 @@
interrupt-names = "link_state";
interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
- ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
@@ -744,7 +712,7 @@
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
- ti,syscon-pcie-ctrl = <&pcie2_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
@@ -766,7 +734,7 @@
interrupt-names = "link_state";
interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
device_type = "pci";
- ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
@@ -793,7 +761,7 @@
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
- ti,syscon-pcie-ctrl = <&pcie3_ctrl>;
+ ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
max-link-speed = <3>;
num-lanes = <2>;
power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
--
2.17.1
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next prev parent reply other threads:[~2020-11-16 17:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 17:31 [PATCH 0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT Kishon Vijay Abraham I
2020-11-16 17:31 ` [PATCH 1/3] dt-bindings: pci: ti, j721e: Fix "ti, syscon-pcie-ctrl" to take argument Kishon Vijay Abraham I
2020-11-18 21:11 ` [PATCH 1/3] dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" " Rob Herring
2020-11-20 5:09 ` [PATCH 1/3] dt-bindings: pci: ti, j721e: Fix "ti, syscon-pcie-ctrl" " Kishon Vijay Abraham I
2020-11-26 12:53 ` Kishon Vijay Abraham I
2020-11-30 16:12 ` Rob Herring
2020-11-19 13:41 ` Rob Herring
2020-11-16 17:31 ` [PATCH 2/3] PCI: j721e: Get offset within "syscon" from "ti, syscon-pcie-ctrl" phandle arg Kishon Vijay Abraham I
2020-11-16 17:31 ` Kishon Vijay Abraham I [this message]
2020-11-18 21:14 ` [PATCH 3/3] arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl Rob Herring
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