From: Kishon Vijay Abraham I <kishon@ti.com>
To: Rob Herring <robh@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Nishanth Menon <nm@ti.com>,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Tero Kristo <t-kristo@ti.com>,
Tom Joseph <tjoseph@cadence.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: pci: ti, j721e: Fix "ti, syscon-pcie-ctrl" to take argument
Date: Thu, 26 Nov 2020 18:23:10 +0530 [thread overview]
Message-ID: <1ed82ab5-6171-108d-9b92-a18389044174@ti.com> (raw)
In-Reply-To: <1e9b0b56-a42d-bea0-704b-6209532b1abe@ti.com>
Hi Rob,
On 20/11/20 10:39 am, Kishon Vijay Abraham I wrote:
> Hi Rob,
>
> On 19/11/20 2:41 am, Rob Herring wrote:
>> On Mon, Nov 16, 2020 at 11:01:39PM +0530, Kishon Vijay Abraham I wrote:
>>> Fix binding documentation of "ti,syscon-pcie-ctrl" to take phandle with
>>> argument. The argument is the register offset within "syscon" used to
>>> configure PCIe controller.
>>>
>>> Link: Link: http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com
>>
>> Link: Link: ?
>>
>> AIUI, 'Link' is supposed to be a link to this patch. I guess more than 1
>> Link would be okay though.
>
> Two Links was a typo, will fix it in the next revision. Nishanth as well
> was asking about using "Link:" tag for a mailing list discussion.
>
> I started using it after Lorenzo had asked me to use Link tag for
> mailing list discussion here sometime back.
>
> https://patchwork.kernel.org/project/linux-pci/patch/20171219083627.7904-1-kishon@ti.com/#21350261
>
>>
>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>> ---
>>> .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 12 ++++++++----
>>> .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 12 ++++++++----
>>> 2 files changed, 16 insertions(+), 8 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
>>> index 3ae3e1a2d4b0..e9685c0bdc3e 100644
>>> --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml
>>> @@ -29,9 +29,13 @@ properties:
>>> - const: mem
>>>
>>> ti,syscon-pcie-ctrl:
>>> - description: Phandle to the SYSCON entry required for configuring PCIe mode
>>> - and link speed.
>>> - $ref: /schemas/types.yaml#/definitions/phandle
>>> + allOf:
>>
>> You no longer need allOf here.
>
> hmm, don't we need it for specifying phandle with fixed cells? FWIW, I
> was referring
>
> https://github.com/devicetree-org/dt-schema/blob/master/test/schemas/good-example.yaml#L187
Can you clarify this please?
Thank You,
Kishon
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next prev parent reply other threads:[~2020-11-26 12:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 17:31 [PATCH 0/3] PCI: J721E: Fix Broken DT w.r.t SYSCON DT Kishon Vijay Abraham I
2020-11-16 17:31 ` [PATCH 1/3] dt-bindings: pci: ti, j721e: Fix "ti, syscon-pcie-ctrl" to take argument Kishon Vijay Abraham I
2020-11-18 21:11 ` [PATCH 1/3] dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" " Rob Herring
2020-11-20 5:09 ` [PATCH 1/3] dt-bindings: pci: ti, j721e: Fix "ti, syscon-pcie-ctrl" " Kishon Vijay Abraham I
2020-11-26 12:53 ` Kishon Vijay Abraham I [this message]
2020-11-30 16:12 ` Rob Herring
2020-11-19 13:41 ` Rob Herring
2020-11-16 17:31 ` [PATCH 2/3] PCI: j721e: Get offset within "syscon" from "ti, syscon-pcie-ctrl" phandle arg Kishon Vijay Abraham I
2020-11-16 17:31 ` [PATCH 3/3] arm64: dts: ti: k3-j721e-main: Remove "syscon" nodes added for pcieX_ctrl Kishon Vijay Abraham I
2020-11-18 21:14 ` Rob Herring
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