From: Andre Przywara <andre.przywara@arm.com>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Stephen Boyd <sboyd@kernel.org>,
Andre Przywara <andre.przywara@arm.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-sunxi@googlegroups.com, Rob Herring <robh+dt@kernel.org>,
Icenowy Zheng <icenowy@aosc.xyz>,
Yangtao Li <frank@allwinnertech.com>,
Michael Turquette <mturquette@baylibre.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/8] clk: sunxi-ng: h6: Fix clock divider range on some clocks
Date: Wed, 2 Dec 2020 13:54:02 +0000 [thread overview]
Message-ID: <20201202135409.13683-2-andre.przywara@arm.com> (raw)
In-Reply-To: <20201202135409.13683-1-andre.przywara@arm.com>
While comparing clocks between the H6 and H616, some of the M factor
ranges were found to be wrong: the manual says they are only covering
two bits [1:0], but our code had "5" in the number-of-bits field.
By writing 0xff into that register in U-Boot and via FEL, it could be
confirmed that bits [4:2] are indeed masked off, so the manual is right.
Change to number of bits in the affected clock's description.
Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index f2497d0a4683..d0565d378ea2 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -237,7 +237,7 @@ static const char * const psi_ahb1_ahb2_parents[] = { "osc24M", "osc32k",
static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
psi_ahb1_ahb2_parents,
0x510,
- 0, 5, /* M */
+ 0, 2, /* M */
8, 2, /* P */
24, 2, /* mux */
0);
@@ -246,19 +246,19 @@ static const char * const ahb3_apb1_apb2_parents[] = { "osc24M", "osc32k",
"psi-ahb1-ahb2",
"pll-periph0" };
static SUNXI_CCU_MP_WITH_MUX(ahb3_clk, "ahb3", ahb3_apb1_apb2_parents, 0x51c,
- 0, 5, /* M */
+ 0, 2, /* M */
8, 2, /* P */
24, 2, /* mux */
0);
static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", ahb3_apb1_apb2_parents, 0x520,
- 0, 5, /* M */
+ 0, 2, /* M */
8, 2, /* P */
24, 2, /* mux */
0);
static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", ahb3_apb1_apb2_parents, 0x524,
- 0, 5, /* M */
+ 0, 2, /* M */
8, 2, /* P */
24, 2, /* mux */
0);
--
2.17.5
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next prev parent reply other threads:[~2020-12-02 13:56 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 13:54 [PATCH 0/8] arm64: sunxi: Initial Allwinner H616 SoC support Andre Przywara
2020-12-02 13:54 ` Andre Przywara [this message]
2020-12-02 16:17 ` [PATCH 1/8] clk: sunxi-ng: h6: Fix clock divider range on some clocks Jernej Škrabec
2020-12-02 13:54 ` [PATCH 2/8] pinctrl: sunxi: Add support for the Allwinner H616 pin controller Andre Przywara
2020-12-02 15:52 ` Maxime Ripard
2020-12-05 22:41 ` Linus Walleij
2020-12-02 18:15 ` Jernej Škrabec
2020-12-06 12:32 ` [linux-sunxi] " Clément Péron
2020-12-06 12:42 ` Jernej Škrabec
2020-12-06 14:52 ` André Przywara
2020-12-06 16:01 ` Icenowy Zheng
2020-12-07 1:07 ` André Przywara
2020-12-07 1:45 ` André Przywara
2020-12-13 16:27 ` Icenowy Zheng
2020-12-14 9:26 ` Chen-Yu Tsai
2020-12-02 13:54 ` [PATCH 3/8] pinctrl: sunxi: Add support for the Allwinner H616-R " Andre Przywara
2020-12-02 15:54 ` Maxime Ripard
2020-12-02 17:55 ` Jernej Škrabec
2020-12-02 13:54 ` [PATCH 4/8] clk: sunxi-ng: Add support for the Allwinner H616 R-CCU Andre Przywara
2020-12-02 14:31 ` Icenowy Zheng
2020-12-03 11:07 ` André Przywara
2020-12-03 14:02 ` [linux-sunxi] " Icenowy Zheng
2020-12-02 18:20 ` Jernej Škrabec
2020-12-03 2:44 ` Samuel Holland
2020-12-03 10:52 ` André Przywara
2020-12-02 13:54 ` [PATCH 5/8] clk: sunxi-ng: Add support for the Allwinner H616 CCU Andre Przywara
2020-12-02 15:56 ` Maxime Ripard
2020-12-02 21:03 ` Jernej Škrabec
2020-12-02 23:06 ` André Przywara
2020-12-05 16:36 ` [linux-sunxi] " Icenowy Zheng
2020-12-09 14:33 ` [linux-sunxi] " Clément Péron
2020-12-09 21:35 ` André Przywara
2020-12-09 22:20 ` Jernej Škrabec
2020-12-09 22:45 ` André Przywara
2020-12-10 13:31 ` Icenowy Zheng
2020-12-10 14:34 ` André Przywara
2020-12-02 13:54 ` [PATCH 6/8] mmc: sunxi: add support for A100 mmc controller Andre Przywara
2020-12-02 13:54 ` [PATCH 7/8] arm64: dts: allwinner: Add Allwinner H616 .dtsi file Andre Przywara
2020-12-02 16:03 ` Icenowy Zheng
2020-12-02 16:19 ` André Przywara
2020-12-02 16:05 ` Maxime Ripard
2020-12-02 16:13 ` Icenowy Zheng
2020-12-03 3:10 ` Samuel Holland
2020-12-02 16:33 ` Jernej Škrabec
2020-12-03 1:35 ` André Przywara
2020-12-03 3:16 ` Samuel Holland
2020-12-03 10:53 ` André Przywara
2020-12-03 15:02 ` [linux-sunxi] " Chen-Yu Tsai
2020-12-03 15:44 ` André Przywara
2020-12-03 16:20 ` Chen-Yu Tsai
2020-12-08 0:47 ` André Przywara
2020-12-02 13:54 ` [PATCH 8/8] arm64: dts: allwinner: Add OrangePi Zero 2 .dts Andre Przywara
2020-12-02 15:57 ` Icenowy Zheng
2020-12-02 16:43 ` André Przywara
2020-12-02 16:07 ` Maxime Ripard
2020-12-02 16:25 ` Jernej Škrabec
2020-12-06 12:51 ` [linux-sunxi] " Clément Péron
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