* [PATCH v4 1/3] arm64: dts: ti: k3-j7200: Add gpio nodes
2021-01-28 15:27 [PATCH v4 0/3] J7200: Add support for GPIO and higher speed modes in MMCSD subsystems Aswath Govindraju
@ 2021-01-28 15:27 ` Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 2/3] arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 3/3] arm64: dts: ti: k3-j7200: Add support for higher speed modes in MMCSD subsystems Aswath Govindraju
2 siblings, 0 replies; 5+ messages in thread
From: Aswath Govindraju @ 2021-01-28 15:27 UTC (permalink / raw)
Cc: Nishanth Menon, devicetree, Vignesh Raghavendra, Tero Kristo,
Lokesh Vutla, Sekhar Nori, linux-kernel, Rob Herring,
Kishon Vijay Abraham I, Faiz Abbas, Aswath Govindraju,
linux-arm-kernel
From: Faiz Abbas <faiz_abbas@ti.com>
There are 4 instances of gpio modules in main domain:
gpio0, gpio2, gpio4 and gpio6
Groups are created to provide protection between different processor
virtual worlds. Each of these modules I/O pins are muxed within the
group. Exactly one module can be selected to control the corresponding
pin by selecting it in the pad mux configuration registers.
This group pins out 69 lines (5 banks). Add DT modes for each module
instance in the main domain.
Similar to the gpio groups in main domain, there is one gpio group in
wakeup domain with 2 mdoules instances in it.
The gpio group pins out 73 pins (5 banks). Add DT nodes for each module
instance in the wakeup domain.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 72 +++++++++++++++++++
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 34 +++++++++
2 files changed, 106 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index d623004cfc9e..7a04a113f445 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -675,6 +675,78 @@
};
};
+ main_gpio0: gpio@600000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00600000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <145>, <146>, <147>, <148>,
+ <149>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 105 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio2: gpio@610000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00610000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <154>, <155>, <156>, <157>,
+ <158>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 107 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio4: gpio@620000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00620000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <163>, <164>, <165>, <166>,
+ <167>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 109 0>;
+ clock-names = "gpio";
+ };
+
+ main_gpio6: gpio@630000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x00630000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&main_gpio_intr>;
+ interrupts = <172>, <173>, <174>, <175>,
+ <176>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <69>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 111 0>;
+ clock-names = "gpio";
+ };
+
main_r5fss0: r5fss@5c00000 {
compatible = "ti,j7200-r5fss";
ti,cluster-mode = <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 0a8df7e4739c..3376bd57fd2d 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -108,6 +108,40 @@
ti,interrupt-ranges = <16 960 16>;
};
+ wkup_gpio0: gpio@42110000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x42110000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&wkup_gpio_intr>;
+ interrupts = <103>, <104>, <105>, <106>, <107>, <108>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <73>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 113 0>;
+ clock-names = "gpio";
+ };
+
+ wkup_gpio1: gpio@42100000 {
+ compatible = "ti,j721e-gpio", "ti,keystone-gpio";
+ reg = <0x00 0x42100000 0x00 0x100>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-parent = <&wkup_gpio_intr>;
+ interrupts = <112>, <113>, <114>, <115>, <116>, <117>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ #address-cells = <0>;
+ ti,ngpio = <73>;
+ ti,davinci-gpio-unbanked = <0>;
+ power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 114 0>;
+ clock-names = "gpio";
+ };
+
mcu_navss: bus@28380000 {
compatible = "simple-mfd";
#address-cells = <2>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v4 2/3] arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules
2021-01-28 15:27 [PATCH v4 0/3] J7200: Add support for GPIO and higher speed modes in MMCSD subsystems Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 1/3] arm64: dts: ti: k3-j7200: Add gpio nodes Aswath Govindraju
@ 2021-01-28 15:27 ` Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 3/3] arm64: dts: ti: k3-j7200: Add support for higher speed modes in MMCSD subsystems Aswath Govindraju
2 siblings, 0 replies; 5+ messages in thread
From: Aswath Govindraju @ 2021-01-28 15:27 UTC (permalink / raw)
Cc: Nishanth Menon, devicetree, Vignesh Raghavendra, Tero Kristo,
Lokesh Vutla, Sekhar Nori, linux-kernel, Rob Herring,
Kishon Vijay Abraham I, Faiz Abbas, Aswath Govindraju,
linux-arm-kernel
From: Faiz Abbas <faiz_abbas@ti.com>
There are 6 gpio instances inside SoC with 2 groups as show below:
Group one: wkup_gpio0, wkup_gpio1
Group two: main_gpio0, main_gpio2, main_gpio4, main_gpio6
Only one instance from each group can be used at a time. So use main_gpio0
and wkup_gpio0 in current linux context and disable the rest of the nodes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
.../boot/dts/ti/k3-j7200-common-proc-board.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 4a7182abccf5..07d03ce05d9d 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -122,6 +122,22 @@
status = "disabled";
};
+&main_gpio2 {
+ status = "disabled";
+};
+
+&main_gpio4 {
+ status = "disabled";
+};
+
+&main_gpio6 {
+ status = "disabled";
+};
+
+&wkup_gpio1 {
+ status = "disabled";
+};
+
&mcu_cpsw {
pinctrl-names = "default";
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v4 3/3] arm64: dts: ti: k3-j7200: Add support for higher speed modes in MMCSD subsystems
2021-01-28 15:27 [PATCH v4 0/3] J7200: Add support for GPIO and higher speed modes in MMCSD subsystems Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 1/3] arm64: dts: ti: k3-j7200: Add gpio nodes Aswath Govindraju
2021-01-28 15:27 ` [PATCH v4 2/3] arm64: dts: ti: k3-j7200-common-proc-board: Disable unused gpio modules Aswath Govindraju
@ 2021-01-28 15:27 ` Aswath Govindraju
2021-01-29 12:58 ` Kishon Vijay Abraham I
2 siblings, 1 reply; 5+ messages in thread
From: Aswath Govindraju @ 2021-01-28 15:27 UTC (permalink / raw)
Cc: Nishanth Menon, devicetree, Vignesh Raghavendra, Tero Kristo,
Lokesh Vutla, Sekhar Nori, linux-kernel, Rob Herring,
Kishon Vijay Abraham I, Faiz Abbas, Aswath Govindraju,
linux-arm-kernel
The following speed modes are now supported in J7200 SoC,
- HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1].
- UHS-I speed modes in MMCSD1 subsystem [1].
Add support for UHS-I modes by adding voltage regulator device tree nodes
and corresponding pinmux details, to power cycle and voltage switch cards.
Also set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1
device tree nodes.
[1] - section 12.3.6.1.1 MMCSD Features, in
https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
---
.../dts/ti/k3-j7200-common-proc-board.dts | 31 +++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 07d03ce05d9d..e670aaeb6c56 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -16,6 +16,29 @@
stdout-path = "serial2:115200n8";
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
};
+
+ vdd_mmc1: fixedregulator-sd {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_mmc1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ gpios = <&exp2 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_sd_dv: gpio-regulator-vdd-sd-dv {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd_sd_dv";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_dv_pins_default>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ gpios = <&main_gpio0 55 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0
+ 3300000 0x1>;
+ };
};
&wkup_pmx0 {
@@ -70,6 +93,12 @@
J721E_IOPAD(0x120, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
>;
};
+
+ vdd_sd_dv_pins_default: vdd_sd_dv_pins_default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd0, PIN_INPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */
+ >;
+ };
};
&wkup_uart0 {
@@ -206,6 +235,8 @@
/* SD card */
pinctrl-0 = <&main_mmc1_pins_default>;
pinctrl-names = "default";
+ vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vdd_sd_dv>;
ti,driver-strength-ohm = <50>;
disable-wp;
};
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 7a04a113f445..c9877b24fbae 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -520,6 +520,8 @@
ti,trm-icp = <0x8>;
bus-width = <8>;
mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
dma-coherent;
};
@@ -537,7 +539,6 @@
ti,otap-del-sel-sdr50 = <0xc>;
ti,otap-del-sel-sdr104 = <0x5>;
ti,otap-del-sel-ddr50 = <0xc>;
- no-1-8-v;
dma-coherent;
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread