* [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC
@ 2021-02-10 17:18 Krzysztof Kozlowski
2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node Krzysztof Kozlowski
` (9 more replies)
0 siblings, 10 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw)
To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring,
Catalin Marinas, Will Deacon, devicetree, linux-kernel,
linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson
Cc: Krzysztof Kozlowski
Enable in defconfig two Intel ARM64 architectures: the eASIC N5X SoCFPGA
and Keem Bay SoC. This allows compile coverage when building default
config.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 5348c0be2fcf..008314d8d1af 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -29,6 +29,7 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_PROFILING=y
CONFIG_ARCH_ACTIONS=y
CONFIG_ARCH_AGILEX=y
+CONFIG_ARCH_N5X=y
CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_BCM2835=y
@@ -41,6 +42,7 @@ CONFIG_ARCH_K3=y
CONFIG_ARCH_LAYERSCAPE=y
CONFIG_ARCH_LG1K=y
CONFIG_ARCH_HISI=y
+CONFIG_ARCH_KEEMBAY=y
CONFIG_ARCH_MEDIATEK=y
CONFIG_ARCH_MESON=y
CONFIG_ARCH_MVEBU=y
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-11 15:03 ` Alessandrelli, Daniele 2021-02-10 17:18 ` [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label Krzysztof Kozlowski ` (8 subsequent siblings) 9 siblings, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The check for the board compatible should be limited only to the root node. Any other nodes with such compatible are not part of this schema and should not match. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- Documentation/devicetree/bindings/arm/intel,keembay.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml index 69cd30872928..107e686ab207 100644 --- a/Documentation/devicetree/bindings/arm/intel,keembay.yaml +++ b/Documentation/devicetree/bindings/arm/intel,keembay.yaml @@ -11,6 +11,8 @@ maintainers: - Daniele Alessandrelli <daniele.alessandrelli@intel.com> properties: + $nodename: + const: '/' compatible: items: - enum: -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node Krzysztof Kozlowski @ 2021-02-11 15:03 ` Alessandrelli, Daniele 0 siblings, 0 replies; 13+ messages in thread From: Alessandrelli, Daniele @ 2021-02-11 15:03 UTC (permalink / raw) To: krzk, devicetree, olof, linux-kernel, catalin.marinas, Murphy, Paul J, linux-arm-kernel, arm, robh+dt, soc, arnd, will Hi Krzysztof, Thanks for the fix. On Wed, 2021-02-10 at 18:18 +0100, Krzysztof Kozlowski wrote: > The check for the board compatible should be limited only to the root > node. Any other nodes with such compatible are not part of this schema > and should not match. > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > Documentation/devicetree/bindings/arm/intel,keembay.yaml | 2 ++ > 1 file changed, 2 insertions(+) Acked-by: Daniele Alessandrelli <daniele.alessandrelli@intel.com> > > diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml > index 69cd30872928..107e686ab207 100644 > --- a/Documentation/devicetree/bindings/arm/intel,keembay.yaml > +++ b/Documentation/devicetree/bindings/arm/intel,keembay.yaml > @@ -11,6 +11,8 @@ maintainers: > - Daniele Alessandrelli <daniele.alessandrelli@intel.com> > > properties: > + $nodename: > + const: '/' > compatible: > items: > - enum: _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-03-03 18:15 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 04/11] arm64: dts: intel: socfpga_agilex: move clocks out of soc node Krzysztof Kozlowski ` (7 subsequent siblings) 9 siblings, 1 reply; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Using full paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect. A mistyped label on the other hand, will cause a dtc compile error (during build time). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 12 ++++-------- .../boot/dts/intel/socfpga_agilex_socdk_nand.dts | 12 ++++-------- arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 12 ++++-------- 3 files changed, 12 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index a7a83f29f00b..f14a89ca8784 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -41,14 +41,6 @@ memory { /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; - - soc { - clocks { - osc1 { - clock-frequency = <25000000>; - }; - }; - }; }; &gpio1 { @@ -92,6 +84,10 @@ &mmc { bus-width = <4>; }; +&osc1 { + clock-frequency = <25000000>; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts index 979aa59a6bd0..58a827a5e83f 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts @@ -41,14 +41,6 @@ memory { /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; - - soc { - clocks { - osc1 { - clock-frequency = <25000000>; - }; - }; - }; }; &gpio1 { @@ -121,6 +113,10 @@ partition@4280000 { }; }; +&osc1 { + clock-frequency = <25000000>; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts index 5f56e2697fee..01f1307ce4ac 100644 --- a/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts @@ -23,14 +23,6 @@ memory { /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; - - soc { - clocks { - osc1 { - clock-frequency = <25000000>; - }; - }; - }; }; &clkmgr { @@ -44,6 +36,10 @@ &mmc { bus-width = <4>; }; +&osc1 { + clock-frequency = <25000000>; +}; + &uart0 { status = "okay"; }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label 2021-02-10 17:18 ` [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label Krzysztof Kozlowski @ 2021-03-03 18:15 ` Krzysztof Kozlowski 0 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-03-03 18:15 UTC (permalink / raw) To: arm, soc, Arnd Bergmann, Olof Johansson Cc: devicetree, Will Deacon, Daniele Alessandrelli, Paul J. Murphy, linux-kernel, Catalin Marinas, linux-arm-kernel, Rob Herring On 10/02/2021 18:18, Krzysztof Kozlowski wrote: > Using full paths to extend or override a device tree node is error > prone. If there was a typo error, a new node will be created instead of > extending the existing node. This will lead to run-time errors that > could be hard to detect. > > A mistyped label on the other hand, will cause a dtc compile error > (during build time). > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 12 ++++-------- > .../boot/dts/intel/socfpga_agilex_socdk_nand.dts | 12 ++++-------- > arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts | 12 ++++-------- > 3 files changed, 12 insertions(+), 24 deletions(-) Hi Arnd and Olof, There was no response from Intel SoCFPGA maintainers for the DTS patches, so maybe you could take it directly? I can provide you pull request with these, if that's preferred. They apply cleanly. You could also take the dt-bindings 2/11 or it could go via Rob. About the defconfig patch (1/11) I will work on it more and resend it with your comments (you gave me review). Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 13+ messages in thread
* [RFT 04/11] arm64: dts: intel: socfpga_agilex: move clocks out of soc node 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 05/11] arm64: dts: intel: socfpga_agilex: move timer " Krzysztof Kozlowski ` (6 subsequent siblings) 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The clocks are usually not part of the SoC but provided on the board (external oscillators). Moving them out of soc node fixes dtc warning: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:111.10-137.5: Warning (simple_bus_reg): /soc/clocks: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index e1c0fcba5c20..12b6d208e236 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -87,6 +87,34 @@ intc: intc@fffc1000 { <0x0 0xfffc6000 0x0 0x2000>; }; + clocks { + cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + cb_intosc_ls_clk: cb-intosc-ls-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + f2s_free_clk: f2s-free-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + osc1: osc1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + }; + + qspi_clk: qspi-clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + }; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -108,34 +136,6 @@ clkmgr: clock-controller@ffd10000 { #clock-cells = <1>; }; - clocks { - cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - cb_intosc_ls_clk: cb-intosc-ls-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - f2s_free_clk: f2s-free-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - osc1: osc1 { - #clock-cells = <0>; - compatible = "fixed-clock"; - }; - - qspi_clk: qspi-clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <200000000>; - }; - }; - gmac0: ethernet@ff800000 { compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff800000 0x2000>; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [RFT 05/11] arm64: dts: intel: socfpga_agilex: move timer out of soc node 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (2 preceding siblings ...) 2021-02-10 17:18 ` [RFT 04/11] arm64: dts: intel: socfpga_agilex: move clocks out of soc node Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 06/11] arm64: dts: intel: socfpga_agilex: remove default status=okay Krzysztof Kozlowski ` (5 subsequent siblings) 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The ARM architected timer is part of ARM CPU design therefore by convention it should not be inside the soc node. This also fixes dtc warning like: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:410.9-416.5: Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 12b6d208e236..30dcf9978067 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -115,6 +115,15 @@ qspi_clk: qspi-clk { }; }; + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&intc>; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -406,15 +415,6 @@ sysmgr: sysmgr@ffd12000 { reg = <0xffd12000 0x500>; }; - /* Local timer */ - timer { - compatible = "arm,armv8-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; - }; - timer0: timer0@ffc03000 { compatible = "snps,dw-apb-timer"; interrupts = <0 113 4>; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 06/11] arm64: dts: intel: socfpga_agilex: remove default status=okay 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (3 preceding siblings ...) 2021-02-10 17:18 ` [RFT 05/11] arm64: dts: intel: socfpga_agilex: move timer " Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 07/11] arm64: dts: intel: socfpga_agilex: move usbphy out of soc node Krzysztof Kozlowski ` (4 subsequent siblings) 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski New nodes are okay by default. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 30dcf9978067..750237b9c5c1 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -472,7 +472,6 @@ uart1: serial1@ffc02100 { usbphy0: usbphy@0 { #phy-cells = <0>; compatible = "usb-nop-xceiv"; - status = "okay"; }; usb0: usb@ffb00000 { -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [RFT 07/11] arm64: dts: intel: socfpga_agilex: move usbphy out of soc node 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (4 preceding siblings ...) 2021-02-10 17:18 ` [PATCH 06/11] arm64: dts: intel: socfpga_agilex: remove default status=okay Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 08/11] arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts Krzysztof Kozlowski ` (3 subsequent siblings) 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski The usual usb-nop-xceiv USB phy node should be under root node, to fix dtc warning: arch/arm64/boot/dts/intel/socfpga_agilex.dtsi:472.21-476.5: Warning (simple_bus_reg): /soc/usbphy@0: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 750237b9c5c1..20ae9f80febd 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -124,6 +124,11 @@ timer { <1 10 0xf08>; }; + usbphy0: usbphy { + #phy-cells = <0>; + compatible = "usb-nop-xceiv"; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -469,11 +474,6 @@ uart1: serial1@ffc02100 { status = "disabled"; }; - usbphy0: usbphy@0 { - #phy-cells = <0>; - compatible = "usb-nop-xceiv"; - }; - usb0: usb@ffb00000 { compatible = "snps,dwc2"; reg = <0xffb00000 0x40000>; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 08/11] arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (5 preceding siblings ...) 2021-02-10 17:18 ` [RFT 07/11] arm64: dts: intel: socfpga_agilex: move usbphy out of soc node Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 09/11] arm64: dts: intel: socfpga_agilex: align node names with dtschema Krzysztof Kozlowski ` (2 subsequent siblings) 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Use human-readable defines for GIC interrupt type and flag, instead of hard-coding the numbers. It makes review easier. No functional change. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 137 +++++++++++------- 1 file changed, 82 insertions(+), 55 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 20ae9f80febd..8e6ba1c06938 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/reset/altr,rst-mgr-s10.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/agilex-clock.h> / { @@ -61,10 +62,10 @@ cpu3: cpu@3 { pmu { compatible = "arm,armv8-pmuv3"; - interrupts = <0 170 4>, - <0 171 4>, - <0 172 4>, - <0 173 4>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, @@ -118,10 +119,10 @@ qspi_clk: qspi-clk { timer { compatible = "arm,armv8-timer"; interrupt-parent = <&intc>; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; usbphy0: usbphy { @@ -153,7 +154,7 @@ clkmgr: clock-controller@ffd10000 { gmac0: ethernet@ff800000 { compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff800000 0x2000>; - interrupts = <0 90 4>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; @@ -171,7 +172,7 @@ gmac0: ethernet@ff800000 { gmac1: ethernet@ff802000 { compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff802000 0x2000>; - interrupts = <0 91 4>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; @@ -189,7 +190,7 @@ gmac1: ethernet@ff802000 { gmac2: ethernet@ff804000 { compatible = "altr,socfpga-stmmac-a10-s10", "snps,dwmac-3.74a", "snps,dwmac"; reg = <0xff804000 0x2000>; - interrupts = <0 92 4>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; mac-address = [00 00 00 00 00 00]; resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; @@ -220,7 +221,7 @@ porta: gpio-controller@0 { reg = <0>; interrupt-controller; #interrupt-cells = <2>; - interrupts = <0 110 4>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -240,7 +241,7 @@ portb: gpio-controller@0 { reg = <0>; interrupt-controller; #interrupt-cells = <2>; - interrupts = <0 111 4>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -249,7 +250,7 @@ i2c0: i2c@ffc02800 { #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc02800 0x100>; - interrupts = <0 103 4>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst I2C0_RESET>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; status = "disabled"; @@ -260,7 +261,7 @@ i2c1: i2c@ffc02900 { #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc02900 0x100>; - interrupts = <0 104 4>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst I2C1_RESET>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; status = "disabled"; @@ -271,7 +272,7 @@ i2c2: i2c@ffc02a00 { #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc02a00 0x100>; - interrupts = <0 105 4>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst I2C2_RESET>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; status = "disabled"; @@ -282,7 +283,7 @@ i2c3: i2c@ffc02b00 { #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc02b00 0x100>; - interrupts = <0 106 4>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst I2C3_RESET>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; status = "disabled"; @@ -293,7 +294,7 @@ i2c4: i2c@ffc02c00 { #size-cells = <0>; compatible = "snps,designware-i2c"; reg = <0xffc02c00 0x100>; - interrupts = <0 107 4>; + interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst I2C4_RESET>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; status = "disabled"; @@ -304,7 +305,7 @@ mmc: dwmmc0@ff808000 { #size-cells = <0>; compatible = "altr,socfpga-dw-mshc"; reg = <0xff808000 0x1000>; - interrupts = <0 96 4>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; fifo-depth = <0x400>; resets = <&rst SDMMC_RESET>; reset-names = "reset"; @@ -322,7 +323,7 @@ nand: nand@ffb90000 { reg = <0xffb90000 0x10000>, <0xffb80000 0x1000>; reg-names = "nand_data", "denali_reg"; - interrupts = <0 97 4>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clkmgr AGILEX_NAND_CLK>, <&clkmgr AGILEX_NAND_X_CLK>, <&clkmgr AGILEX_NAND_ECC_CLK>; @@ -339,15 +340,15 @@ ocram: sram@ffe00000 { pdma: pdma@ffda0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xffda0000 0x1000>; - interrupts = <0 81 4>, - <0 82 4>, - <0 83 4>, - <0 84 4>, - <0 85 4>, - <0 86 4>, - <0 87 4>, - <0 88 4>, - <0 89 4>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <8>; #dma-requests = <32>; @@ -369,17 +370,43 @@ smmu: iommu@fa000000 { #global-interrupts = <2>; #iommu-cells = <1>; interrupt-parent = <&intc>; - interrupts = <0 128 4>, /* Global Secure Fault */ - <0 129 4>, /* Global Non-secure Fault */ + /* Global Secure Fault */ + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + /* Global Non-secure Fault */ + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, /* Non-secure Context Interrupts (32) */ - <0 138 4>, <0 139 4>, <0 140 4>, <0 141 4>, - <0 142 4>, <0 143 4>, <0 144 4>, <0 145 4>, - <0 146 4>, <0 147 4>, <0 148 4>, <0 149 4>, - <0 150 4>, <0 151 4>, <0 152 4>, <0 153 4>, - <0 154 4>, <0 155 4>, <0 156 4>, <0 157 4>, - <0 158 4>, <0 159 4>, <0 160 4>, <0 161 4>, - <0 162 4>, <0 163 4>, <0 164 4>, <0 165 4>, - <0 166 4>, <0 167 4>, <0 168 4>, <0 169 4>; + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; stream-match-mask = <0x7ff0>; clocks = <&clkmgr AGILEX_MPU_CCU_CLK>, <&clkmgr AGILEX_L3_MAIN_FREE_CLK>, @@ -392,7 +419,7 @@ spi0: spi@ffda4000 { #address-cells = <1>; #size-cells = <0>; reg = <0xffda4000 0x1000>; - interrupts = <0 99 4>; + interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst SPIM0_RESET>; reset-names = "spi"; reg-io-width = <4>; @@ -406,7 +433,7 @@ spi1: spi@ffda5000 { #address-cells = <1>; #size-cells = <0>; reg = <0xffda5000 0x1000>; - interrupts = <0 100 4>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst SPIM1_RESET>; reset-names = "spi"; reg-io-width = <4>; @@ -422,7 +449,7 @@ sysmgr: sysmgr@ffd12000 { timer0: timer0@ffc03000 { compatible = "snps,dw-apb-timer"; - interrupts = <0 113 4>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; reg = <0xffc03000 0x100>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; clock-names = "timer"; @@ -430,7 +457,7 @@ timer0: timer0@ffc03000 { timer1: timer1@ffc03100 { compatible = "snps,dw-apb-timer"; - interrupts = <0 114 4>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; reg = <0xffc03100 0x100>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; clock-names = "timer"; @@ -438,7 +465,7 @@ timer1: timer1@ffc03100 { timer2: timer2@ffd00000 { compatible = "snps,dw-apb-timer"; - interrupts = <0 115 4>; + interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; reg = <0xffd00000 0x100>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; clock-names = "timer"; @@ -446,7 +473,7 @@ timer2: timer2@ffd00000 { timer3: timer3@ffd00100 { compatible = "snps,dw-apb-timer"; - interrupts = <0 116 4>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; reg = <0xffd00100 0x100>; clocks = <&clkmgr AGILEX_L4_SP_CLK>; clock-names = "timer"; @@ -455,7 +482,7 @@ timer3: timer3@ffd00100 { uart0: serial0@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x100>; - interrupts = <0 108 4>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; resets = <&rst UART0_RESET>; @@ -466,7 +493,7 @@ uart0: serial0@ffc02000 { uart1: serial1@ffc02100 { compatible = "snps,dw-apb-uart"; reg = <0xffc02100 0x100>; - interrupts = <0 109 4>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; resets = <&rst UART1_RESET>; @@ -477,7 +504,7 @@ uart1: serial1@ffc02100 { usb0: usb@ffb00000 { compatible = "snps,dwc2"; reg = <0xffb00000 0x40000>; - interrupts = <0 93 4>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy0>; phy-names = "usb2-phy"; resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; @@ -490,7 +517,7 @@ usb0: usb@ffb00000 { usb1: usb@ffb40000 { compatible = "snps,dwc2"; reg = <0xffb40000 0x40000>; - interrupts = <0 94 4>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy0>; phy-names = "usb2-phy"; resets = <&rst USB1_RESET>, <&rst USB1_OCP_RESET>; @@ -503,7 +530,7 @@ usb1: usb@ffb40000 { watchdog0: watchdog@ffd00200 { compatible = "snps,dw-wdt"; reg = <0xffd00200 0x100>; - interrupts = <0 117 4>; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst WATCHDOG0_RESET>; clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>; status = "disabled"; @@ -512,7 +539,7 @@ watchdog0: watchdog@ffd00200 { watchdog1: watchdog@ffd00300 { compatible = "snps,dw-wdt"; reg = <0xffd00300 0x100>; - interrupts = <0 118 4>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst WATCHDOG1_RESET>; clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>; status = "disabled"; @@ -521,7 +548,7 @@ watchdog1: watchdog@ffd00300 { watchdog2: watchdog@ffd00400 { compatible = "snps,dw-wdt"; reg = <0xffd00400 0x100>; - interrupts = <0 125 4>; + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst WATCHDOG2_RESET>; clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>; status = "disabled"; @@ -530,7 +557,7 @@ watchdog2: watchdog@ffd00400 { watchdog3: watchdog@ffd00500 { compatible = "snps,dw-wdt"; reg = <0xffd00500 0x100>; - interrupts = <0 126 4>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; resets = <&rst WATCHDOG3_RESET>; clocks = <&clkmgr AGILEX_L4_SYS_FREE_CLK>; status = "disabled"; @@ -547,7 +574,7 @@ eccmgr { altr,sysmgr-syscon = <&sysmgr>; #address-cells = <1>; #size-cells = <1>; - interrupts = <0 15 4>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; ranges; @@ -606,7 +633,7 @@ qspi: spi@ff8d2000 { #size-cells = <0>; reg = <0xff8d2000 0x100>, <0xff900000 0x100000>; - interrupts = <0 3 4>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; cdns,fifo-depth = <128>; cdns,fifo-width = <4>; cdns,trigger-address = <0x00000000>; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [RFT 09/11] arm64: dts: intel: socfpga_agilex: align node names with dtschema 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (6 preceding siblings ...) 2021-02-10 17:18 ` [PATCH 08/11] arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 10/11] arm64: dts: intel: socfpga_agilex_socdk: align LED " Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 11/11] arm64: dts: intel: socfpga_agilex_socdk_nand: " Krzysztof Kozlowski 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Align the NAND, GIC and UART node names with dtschema to silence dtbs_check warnings like: arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml: intc@fffc1000: $nodename:0: 'intc@fffc1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dt.yaml: serial0@ffc02000: $nodename:0: 'serial0@ffc02000' does not match '^serial(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 8e6ba1c06938..860a80c4258f 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -78,7 +78,7 @@ psci { method = "smc"; }; - intc: intc@fffc1000 { + intc: interrupt-controller@fffc1000 { compatible = "arm,gic-400", "arm,cortex-a15-gic"; #interrupt-cells = <3>; interrupt-controller; @@ -316,7 +316,7 @@ mmc: dwmmc0@ff808000 { status = "disabled"; }; - nand: nand@ffb90000 { + nand: nand-controller@ffb90000 { #address-cells = <1>; #size-cells = <0>; compatible = "altr,socfpga-denali-nand"; @@ -479,7 +479,7 @@ timer3: timer3@ffd00100 { clock-names = "timer"; }; - uart0: serial0@ffc02000 { + uart0: serial@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x100>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; @@ -490,7 +490,7 @@ uart0: serial0@ffc02000 { clocks = <&clkmgr AGILEX_L4_SP_CLK>; }; - uart1: serial1@ffc02100 { + uart1: serial@ffc02100 { compatible = "snps,dw-apb-uart"; reg = <0xffc02100 0x100>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [RFT 10/11] arm64: dts: intel: socfpga_agilex_socdk: align LED node names with dtschema 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (7 preceding siblings ...) 2021-02-10 17:18 ` [RFT 09/11] arm64: dts: intel: socfpga_agilex: align node names with dtschema Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 11/11] arm64: dts: intel: socfpga_agilex_socdk_nand: " Krzysztof Kozlowski 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Align the LED node names with dtschema to silence dtbs_check warnings like: leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts index f14a89ca8784..13718ab5ed91 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts @@ -20,17 +20,17 @@ chosen { leds { compatible = "gpio-leds"; - hps0 { + led0 { label = "hps_led0"; gpios = <&portb 20 GPIO_ACTIVE_HIGH>; }; - hps1 { + led1 { label = "hps_led1"; gpios = <&portb 19 GPIO_ACTIVE_HIGH>; }; - hps2 { + led2 { label = "hps_led2"; gpios = <&portb 21 GPIO_ACTIVE_HIGH>; }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
* [RFT 11/11] arm64: dts: intel: socfpga_agilex_socdk_nand: align LED node names with dtschema 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski ` (8 preceding siblings ...) 2021-02-10 17:18 ` [RFT 10/11] arm64: dts: intel: socfpga_agilex_socdk: align LED " Krzysztof Kozlowski @ 2021-02-10 17:18 ` Krzysztof Kozlowski 9 siblings, 0 replies; 13+ messages in thread From: Krzysztof Kozlowski @ 2021-02-10 17:18 UTC (permalink / raw) To: Paul J. Murphy, Daniele Alessandrelli, Rob Herring, Catalin Marinas, Will Deacon, devicetree, linux-kernel, linux-arm-kernel, arm, soc, Arnd Bergmann, Olof Johansson Cc: Krzysztof Kozlowski Align the LED node names with dtschema to silence dtbs_check warnings like: leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts index 58a827a5e83f..cc2dcabf34e3 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_nand.dts @@ -20,17 +20,17 @@ chosen { leds { compatible = "gpio-leds"; - hps0 { + led0 { label = "hps_led0"; gpios = <&portb 20 GPIO_ACTIVE_HIGH>; }; - hps1 { + led1 { label = "hps_led1"; gpios = <&portb 19 GPIO_ACTIVE_HIGH>; }; - hps2 { + led2 { label = "hps_led2"; gpios = <&portb 21 GPIO_ACTIVE_HIGH>; }; -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 13+ messages in thread
end of thread, other threads:[~2021-03-04 0:25 UTC | newest] Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-02-10 17:18 [PATCH 01/11] arm64: defconfig: enable Intel's eASIC N5X SoCFPGA and Keem Bay SoC Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 02/11] dt-bindings: arm: intel, keembay: limit the dtschema to root node Krzysztof Kozlowski 2021-02-11 15:03 ` Alessandrelli, Daniele 2021-02-10 17:18 ` [PATCH 03/11] arm64: dts: intel: socfpga: override clocks by label Krzysztof Kozlowski 2021-03-03 18:15 ` Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 04/11] arm64: dts: intel: socfpga_agilex: move clocks out of soc node Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 05/11] arm64: dts: intel: socfpga_agilex: move timer " Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 06/11] arm64: dts: intel: socfpga_agilex: remove default status=okay Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 07/11] arm64: dts: intel: socfpga_agilex: move usbphy out of soc node Krzysztof Kozlowski 2021-02-10 17:18 ` [PATCH 08/11] arm64: dts: intel: socfpga_agilex: use defined for GIC interrupts Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 09/11] arm64: dts: intel: socfpga_agilex: align node names with dtschema Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 10/11] arm64: dts: intel: socfpga_agilex_socdk: align LED " Krzysztof Kozlowski 2021-02-10 17:18 ` [RFT 11/11] arm64: dts: intel: socfpga_agilex_socdk_nand: " Krzysztof Kozlowski
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