* [PATCH 0/2] AM642-sk: Add support for USB
@ 2021-03-19 8:00 Aswath Govindraju
2021-03-19 8:00 ` [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node Aswath Govindraju
2021-03-19 8:00 ` [PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Aswath Govindraju
0 siblings, 2 replies; 4+ messages in thread
From: Aswath Govindraju @ 2021-03-19 8:00 UTC (permalink / raw)
Cc: Vignesh Raghavendra, Lokesh Vutla, Kishon Vijay Abraham I,
Aswath Govindraju, Nishanth Menon, Tero Kristo, Rob Herring,
linux-arm-kernel, devicetree, linux-kernel
The following series of patches add support for,
- single one lane SERDES present in AM64
- USB super-speed port on AM642-sk
USB test logs,
https://pastebin.ubuntu.com/p/4RT9Y94fPv/
The following patches depend on,
1) - https://lore.kernel.org/linux-devicetree/20210310112745.3445-1-kishon@ti.com/
binding additions and given below is an immutable tag provided by
Vinod Koul <vkoul@kernel.org> (one of the Maintainers of GENERIC PHY
FRAMEWORK) after applying them,
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy.git
tags/ti-serdes-for-5.13
2) - https://patchwork.kernel.org/project/linux-phy/list/?series=445371
Serdes driver changes required for USB super-speed functionality.
Kishon Vijay Abraham I (2):
arm64: dts: ti: k3-am64: Add SERDES DT node
arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 ++++++++++++++++++++++++
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 39 ++++++++++++++++++
2 files changed, 91 insertions(+)
--
2.17.1
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^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node 2021-03-19 8:00 [PATCH 0/2] AM642-sk: Add support for USB Aswath Govindraju @ 2021-03-19 8:00 ` Aswath Govindraju 2021-03-19 14:29 ` Kishon Vijay Abraham I 2021-03-19 8:00 ` [PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Aswath Govindraju 1 sibling, 1 reply; 4+ messages in thread From: Aswath Govindraju @ 2021-03-19 8:00 UTC (permalink / raw) Cc: Vignesh Raghavendra, Lokesh Vutla, Kishon Vijay Abraham I, Aswath Govindraju, Nishanth Menon, Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel From: Kishon Vijay Abraham I <kishon@ti.com> Add SERDES DT node for the single one lane SERDES present in AM64. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 ++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index a03b66456062..5a62a96c048c 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -5,6 +5,17 @@ * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <dt-bindings/phy/phy-cadence-torrent.h> +#include <dt-bindings/phy/phy-ti.h> + +/ { + serdes_refclk: serdes-refclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <100000000>; + }; +}; + &cbass_main { oc_sram: sram@70000000 { compatible = "mmio-sram"; @@ -184,6 +195,12 @@ reg = <0x4044 0x8>; #phy-cells = <1>; }; + + serdes_ln_ctrl: mux { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */ + }; }; main_uart0: serial@2800000 { @@ -477,6 +494,41 @@ }; }; + serdes_wiz0: wiz@f000000 { + compatible = "ti,am64-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <1>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x0f000000 0x0 0x0f000000 0x00010000>; + assigned-clocks = <&k3_clks 162 1>; + assigned-clock-parents = <&k3_clks 162 5>; + + serdes0: serdes@f000000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x0f000000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 162 1>, + <&k3_clks 162 1>, + <&k3_clks 162 1>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + }; + }; + cpts@39000000 { compatible = "ti,j721e-cpts"; reg = <0x0 0x39000000 0x0 0x400>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node 2021-03-19 8:00 ` [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node Aswath Govindraju @ 2021-03-19 14:29 ` Kishon Vijay Abraham I 0 siblings, 0 replies; 4+ messages in thread From: Kishon Vijay Abraham I @ 2021-03-19 14:29 UTC (permalink / raw) To: Aswath Govindraju Cc: Vignesh Raghavendra, Lokesh Vutla, Nishanth Menon, Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel Hi Aswath, On 19/03/21 1:30 pm, Aswath Govindraju wrote: > From: Kishon Vijay Abraham I <kishon@ti.com> > > Add SERDES DT node for the single one lane SERDES present in > AM64. > > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> > Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 52 ++++++++++++++++++++++++ > 1 file changed, 52 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > index a03b66456062..5a62a96c048c 100644 > --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi > @@ -5,6 +5,17 @@ > * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ > */ > > +#include <dt-bindings/phy/phy-cadence-torrent.h> One of my patches in other series which renames the header file will cause issues here :-/ http://lore.kernel.org/r/20210319124128.13308-9-kishon@ti.com We'll need a immutable tag for this as well. > +#include <dt-bindings/phy/phy-ti.h> > + > +/ { > + serdes_refclk: serdes-refclk { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <100000000>; > + }; Clock frequency of serdes_refclk depends on how it is tied in the EVM. In the case of AM64EVM there is no external clock generator. It should be something like in https://github.com/kishon/linux-wip/commit/e5196b0819d334ce8a21b398b7c47557a145d250 Thanks Kishon > +}; > + > &cbass_main { > oc_sram: sram@70000000 { > compatible = "mmio-sram"; > @@ -184,6 +195,12 @@ > reg = <0x4044 0x8>; > #phy-cells = <1>; > }; > + > + serdes_ln_ctrl: mux { > + compatible = "mmio-mux"; > + #mux-control-cells = <1>; > + mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */ > + }; > }; > > main_uart0: serial@2800000 { > @@ -477,6 +494,41 @@ > }; > }; > > + serdes_wiz0: wiz@f000000 { > + compatible = "ti,am64-wiz-10g"; > + #address-cells = <1>; > + #size-cells = <1>; > + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 162 0>, <&k3_clks 162 1>, <&serdes_refclk>; > + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; > + num-lanes = <1>; > + #reset-cells = <1>; > + #clock-cells = <1>; > + ranges = <0x0f000000 0x0 0x0f000000 0x00010000>; > + assigned-clocks = <&k3_clks 162 1>; > + assigned-clock-parents = <&k3_clks 162 5>; > + > + serdes0: serdes@f000000 { > + compatible = "ti,j721e-serdes-10g"; > + reg = <0x0f000000 0x00010000>; > + reg-names = "torrent_phy"; > + resets = <&serdes_wiz0 0>; > + reset-names = "torrent_reset"; > + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, > + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; > + clock-names = "refclk", "phy_en_refclk"; > + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, > + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, > + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; > + assigned-clock-parents = <&k3_clks 162 1>, > + <&k3_clks 162 1>, > + <&k3_clks 162 1>; > + #address-cells = <1>; > + #size-cells = <0>; > + #clock-cells = <1>; > + }; > + }; > + > cpts@39000000 { > compatible = "ti,j721e-cpts"; > reg = <0x0 0x39000000 0x0 0x400>; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port 2021-03-19 8:00 [PATCH 0/2] AM642-sk: Add support for USB Aswath Govindraju 2021-03-19 8:00 ` [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node Aswath Govindraju @ 2021-03-19 8:00 ` Aswath Govindraju 1 sibling, 0 replies; 4+ messages in thread From: Aswath Govindraju @ 2021-03-19 8:00 UTC (permalink / raw) Cc: Vignesh Raghavendra, Lokesh Vutla, Kishon Vijay Abraham I, Aswath Govindraju, Nishanth Menon, Tero Kristo, Rob Herring, linux-arm-kernel, devicetree, linux-kernel From: Kishon Vijay Abraham I <kishon@ti.com> Enable USB Super-Speed HOST port. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 39 ++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 3a5bee4b0b0c..f193ec630d18 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -5,6 +5,8 @@ /dts-v1/; +#include <dt-bindings/mux/ti-serdes.h> +#include <dt-bindings/phy/phy.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/net/ti-dp83867.h> #include "k3-am642.dtsi" @@ -85,6 +87,12 @@ >; }; + main_usb0_pins_default: main-usb0-pins-default { + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; + main_i2c1_pins_default: main-i2c1-pins-default { pinctrl-single,pins = < AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ @@ -230,6 +238,37 @@ disable-wp; }; +&serdes_ln_ctrl { + idle-states = <AM64_SERDES0_LANE0_USB>; +}; + +&serdes_wiz0 { + status = "okay"; +}; + +&serdes0 { + serdes0_usb_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_USB3>; + resets = <&serdes_wiz0 1>; + }; +}; + +&usbss0 { + ti,vbus-divider; +}; + +&usb0 { + dr_mode = "host"; + maximum-speed = "super-speed"; + pinctrl-names = "default"; + pinctrl-0 = <&main_usb0_pins_default>; + phys = <&serdes0_usb_link>; + phy-names = "cdns3,usb3-phy"; +}; + &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&mdio1_pins_default -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-03-19 14:31 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-19 8:00 [PATCH 0/2] AM642-sk: Add support for USB Aswath Govindraju 2021-03-19 8:00 ` [PATCH 1/2] arm64: dts: ti: k3-am64: Add SERDES DT node Aswath Govindraju 2021-03-19 14:29 ` Kishon Vijay Abraham I 2021-03-19 8:00 ` [PATCH 2/2] arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port Aswath Govindraju
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