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From: Leo Yan <leo.yan@linaro.org>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>,
	"coresight@lists.linaro.org" <coresight@lists.linaro.org>,
	"denik@google.com" <denik@google.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	 Daniel Kiss <Daniel.Kiss@arm.com>
Subject: Re: [PATCH 0/4] coresight: Add ETR-PERF polling.
Date: Wed, 28 Apr 2021 00:04:43 +0800	[thread overview]
Message-ID: <20210427160443.GA208852@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <20210427154746.GA1422814@xps15>

On Tue, Apr 27, 2021 at 09:47:46AM -0600, Mathieu Poirier wrote:

[...]

> > 2) ETR polling ensures that more trace is collected across the entire
> > trace session - seeking to reduce inconsistent capture volumes.
> 
> I am not convinced disabling a sink to collect traces while an
> event is active is the right way to go.  To me it will add (more) complexity to
> the coresight subsystem for very little gains, if any.
> 
> If I remember correctly Leo brought forward the exact same idea about a year ago
> and after discussion, we all agreed the benefit would not be important enough to
> offset the drawbacks.
> 
> As usual I am open to discussion and my opinion is not set in stone.  But as I
> mentioned I worry the feature will increase complexity in the driver and
> produce dubious results.  And we also have to factor in usability which, as
> Al pointed, out will be a problem. 

Just want to remind one thing for ETR polling.  From one perspective,
the ETR polling mode is actually very similar with perf's snapshot
mode.  E.g. we can use specific interval to send USR2 singal to perf
tool to captcure CoreSight trace data, thus it also can record the
trace data continuously.

I can see a benefit from ETR polling mode is it might introduce less
overhead than perf snapshot mode.  The kernel's mechanism (workqueue
or kernel thread) will be much efficiency than perf's signal handling
+ SMP call with IPIs.

So it's good to firstly understand if perf snapshot mode can meet the
requirement or not.

Thanks,
Leo

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  reply	other threads:[~2021-04-27 16:06 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-21 12:04 [PATCH 0/4] coresight: Add ETR-PERF polling Daniel Kiss
2021-04-21 12:04 ` [PATCH 1/4] coresight: tmc-etr: Advance buffer pointer in sync buffer Daniel Kiss
2021-04-23  8:23   ` Leo Yan
2021-04-26 10:40   ` Suzuki K Poulose
2021-04-27  3:45     ` Leo Yan
2021-04-27 10:00       ` Suzuki K Poulose
2021-04-28  2:34         ` Leo Yan
2021-04-21 12:04 ` [PATCH 2/4] coresight: tmc-etr: Track perf handler Daniel Kiss
2021-04-23  9:20   ` Leo Yan
2021-04-26  0:25     ` Leo Yan
2021-04-21 12:04 ` [PATCH 3/4] coresight: etm-perf: Export etm_event_cpu_path Daniel Kiss
2021-04-21 12:04 ` [PATCH 4/4] coresight: Add ETR-PERF polling Daniel Kiss
2021-04-26  1:18   ` Leo Yan
2021-05-05  7:21   ` Denis Nikitin
2021-04-26 17:54 ` [PATCH 0/4] " Mathieu Poirier
2021-04-27 10:43   ` Al Grant
2021-04-27 14:41     ` Mike Leach
2021-04-27 15:47       ` Mathieu Poirier
2021-04-27 16:04         ` Leo Yan [this message]
2021-05-05  6:46           ` Denis Nikitin
2021-05-05 15:29             ` Mathieu Poirier
2021-05-14  9:02               ` Denis Nikitin
2021-05-14 16:16                 ` Mike Leach
2021-05-18 14:00                 ` Leo Yan
2021-05-18 14:14                   ` Leo Yan
2021-05-18 15:41                   ` Mathieu Poirier
2021-05-26  6:47                   ` Denis Nikitin
2021-05-23  8:45                 ` Leo Yan
2021-05-27  7:50                   ` Denis Nikitin
2021-05-27 15:07                     ` Leo Yan
2021-05-27 16:22                       ` Denis Nikitin
2021-05-28 16:37                         ` Leo Yan
2021-04-27 16:24 ` James Clark
2021-04-28 11:30   ` James Clark
2021-04-28 11:52   ` Daniel Kiss

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