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From: Mark Rutland <mark.rutland@arm.com>
To: Fuad Tabba <tabba@google.com>
Cc: linux-arm-kernel@lists.infradead.org, will@kernel.org,
	catalin.marinas@arm.com, maz@kernel.org, ardb@kernel.org,
	james.morse@arm.com, alexandru.elisei@arm.com,
	suzuki.poulose@arm.com, robin.murphy@arm.com
Subject: Re: [PATCH v3 14/18] arm64: __clean_dcache_area_pop to take end parameter instead of size
Date: Thu, 20 May 2021 17:19:26 +0100	[thread overview]
Message-ID: <20210520161926.GS17233@C02TD0UTHF1T.local> (raw)
In-Reply-To: <20210520124406.2731873-15-tabba@google.com>

On Thu, May 20, 2021 at 01:44:02PM +0100, Fuad Tabba wrote:
> To be consistent with other functions with similar names and
> functionality in cacheflush.h, cache.S, and cachetlb.rst, change
> to specify the range in terms of start and end, as opposed to
> start and size.
> 
> No functional change intended.
> 
> Reported-by: Will Deacon <will@kernel.org>
> Signed-off-by: Fuad Tabba <tabba@google.com>

Acked-by: Mark Rutland <mark.rutland@arm.com>

Mark.

> ---
>  arch/arm64/include/asm/cacheflush.h | 2 +-
>  arch/arm64/lib/uaccess_flushcache.c | 4 ++--
>  arch/arm64/mm/cache.S               | 9 ++++-----
>  arch/arm64/mm/flush.c               | 2 +-
>  4 files changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
> index 3255878d6f30..fa5641868d65 100644
> --- a/arch/arm64/include/asm/cacheflush.h
> +++ b/arch/arm64/include/asm/cacheflush.h
> @@ -61,7 +61,7 @@ extern void invalidate_icache_range(unsigned long start, unsigned long end);
>  extern void __flush_dcache_area(unsigned long start, unsigned long end);
>  extern void __inval_dcache_area(unsigned long start, unsigned long end);
>  extern void __clean_dcache_area_poc(unsigned long start, unsigned long end);
> -extern void __clean_dcache_area_pop(void *addr, size_t len);
> +extern void __clean_dcache_area_pop(unsigned long start, unsigned long end);
>  extern void __clean_dcache_area_pou(void *addr, size_t len);
>  extern long __flush_cache_user_range(unsigned long start, unsigned long end);
>  extern void sync_icache_aliases(void *kaddr, unsigned long len);
> diff --git a/arch/arm64/lib/uaccess_flushcache.c b/arch/arm64/lib/uaccess_flushcache.c
> index c83bb5a4aad2..62ea989effe8 100644
> --- a/arch/arm64/lib/uaccess_flushcache.c
> +++ b/arch/arm64/lib/uaccess_flushcache.c
> @@ -15,7 +15,7 @@ void memcpy_flushcache(void *dst, const void *src, size_t cnt)
>  	 * barrier to order the cache maintenance against the memcpy.
>  	 */
>  	memcpy(dst, src, cnt);
> -	__clean_dcache_area_pop(dst, cnt);
> +	__clean_dcache_area_pop((unsigned long)dst, (unsigned long)dst + cnt);
>  }
>  EXPORT_SYMBOL_GPL(memcpy_flushcache);
>  
> @@ -33,6 +33,6 @@ unsigned long __copy_user_flushcache(void *to, const void __user *from,
>  	rc = raw_copy_from_user(to, from, n);
>  
>  	/* See above */
> -	__clean_dcache_area_pop(to, n - rc);
> +	__clean_dcache_area_pop((unsigned long)to, (unsigned long)to + n - rc);
>  	return rc;
>  }
> diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
> index 9a9c44bb26d2..b72fbae4b8e9 100644
> --- a/arch/arm64/mm/cache.S
> +++ b/arch/arm64/mm/cache.S
> @@ -201,16 +201,15 @@ SYM_FUNC_END_PI(__clean_dcache_area_poc)
>  SYM_FUNC_END(__dma_clean_area)
>  
>  /*
> - *	__clean_dcache_area_pop(kaddr, size)
> + *	__clean_dcache_area_pop(start, end)
>   *
> - * 	Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
> + * 	Ensure that any D-cache lines for the interval [start, end)
>   * 	are cleaned to the PoP.
>   *
> - *	- kaddr   - kernel address
> - *	- size    - size in question
> + *	- start   - virtual start address of region
> + *	- end     - virtual end address of region
>   */
>  SYM_FUNC_START_PI(__clean_dcache_area_pop)
> -	add	x1, x0, x1
>  	alternative_if_not ARM64_HAS_DCPOP
>  	b	__clean_dcache_area_poc
>  	alternative_else_nop_endif
> diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
> index 4e3505c2bea6..5aba7fe42d4b 100644
> --- a/arch/arm64/mm/flush.c
> +++ b/arch/arm64/mm/flush.c
> @@ -82,7 +82,7 @@ void arch_wb_cache_pmem(void *addr, size_t size)
>  {
>  	/* Ensure order against any prior non-cacheable writes */
>  	dmb(osh);
> -	__clean_dcache_area_pop(addr, size);
> +	__clean_dcache_area_pop((unsigned long)addr, (unsigned long)addr + size);
>  }
>  EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
>  
> -- 
> 2.31.1.751.gd2f1c929bd-goog
> 

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  reply	other threads:[~2021-05-20 16:21 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-20 12:43 [PATCH v3 00/18] Tidy up cache.S Fuad Tabba
2021-05-20 12:43 ` [PATCH v3 01/18] arm64: assembler: replace `kaddr` with `addr` Fuad Tabba
2021-05-20 12:43 ` [PATCH v3 02/18] arm64: assembler: add conditional cache fixups Fuad Tabba
2021-05-20 12:43 ` [PATCH v3 03/18] arm64: Apply errata to swsusp_arch_suspend_exit Fuad Tabba
2021-05-20 12:46   ` Mark Rutland
2021-05-20 12:43 ` [PATCH v3 04/18] arm64: assembler: user_alt label optional Fuad Tabba
2021-05-20 12:57   ` Mark Rutland
2021-05-21 11:46     ` Fuad Tabba
2021-05-21 13:05       ` Mark Rutland
2021-05-20 12:43 ` [PATCH v3 05/18] arm64: Do not enable uaccess for flush_icache_range Fuad Tabba
2021-05-20 14:02   ` Mark Rutland
2021-05-20 15:37     ` Mark Rutland
2021-05-21 12:18       ` Mark Rutland
2021-05-25 11:18   ` Catalin Marinas
2021-05-20 12:43 ` [PATCH v3 06/18] arm64: Do not enable uaccess for invalidate_icache_range Fuad Tabba
2021-05-20 14:13   ` Mark Rutland
2021-05-25 11:18   ` Catalin Marinas
2021-05-20 12:43 ` [PATCH v3 07/18] arm64: Downgrade flush_icache_range to invalidate Fuad Tabba
2021-05-20 14:15   ` Mark Rutland
2021-05-25 11:18   ` Catalin Marinas
2021-05-20 12:43 ` [PATCH v3 08/18] arm64: Move documentation of dcache_by_line_op Fuad Tabba
2021-05-20 14:17   ` Mark Rutland
2021-05-20 12:43 ` [PATCH v3 09/18] arm64: Fix comments to refer to correct function __flush_icache_range Fuad Tabba
2021-05-20 14:18   ` Mark Rutland
2021-05-20 12:43 ` [PATCH v3 10/18] arm64: __inval_dcache_area to take end parameter instead of size Fuad Tabba
2021-05-20 15:46   ` Mark Rutland
2021-05-20 12:43 ` [PATCH v3 11/18] arm64: dcache_by_line_op " Fuad Tabba
2021-05-20 15:48   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 12/18] arm64: __flush_dcache_area " Fuad Tabba
2021-05-20 16:06   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 13/18] arm64: __clean_dcache_area_poc " Fuad Tabba
2021-05-20 16:16   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 14/18] arm64: __clean_dcache_area_pop " Fuad Tabba
2021-05-20 16:19   ` Mark Rutland [this message]
2021-05-20 12:44 ` [PATCH v3 15/18] arm64: __clean_dcache_area_pou " Fuad Tabba
2021-05-20 16:24   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 16/18] arm64: sync_icache_aliases " Fuad Tabba
2021-05-20 16:34   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 17/18] arm64: Fix cache maintenance function comments Fuad Tabba
2021-05-20 16:48   ` Mark Rutland
2021-05-20 12:44 ` [PATCH v3 18/18] arm64: Rename arm64-internal cache maintenance functions Fuad Tabba
2021-05-20 17:01   ` Mark Rutland

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