Re: [PATCH v4] arm64: smccc: Support SMCCC v1.3 SVE register saving hint

From: Will Deacon <will@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [PATCH v4] arm64: smccc: Support SMCCC v1.3 SVE register saving hint
Date: Wed, 26 May 2021 22:31:29 +0100	[thread overview]
Message-ID: <20210526213128.GB20442@willie-the-truck> (raw)
In-Reply-To: <20210524104253.1462-1-broonie@kernel.org>

On Mon, May 24, 2021 at 11:42:53AM +0100, Mark Brown wrote:
> SMCCC v1.2 requires that all SVE state be preserved over SMC calls which
> introduces substantial overhead in the common case where there is no SVE
> state in the registers. To avoid this SMCCC v1.3 introduces a flag which
> allows the caller to say that there is no state that needs to be preserved
> in the registers. Make use of this flag, setting it if the SMCCC version
> indicates support for it and the TIF_ flags indicate that there is no live
> SVE state in the registers, this avoids placing any constraints on when
> SMCCC calls can be done or triggering extra saving and reloading of SVE
> register state in the kernel.
> 
> This would be straightforward enough except for the rather entertaining
> inline assembly we use to do SMCCC v1.1 calls to allow us to take advantage
> of the limited number of registers it clobbers. Deal with this by having a
> function which we call immediately before issuing the SMCCC call to make
> our checks and set the flag. Using alternatives the overhead if SVE is
> supported but not detected at runtime can be reduced to a single NOP.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>
> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
> ---
> 
> v4:
>  - Also clobber cc as per suggestion from Ard.
>  - Rebase onto v5.13-rc3.
> 
>  arch/arm64/kernel/smccc-call.S | 26 ++++++++++++++++++++++++++
>  drivers/firmware/smccc/smccc.c |  4 ++++
>  include/linux/arm-smccc.h      | 24 ++++++++++++++++++++++--
>  3 files changed, 52 insertions(+), 2 deletions(-)

This fails to build for me:

Failed to build : cfc21861dca9 arm64: smccc: Support SMCCC v1.3 SVE register saving hint
Configuration: "defconfig-arm64-aarch64-linux-gnu-".

  592 |  arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_WORKAROUND_2, true, NULL);
      |  ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:456:3: error: unknown register name ‘lr’ in ‘asm’
  456 |   asm volatile(SMCCC_SVE_CHECK    \
      |   ^~~
include/linux/arm-smccc.h:478:32: note: in expansion of macro ‘__arm_smccc_1_1’
  478 | #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__)
      |                                ^~~~~~~~~~~~~~~
include/linux/arm-smccc.h:531:4: note: in expansion of macro ‘arm_smccc_1_1_smc’
  531 |    arm_smccc_1_1_smc(__VA_ARGS__);   \
      |    ^~~~~~~~~~~~~~~~~
arch/arm64/kernel/proton-pack.c:592:2: note: in expansion of macro ‘arm_smccc_1_1_invoke’
  592 |  arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_WORKAROUND_2, true, NULL);
      |  ^~~~~~~~~~~~~~~~~~~~
include/linux/arm-smccc.h:504:3: error: unknown register name ‘lr’ in ‘asm’
  504 |   asm ("" : __constraints(__count_args(__VA_ARGS__))); \
      |   ^~~
include/linux/arm-smccc.h:534:4: note: in expansion of macro ‘__fail_smccc_1_1’
  534 |    __fail_smccc_1_1(__VA_ARGS__);   \
      |    ^~~~~~~~~~~~~~~~
arch/arm64/kernel/proton-pack.c:592:2: note: in expansion of macro ‘arm_smccc_1_1_invoke’
  592 |  arm_smccc_1_1_invoke(ARM_SMCCC_ARCH_WORKAROUND_2, true, NULL);
      |  ^~~~~~~~~~~~~~~~~~~~
make[3]: *** [scripts/Makefile.build:272: arch/arm64/kernel/proton-pack.o] Error 1

Maybe need an x30 instead of lr?

Will

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