* [PATCH 0/2] crypto: stm32 - Add support of COMPILE_TEST
@ 2021-08-25 11:21 Cai Huoqing
2021-08-25 11:21 ` [PATCH 1/2] " Cai Huoqing
2021-08-25 11:21 ` [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST Cai Huoqing
0 siblings, 2 replies; 4+ messages in thread
From: Cai Huoqing @ 2021-08-25 11:21 UTC (permalink / raw)
To: herbert, davem, mcoquelin.stm32, alexandre.torgue, nicolas.toromanoff
Cc: linux-crypto, linux-stm32, linux-arm-kernel, Cai Huoqing
it's helpful for complie test in other platform(e.g.X86
Cai Huoqing (2):
crypto: stm32 - Add support of COMPILE_TEST
crypto: stm32 - open the configuration for COMPILE_TEST
drivers/crypto/Makefile | 2 +-
drivers/crypto/stm32/Kconfig | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] crypto: stm32 - Add support of COMPILE_TEST
2021-08-25 11:21 [PATCH 0/2] crypto: stm32 - Add support of COMPILE_TEST Cai Huoqing
@ 2021-08-25 11:21 ` Cai Huoqing
2021-08-25 11:21 ` [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST Cai Huoqing
1 sibling, 0 replies; 4+ messages in thread
From: Cai Huoqing @ 2021-08-25 11:21 UTC (permalink / raw)
To: herbert, davem, mcoquelin.stm32, alexandre.torgue, nicolas.toromanoff
Cc: linux-crypto, linux-stm32, linux-arm-kernel, Cai Huoqing
it's helpful for complie test in other platform(e.g.X86)
Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
---
drivers/crypto/stm32/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/stm32/Kconfig b/drivers/crypto/stm32/Kconfig
index 4a4c3284ae1f..0fa30260300f 100644
--- a/drivers/crypto/stm32/Kconfig
+++ b/drivers/crypto/stm32/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
config CRYPTO_DEV_STM32_CRC
tristate "Support for STM32 crc accelerators"
- depends on ARCH_STM32
+ depends on ARCH_STM32 || (COMPILE_TEST && OF)
select CRYPTO_HASH
select CRC32
help
@@ -10,7 +10,7 @@ config CRYPTO_DEV_STM32_CRC
config CRYPTO_DEV_STM32_HASH
tristate "Support for STM32 hash accelerators"
- depends on ARCH_STM32
+ depends on ARCH_STM32 || (COMPILE_TEST && OF)
depends on HAS_DMA
select CRYPTO_HASH
select CRYPTO_MD5
@@ -23,7 +23,7 @@ config CRYPTO_DEV_STM32_HASH
config CRYPTO_DEV_STM32_CRYP
tristate "Support for STM32 cryp accelerators"
- depends on ARCH_STM32
+ depends on ARCH_STM32 || (COMPILE_TEST && OF)
select CRYPTO_HASH
select CRYPTO_ENGINE
select CRYPTO_LIB_DES
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST
2021-08-25 11:21 [PATCH 0/2] crypto: stm32 - Add support of COMPILE_TEST Cai Huoqing
2021-08-25 11:21 ` [PATCH 1/2] " Cai Huoqing
@ 2021-08-25 11:21 ` Cai Huoqing
2021-08-26 20:07 ` kernel test robot
1 sibling, 1 reply; 4+ messages in thread
From: Cai Huoqing @ 2021-08-25 11:21 UTC (permalink / raw)
To: herbert, davem, mcoquelin.stm32, alexandre.torgue, nicolas.toromanoff
Cc: linux-crypto, linux-stm32, linux-arm-kernel, Cai Huoqing
it could be opened for complie test in other platform(e.g.X86)
Signed-off-by: Cai Huoqing <caihuoqing@baidu.com>
---
drivers/crypto/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 1fe5120eb966..17b640de1823 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -39,7 +39,7 @@ obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o
obj-$(CONFIG_CRYPTO_DEV_SA2UL) += sa2ul.o
obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o
obj-$(CONFIG_CRYPTO_DEV_SL3516) += gemini/
-obj-$(CONFIG_ARCH_STM32) += stm32/
+obj-y += stm32/
obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
obj-$(CONFIG_CRYPTO_DEV_VIRTIO) += virtio/
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST
2021-08-25 11:21 ` [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST Cai Huoqing
@ 2021-08-26 20:07 ` kernel test robot
0 siblings, 0 replies; 4+ messages in thread
From: kernel test robot @ 2021-08-26 20:07 UTC (permalink / raw)
To: Cai Huoqing, herbert, davem, mcoquelin.stm32, alexandre.torgue,
nicolas.toromanoff
Cc: kbuild-all, linux-crypto, linux-stm32, linux-arm-kernel, Cai Huoqing
[-- Attachment #1: Type: text/plain, Size: 9234 bytes --]
Hi Cai,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on cryptodev/master]
[also build test ERROR on crypto/master stm32/stm32-next v5.14-rc7 next-20210826]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Cai-Huoqing/crypto-stm32-Add-support-of-COMPILE_TEST/20210825-192234
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: parisc-randconfig-r035-20210827 (attached as .config)
compiler: hppa64-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/ee7c38e84d0080bed97a670609a489b42494c16f
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Cai-Huoqing/crypto-stm32-Add-support-of-COMPILE_TEST/20210825-192234
git checkout ee7c38e84d0080bed97a670609a489b42494c16f
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=parisc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/crypto/stm32/stm32-hash.c: In function 'stm32_hash_dma_send':
>> drivers/crypto/stm32/stm32-hash.c:617:25: error: implicit declaration of function 'writesl'; did you mean 'writel'? [-Werror=implicit-function-declaration]
617 | writesl(hdev->io_base + HASH_DIN, buffer,
| ^~~~~~~
| writel
cc1: some warnings being treated as errors
vim +617 drivers/crypto/stm32/stm32-hash.c
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 542
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 543 static int stm32_hash_dma_send(struct stm32_hash_dev *hdev)
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 544 {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 545 struct stm32_hash_request_ctx *rctx = ahash_request_ctx(hdev->req);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 546 struct scatterlist sg[1], *tsg;
532f419cde077f Arnd Bergmann 2017-09-12 547 int err = 0, len = 0, reg, ncp = 0;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 548 unsigned int i;
532f419cde077f Arnd Bergmann 2017-09-12 549 u32 *buffer = (void *)rctx->buffer;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 550
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 551 rctx->sg = hdev->req->src;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 552 rctx->total = hdev->req->nbytes;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 553
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 554 rctx->nents = sg_nents(rctx->sg);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 555
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 556 if (rctx->nents < 0)
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 557 return -EINVAL;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 558
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 559 stm32_hash_write_ctrl(hdev);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 560
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 561 if (hdev->flags & HASH_FLAGS_HMAC) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 562 err = stm32_hash_hmac_dma_send(hdev);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 563 if (err != -EINPROGRESS)
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 564 return err;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 565 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 566
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 567 for_each_sg(rctx->sg, tsg, rctx->nents, i) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 568 len = sg->length;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 569
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 570 sg[0] = *tsg;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 571 if (sg_is_last(sg)) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 572 if (hdev->dma_mode == 1) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 573 len = (ALIGN(sg->length, 16) - 16);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 574
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 575 ncp = sg_pcopy_to_buffer(
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 576 rctx->sg, rctx->nents,
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 577 rctx->buffer, sg->length - len,
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 578 rctx->total - sg->length + len);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 579
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 580 sg->length = len;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 581 } else {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 582 if (!(IS_ALIGNED(sg->length, sizeof(u32)))) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 583 len = sg->length;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 584 sg->length = ALIGN(sg->length,
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 585 sizeof(u32));
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 586 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 587 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 588 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 589
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 590 rctx->dma_ct = dma_map_sg(hdev->dev, sg, 1,
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 591 DMA_TO_DEVICE);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 592 if (rctx->dma_ct == 0) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 593 dev_err(hdev->dev, "dma_map_sg error\n");
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 594 return -ENOMEM;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 595 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 596
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 597 err = stm32_hash_xmit_dma(hdev, sg, len,
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 598 !sg_is_last(sg));
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 599
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 600 dma_unmap_sg(hdev->dev, sg, 1, DMA_TO_DEVICE);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 601
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 602 if (err == -ENOMEM)
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 603 return err;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 604 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 605
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 606 if (hdev->dma_mode == 1) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 607 if (stm32_hash_wait_busy(hdev))
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 608 return -ETIMEDOUT;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 609 reg = stm32_hash_read(hdev, HASH_CR);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 610 reg &= ~HASH_CR_DMAE;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 611 reg |= HASH_CR_DMAA;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 612 stm32_hash_write(hdev, HASH_CR, reg);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 613
532f419cde077f Arnd Bergmann 2017-09-12 614 if (ncp) {
532f419cde077f Arnd Bergmann 2017-09-12 615 memset(buffer + ncp, 0,
532f419cde077f Arnd Bergmann 2017-09-12 616 DIV_ROUND_UP(ncp, sizeof(u32)) - ncp);
532f419cde077f Arnd Bergmann 2017-09-12 @617 writesl(hdev->io_base + HASH_DIN, buffer,
532f419cde077f Arnd Bergmann 2017-09-12 618 DIV_ROUND_UP(ncp, sizeof(u32)));
532f419cde077f Arnd Bergmann 2017-09-12 619 }
d03d29bd1857b2 Lionel Debieve 2018-01-29 620 stm32_hash_set_nblw(hdev, ncp);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 621 reg = stm32_hash_read(hdev, HASH_STR);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 622 reg |= HASH_STR_DCAL;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 623 stm32_hash_write(hdev, HASH_STR, reg);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 624 err = -EINPROGRESS;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 625 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 626
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 627 if (hdev->flags & HASH_FLAGS_HMAC) {
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 628 if (stm32_hash_wait_busy(hdev))
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 629 return -ETIMEDOUT;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 630 err = stm32_hash_hmac_dma_send(hdev);
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 631 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 632
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 633 return err;
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 634 }
8a1012d3f2abce lionel.debieve@st.com 2017-07-13 635
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 38181 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-08-26 20:10 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-25 11:21 [PATCH 0/2] crypto: stm32 - Add support of COMPILE_TEST Cai Huoqing
2021-08-25 11:21 ` [PATCH 1/2] " Cai Huoqing
2021-08-25 11:21 ` [PATCH 2/2] crypto: stm32 - open the configuration for COMPILE_TEST Cai Huoqing
2021-08-26 20:07 ` kernel test robot
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).