[PATCH v3 0/4] Add RZ/G2L OSTM support

[PATCH v3 0/4] Add RZ/G2L OSTM support

[Biju Das]

This patch series aims to add Generic Timer Module (a.k.a OSTM) support
for RZ/G2L series.

OSTM modules needs to deassert the reset line before accessing
any registers.

v2->v3:
 * Added Geert's Rb tag
 * Make RENESAS_OSTM symbol visible.
 * Added reset_control_put() on error path.
 * enabled suppress_bind_attrs in ostm_device_driver structure
v1->v2:
 * Added of_reset_control_get_optional_exclusive API
 * Updated dt-bindings to use renesas,ostm
 * Added reset handling in ostm_init

Biju Das (4):
  reset: Add of_reset_control_get_optional_exclusive()
  dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2L OSTM
  clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support
  clocksource/drivers/renesas,ostm: Make RENESAS_OSTM symbol visible

 .../bindings/timer/renesas,ostm.yaml          | 20 ++++++++--
 drivers/clocksource/Kconfig                   |  3 +-
 drivers/clocksource/renesas-ostm.c            | 39 ++++++++++++++++++-
 include/linux/reset.h                         | 20 ++++++++++
 4 files changed, 77 insertions(+), 5 deletions(-)

-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v3 2/4] dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2L OSTM

[Biju Das]

Document the General Timer Module(a.k.a OSTM) found on the RZ/G2L SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
V2->v3:
 * Added Geert's Rb tag.
v1->v2:
 * Use renesas,ostm instead od rzg2l-ostm
---
 .../bindings/timer/renesas,ostm.yaml          | 20 ++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
index 600d47ab7d58..7fa7f977b44c 100644
--- a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
+++ b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml
@@ -21,9 +21,10 @@ properties:
   compatible:
     items:
       - enum:
-          - renesas,r7s72100-ostm # RZ/A1H
-          - renesas,r7s9210-ostm  # RZ/A2M
-      - const: renesas,ostm       # Generic
+          - renesas,r7s72100-ostm  # RZ/A1H
+          - renesas,r7s9210-ostm   # RZ/A2M
+          - renesas,r9a07g044-ostm # RZ/G2{L,LC}
+      - const: renesas,ostm        # Generic
 
   reg:
     maxItems: 1
@@ -37,6 +38,9 @@ properties:
   power-domains:
     maxItems: 1
 
+  resets:
+    maxItems: 1
+
 required:
   - compatible
   - reg
@@ -44,6 +48,16 @@ required:
   - clocks
   - power-domains
 
+if:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - renesas,r9a07g044-ostm
+then:
+  required:
+    - resets
+
 additionalProperties: false
 
 examples:
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Biju Das]

RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
deassert the reset line before accessing any registers.

This patch adds an entry point for RZ/G2L so that we can deassert
the reset line in probe callback.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v2->v3:
 * Added reset_control_put() on error path.
 * enabled suppress_bind_attrs in ostm_device_driver structure
v1->v2:
 * Added reset handling inside ostm_init
 * Used same compatible for builtin driver aswell
---
 drivers/clocksource/renesas-ostm.c | 39 +++++++++++++++++++++++++++++-
 1 file changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
index 3d06ba66008c..21d1392637b8 100644
--- a/drivers/clocksource/renesas-ostm.c
+++ b/drivers/clocksource/renesas-ostm.c
@@ -9,6 +9,8 @@
 #include <linux/clk.h>
 #include <linux/clockchips.h>
 #include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
 #include <linux/sched_clock.h>
 #include <linux/slab.h>
 
@@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of *to)
 
 static int __init ostm_init(struct device_node *np)
 {
+	struct reset_control *rstc;
 	struct timer_of *to;
 	int ret;
 
@@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np)
 	if (!to)
 		return -ENOMEM;
 
+	rstc = of_reset_control_get_optional_exclusive(np, NULL);
+	if (IS_ERR(rstc)) {
+		ret = PTR_ERR(rstc);
+		goto err_free;
+	}
+
+	reset_control_deassert(rstc);
+
 	to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
 	if (system_clock) {
 		/*
@@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node *np)
 
 	ret = timer_of_init(np, to);
 	if (ret)
-		goto err_free;
+		goto err_reset;
 
 	/*
 	 * First probed device will be used as system clocksource. Any
@@ -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np)
 
 err_cleanup:
 	timer_of_cleanup(to);
+err_reset:
+	reset_control_assert(rstc);
+	reset_control_put(rstc);
 err_free:
 	kfree(to);
 	return ret;
 }
 
 TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
+
+#ifdef CONFIG_ARCH_R9A07G044
+static int __init ostm_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+
+	return ostm_init(dev->of_node);
+}
+
+static const struct of_device_id ostm_of_table[] = {
+	{ .compatible = "renesas,ostm", },
+	{ /* sentinel */ }
+};
+
+static struct platform_driver ostm_device_driver = {
+	.driver = {
+		.name = "renesas_ostm",
+		.of_match_table = of_match_ptr(ostm_of_table),
+		.suppress_bind_attrs = true,
+	},
+};
+builtin_platform_driver_probe(ostm_device_driver, ostm_probe);
+#endif
-- 
2.17.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Geert Uytterhoeven]

On Fri, Nov 12, 2021 at 7:44 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> deassert the reset line before accessing any registers.
>
> This patch adds an entry point for RZ/G2L so that we can deassert
> the reset line in probe callback.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v2->v3:
>  * Added reset_control_put() on error path.
>  * enabled suppress_bind_attrs in ostm_device_driver structure

Thanks for the update!

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 2/4] dt-bindings: timer: renesas: ostm: Document Renesas RZ/G2L OSTM

[Rob Herring]

On Fri, 12 Nov 2021 18:44:11 +0000, Biju Das wrote:
> Document the General Timer Module(a.k.a OSTM) found on the RZ/G2L SoC.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> V2->v3:
>  * Added Geert's Rb tag.
> v1->v2:
>  * Use renesas,ostm instead od rzg2l-ostm
> ---
>  .../bindings/timer/renesas,ostm.yaml          | 20 ++++++++++++++++---
>  1 file changed, 17 insertions(+), 3 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Daniel Lezcano]

On 12/11/2021 19:44, Biju Das wrote:
> RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> deassert the reset line before accessing any registers.
> 
> This patch adds an entry point for RZ/G2L so that we can deassert
> the reset line in probe callback.

What is the connection between adding the reset line control and the
platform driver at the end of the driver ?

> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v2->v3:
>  * Added reset_control_put() on error path.
>  * enabled suppress_bind_attrs in ostm_device_driver structure
> v1->v2:
>  * Added reset handling inside ostm_init
>  * Used same compatible for builtin driver aswell
> ---
>  drivers/clocksource/renesas-ostm.c | 39 +++++++++++++++++++++++++++++-
>  1 file changed, 38 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clocksource/renesas-ostm.c b/drivers/clocksource/renesas-ostm.c
> index 3d06ba66008c..21d1392637b8 100644
> --- a/drivers/clocksource/renesas-ostm.c
> +++ b/drivers/clocksource/renesas-ostm.c
> @@ -9,6 +9,8 @@
>  #include <linux/clk.h>
>  #include <linux/clockchips.h>
>  #include <linux/interrupt.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
>  #include <linux/sched_clock.h>
>  #include <linux/slab.h>
>  
> @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of *to)
>  
>  static int __init ostm_init(struct device_node *np)
>  {
> +	struct reset_control *rstc;
>  	struct timer_of *to;
>  	int ret;
>  
> @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np)
>  	if (!to)
>  		return -ENOMEM;
>  
> +	rstc = of_reset_control_get_optional_exclusive(np, NULL);
> +	if (IS_ERR(rstc)) {
> +		ret = PTR_ERR(rstc);
> +		goto err_free;
> +	}
> +
> +	reset_control_deassert(rstc);
> +
>  	to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
>  	if (system_clock) {
>  		/*
> @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node *np)
>  
>  	ret = timer_of_init(np, to);
>  	if (ret)
> -		goto err_free;
> +		goto err_reset;
>  
>  	/*
>  	 * First probed device will be used as system clocksource. Any
> @@ -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np)
>  
>  err_cleanup:
>  	timer_of_cleanup(to);
> +err_reset:
> +	reset_control_assert(rstc);
> +	reset_control_put(rstc);
>  err_free:
>  	kfree(to);
>  	return ret;
>  }
>  
>  TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> +
> +#ifdef CONFIG_ARCH_R9A07G044
> +static int __init ostm_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +
> +	return ostm_init(dev->of_node);
> +}
> +
> +static const struct of_device_id ostm_of_table[] = {
> +	{ .compatible = "renesas,ostm", },
> +	{ /* sentinel */ }
> +};
> +
> +static struct platform_driver ostm_device_driver = {
> +	.driver = {
> +		.name = "renesas_ostm",
> +		.of_match_table = of_match_ptr(ostm_of_table),
> +		.suppress_bind_attrs = true,
> +	},
> +};
> +builtin_platform_driver_probe(ostm_device_driver, ostm_probe);
> +#endif
> 


-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

RE: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Biju Das]

Hi Daniel Lezcano,

Thanks for the feedback.

> Subject: Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L
> OSTM support
> 
> On 12/11/2021 19:44, Biju Das wrote:
> > RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> > deassert the reset line before accessing any registers.
> >
> > This patch adds an entry point for RZ/G2L so that we can deassert the
> > reset line in probe callback.
> 
> What is the connection between adding the reset line control and the
> platform driver at the end of the driver ?

The original driver has no arm architecture timer, so it needs to be
called very early in the boot and using of calls for handling the clocks.

Where as RZ/G2L has arm architecture timer and it needs to release the module
Reset before accessing any registers. So it has to be built in and it needs cpg driver
which happens at later stage compared to the original case, for de-asserting the reset.

Geert, please correct me if I am wrong.

Regards,
Biju

> 
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v2->v3:
> >  * Added reset_control_put() on error path.
> >  * enabled suppress_bind_attrs in ostm_device_driver structure
> > v1->v2:
> >  * Added reset handling inside ostm_init
> >  * Used same compatible for builtin driver aswell
> > ---
> >  drivers/clocksource/renesas-ostm.c | 39
> > +++++++++++++++++++++++++++++-
> >  1 file changed, 38 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clocksource/renesas-ostm.c
> > b/drivers/clocksource/renesas-ostm.c
> > index 3d06ba66008c..21d1392637b8 100644
> > --- a/drivers/clocksource/renesas-ostm.c
> > +++ b/drivers/clocksource/renesas-ostm.c
> > @@ -9,6 +9,8 @@
> >  #include <linux/clk.h>
> >  #include <linux/clockchips.h>
> >  #include <linux/interrupt.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset.h>
> >  #include <linux/sched_clock.h>
> >  #include <linux/slab.h>
> >
> > @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of
> > *to)
> >
> >  static int __init ostm_init(struct device_node *np)  {
> > +	struct reset_control *rstc;
> >  	struct timer_of *to;
> >  	int ret;
> >
> > @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np)
> >  	if (!to)
> >  		return -ENOMEM;
> >
> > +	rstc = of_reset_control_get_optional_exclusive(np, NULL);
> > +	if (IS_ERR(rstc)) {
> > +		ret = PTR_ERR(rstc);
> > +		goto err_free;
> > +	}
> > +
> > +	reset_control_deassert(rstc);
> > +
> >  	to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
> >  	if (system_clock) {
> >  		/*
> > @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node
> > *np)
> >
> >  	ret = timer_of_init(np, to);
> >  	if (ret)
> > -		goto err_free;
> > +		goto err_reset;
> >
> >  	/*
> >  	 * First probed device will be used as system clocksource. Any @@
> > -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np)
> >
> >  err_cleanup:
> >  	timer_of_cleanup(to);
> > +err_reset:
> > +	reset_control_assert(rstc);
> > +	reset_control_put(rstc);
> >  err_free:
> >  	kfree(to);
> >  	return ret;
> >  }
> >
> >  TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> > +
> > +#ifdef CONFIG_ARCH_R9A07G044
> > +static int __init ostm_probe(struct platform_device *pdev) {
> > +	struct device *dev = &pdev->dev;
> > +
> > +	return ostm_init(dev->of_node);
> > +}
> > +
> > +static const struct of_device_id ostm_of_table[] = {
> > +	{ .compatible = "renesas,ostm", },
> > +	{ /* sentinel */ }
> > +};
> > +
> > +static struct platform_driver ostm_device_driver = {
> > +	.driver = {
> > +		.name = "renesas_ostm",
> > +		.of_match_table = of_match_ptr(ostm_of_table),
> > +		.suppress_bind_attrs = true,
> > +	},
> > +};
> > +builtin_platform_driver_probe(ostm_device_driver, ostm_probe); #endif
> >
> 
> 
> --
> <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.lina
> ro.org%2F&amp;data=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C6a3a066ec7b040
> b4676208d9b31e1c26%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C6377377641
> 83838352%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT
> iI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=HqvzD3lqCDlhyh1cQfu5Asa09jz6TJ6
> vLWYBNtQU6iA%3D&amp;reserved=0> Linaro.org │ Open source software for ARM
> SoCs
> 
> Follow Linaro:
> <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.face
> book.com%2Fpages%2FLinaro&amp;data=04%7C01%7Cbiju.das.jz%40bp.renesas.com%
> 7C6a3a066ec7b040b4676208d9b31e1c26%7C53d82571da1947e49cb4625a166a4a2a%7C0%
> 7C0%7C637737764183838352%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQI
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=Q89%2BeIzRBrUF8
> PM1yOmQJGdg0gv1BDZLkHsEQIsQTq8%3D&amp;reserved=0> Facebook |
> <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Ftwitter.
> com%2F%23!%2Flinaroorg&amp;data=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C6
> a3a066ec7b040b4676208d9b31e1c26%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0
> %7C637737764183838352%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoi
> V2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=2FNqNGFpFA%2BHrAxj
> mtbsStWmK5Y7T87F0MzHn8uQoK4%3D&amp;reserved=0> Twitter |
> <https://jpn01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.lina
> ro.org%2Flinaro-
> blog%2F&amp;data=04%7C01%7Cbiju.das.jz%40bp.renesas.com%7C6a3a066ec7b040b4
> 676208d9b31e1c26%7C53d82571da1947e49cb4625a166a4a2a%7C0%7C0%7C637737764183
> 838352%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI
> 6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=Qd0urMYGtY2UBxYyQwhwLYgwB%2FZjpoA
> %2F9weINf%2FVIMY%3D&amp;reserved=0> Blog

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Geert Uytterhoeven]

Hi Biju, Daniel,

On Mon, Nov 29, 2021 at 11:06 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L
> > OSTM support
> >
> > On 12/11/2021 19:44, Biju Das wrote:
> > > RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> > > deassert the reset line before accessing any registers.
> > >
> > > This patch adds an entry point for RZ/G2L so that we can deassert the
> > > reset line in probe callback.
> >
> > What is the connection between adding the reset line control and the
> > platform driver at the end of the driver ?
>
> The original driver has no arm architecture timer, so it needs to be

s/driver/SoC used with this driver/

> called very early in the boot and using of calls for handling the clocks.

Hence must be handled by TIMER_OF_DECLARE().

> Where as RZ/G2L has arm architecture timer and it needs to release the module
> Reset before accessing any registers. So it has to be built in and it needs cpg driver
> which happens at later stage compared to the original case, for de-asserting the reset.
>
> Geert, please correct me if I am wrong.

The reset driver is not available yet at TIMER_OF_DECLARE() time,
so of_reset_control_get_optional_exclusive() returns -EPROBE_DEFER
on RZ/G2L.  Fortunately there is no need to have this timer available
early on RZ/G2L, as it uses the arm architecture timer as the main
clock source.  Still, to be available at all, the platform driver
is needed to support re-probing after the reset driver has become
available.


> > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > v2->v3:
> > >  * Added reset_control_put() on error path.
> > >  * enabled suppress_bind_attrs in ostm_device_driver structure
> > > v1->v2:
> > >  * Added reset handling inside ostm_init
> > >  * Used same compatible for builtin driver aswell
> > > ---
> > >  drivers/clocksource/renesas-ostm.c | 39
> > > +++++++++++++++++++++++++++++-
> > >  1 file changed, 38 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clocksource/renesas-ostm.c
> > > b/drivers/clocksource/renesas-ostm.c
> > > index 3d06ba66008c..21d1392637b8 100644
> > > --- a/drivers/clocksource/renesas-ostm.c
> > > +++ b/drivers/clocksource/renesas-ostm.c
> > > @@ -9,6 +9,8 @@
> > >  #include <linux/clk.h>
> > >  #include <linux/clockchips.h>
> > >  #include <linux/interrupt.h>
> > > +#include <linux/platform_device.h>
> > > +#include <linux/reset.h>
> > >  #include <linux/sched_clock.h>
> > >  #include <linux/slab.h>
> > >
> > > @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct timer_of
> > > *to)
> > >
> > >  static int __init ostm_init(struct device_node *np)  {
> > > +   struct reset_control *rstc;
> > >     struct timer_of *to;
> > >     int ret;
> > >
> > > @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node *np)
> > >     if (!to)
> > >             return -ENOMEM;
> > >
> > > +   rstc = of_reset_control_get_optional_exclusive(np, NULL);
> > > +   if (IS_ERR(rstc)) {
> > > +           ret = PTR_ERR(rstc);
> > > +           goto err_free;
> > > +   }
> > > +
> > > +   reset_control_deassert(rstc);
> > > +
> > >     to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
> > >     if (system_clock) {
> > >             /*
> > > @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node
> > > *np)
> > >
> > >     ret = timer_of_init(np, to);
> > >     if (ret)
> > > -           goto err_free;
> > > +           goto err_reset;
> > >
> > >     /*
> > >      * First probed device will be used as system clocksource. Any @@
> > > -203,9 +214,35 @@ static int __init ostm_init(struct device_node *np)
> > >
> > >  err_cleanup:
> > >     timer_of_cleanup(to);
> > > +err_reset:
> > > +   reset_control_assert(rstc);
> > > +   reset_control_put(rstc);
> > >  err_free:
> > >     kfree(to);
> > >     return ret;
> > >  }
> > >
> > >  TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> > > +
> > > +#ifdef CONFIG_ARCH_R9A07G044
> > > +static int __init ostm_probe(struct platform_device *pdev) {
> > > +   struct device *dev = &pdev->dev;
> > > +
> > > +   return ostm_init(dev->of_node);
> > > +}
> > > +
> > > +static const struct of_device_id ostm_of_table[] = {
> > > +   { .compatible = "renesas,ostm", },
> > > +   { /* sentinel */ }
> > > +};
> > > +
> > > +static struct platform_driver ostm_device_driver = {
> > > +   .driver = {
> > > +           .name = "renesas_ostm",
> > > +           .of_match_table = of_match_ptr(ostm_of_table),
> > > +           .suppress_bind_attrs = true,
> > > +   },
> > > +};
> > > +builtin_platform_driver_probe(ostm_device_driver, ostm_probe); #endif

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

RE: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Biju Das]

Hi All,

Gentle ping.

Are we happy with this patch? Please let me know.

As mentioned in [1], it has dependency on reset patch

[1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20211112184413.4391-2-biju.das.jz@bp.renesas.com/

Regards,
Biju

> Subject: Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L
> OSTM support
> 
> Hi Biju, Daniel,
> 
> On Mon, Nov 29, 2021 at 11:06 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > > Subject: Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add
> > > RZ/G2L OSTM support
> > >
> > > On 12/11/2021 19:44, Biju Das wrote:
> > > > RZ/G2L SoC has Generic Timer Module(a.k.a OSTM) which needs to
> > > > deassert the reset line before accessing any registers.
> > > >
> > > > This patch adds an entry point for RZ/G2L so that we can deassert
> > > > the reset line in probe callback.
> > >
> > > What is the connection between adding the reset line control and the
> > > platform driver at the end of the driver ?
> >
> > The original driver has no arm architecture timer, so it needs to be
> 
> s/driver/SoC used with this driver/
> 
> > called very early in the boot and using of calls for handling the
> clocks.
> 
> Hence must be handled by TIMER_OF_DECLARE().
> 
> > Where as RZ/G2L has arm architecture timer and it needs to release the
> > module Reset before accessing any registers. So it has to be built in
> > and it needs cpg driver which happens at later stage compared to the
> original case, for de-asserting the reset.
> >
> > Geert, please correct me if I am wrong.
> 
> The reset driver is not available yet at TIMER_OF_DECLARE() time, so
> of_reset_control_get_optional_exclusive() returns -EPROBE_DEFER on RZ/G2L.
> Fortunately there is no need to have this timer available early on RZ/G2L,
> as it uses the arm architecture timer as the main clock source.  Still, to
> be available at all, the platform driver is needed to support re-probing
> after the reset driver has become available.
> 
> 
> > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > > > Reviewed-by: Lad Prabhakar
> > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > ---
> > > > v2->v3:
> > > >  * Added reset_control_put() on error path.
> > > >  * enabled suppress_bind_attrs in ostm_device_driver structure
> > > > v1->v2:
> > > >  * Added reset handling inside ostm_init
> > > >  * Used same compatible for builtin driver aswell
> > > > ---
> > > >  drivers/clocksource/renesas-ostm.c | 39
> > > > +++++++++++++++++++++++++++++-
> > > >  1 file changed, 38 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/clocksource/renesas-ostm.c
> > > > b/drivers/clocksource/renesas-ostm.c
> > > > index 3d06ba66008c..21d1392637b8 100644
> > > > --- a/drivers/clocksource/renesas-ostm.c
> > > > +++ b/drivers/clocksource/renesas-ostm.c
> > > > @@ -9,6 +9,8 @@
> > > >  #include <linux/clk.h>
> > > >  #include <linux/clockchips.h>
> > > >  #include <linux/interrupt.h>
> > > > +#include <linux/platform_device.h> #include <linux/reset.h>
> > > >  #include <linux/sched_clock.h>
> > > >  #include <linux/slab.h>
> > > >
> > > > @@ -159,6 +161,7 @@ static int __init ostm_init_clkevt(struct
> > > > timer_of
> > > > *to)
> > > >
> > > >  static int __init ostm_init(struct device_node *np)  {
> > > > +   struct reset_control *rstc;
> > > >     struct timer_of *to;
> > > >     int ret;
> > > >
> > > > @@ -166,6 +169,14 @@ static int __init ostm_init(struct device_node
> *np)
> > > >     if (!to)
> > > >             return -ENOMEM;
> > > >
> > > > +   rstc = of_reset_control_get_optional_exclusive(np, NULL);
> > > > +   if (IS_ERR(rstc)) {
> > > > +           ret = PTR_ERR(rstc);
> > > > +           goto err_free;
> > > > +   }
> > > > +
> > > > +   reset_control_deassert(rstc);
> > > > +
> > > >     to->flags = TIMER_OF_BASE | TIMER_OF_CLOCK;
> > > >     if (system_clock) {
> > > >             /*
> > > > @@ -178,7 +189,7 @@ static int __init ostm_init(struct device_node
> > > > *np)
> > > >
> > > >     ret = timer_of_init(np, to);
> > > >     if (ret)
> > > > -           goto err_free;
> > > > +           goto err_reset;
> > > >
> > > >     /*
> > > >      * First probed device will be used as system clocksource. Any
> > > > @@
> > > > -203,9 +214,35 @@ static int __init ostm_init(struct device_node
> > > > *np)
> > > >
> > > >  err_cleanup:
> > > >     timer_of_cleanup(to);
> > > > +err_reset:
> > > > +   reset_control_assert(rstc);
> > > > +   reset_control_put(rstc);
> > > >  err_free:
> > > >     kfree(to);
> > > >     return ret;
> > > >  }
> > > >
> > > >  TIMER_OF_DECLARE(ostm, "renesas,ostm", ostm_init);
> > > > +
> > > > +#ifdef CONFIG_ARCH_R9A07G044
> > > > +static int __init ostm_probe(struct platform_device *pdev) {
> > > > +   struct device *dev = &pdev->dev;
> > > > +
> > > > +   return ostm_init(dev->of_node); }
> > > > +
> > > > +static const struct of_device_id ostm_of_table[] = {
> > > > +   { .compatible = "renesas,ostm", },
> > > > +   { /* sentinel */ }
> > > > +};
> > > > +
> > > > +static struct platform_driver ostm_device_driver = {
> > > > +   .driver = {
> > > > +           .name = "renesas_ostm",
> > > > +           .of_match_table = of_match_ptr(ostm_of_table),
> > > > +           .suppress_bind_attrs = true,
> > > > +   },
> > > > +};
> > > > +builtin_platform_driver_probe(ostm_device_driver, ostm_probe);
> > > > +#endif
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-
> m68k.org
> 
> In personal conversations with technical people, I call myself a hacker.
> But when I'm talking to journalists I just say "programmer" or something
> like that.
>                                 -- Linus Torvalds
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v3 3/4] clocksource/drivers/renesas-ostm: Add RZ/G2L OSTM support

[Daniel Lezcano]

On 07/12/2021 14:32, Biju Das wrote:
> Hi All,
> 
> Gentle ping.
> 
> Are we happy with this patch? Please let me know.
> 
> As mentioned in [1], it has dependency on reset patch
> 
> [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20211112184413.4391-2-biju.das.jz@bp.renesas.com/

I've merged the immutable branch and the three remaining patches.

They will appear in linux-next tomorrow.

Thanks

  -- Daniel



-- 
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel