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From: Li Yang <leoyang.li@nxp.com>
To: Shawn Guo <shawnguo@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: Pankaj Bansal <pankaj.bansal@nxp.com>, Li Yang <leoyang.li@nxp.com>
Subject: [PATCH v2 04/10] arm64: dts: lx2160a-qds: Add mdio mux nodes
Date: Fri,  3 Dec 2021 17:54:40 -0600	[thread overview]
Message-ID: <20211203235446.8266-5-leoyang.li@nxp.com> (raw)
In-Reply-To: <20211203235446.8266-1-leoyang.li@nxp.com>

From: Pankaj Bansal <pankaj.bansal@nxp.com>

The two external MDIO buses used to communicate with phy devices that
are external to SOC are muxed in LX2160AQDS board.  These buses can be
routed to any one of the eight IO slots on LX2160AQDS board depending on
value in fpga register 0x54.  Additionally the external MDIO1 is used to
communicate to the onboard RGMII phy devices.  The mdio1 is controlled
by bits 4-7 of fpga register and mdio2 is controlled by bits 4-7 of fpga
register.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
---
 .../boot/dts/freescale/fsl-lx2160a-qds.dts    | 145 ++++++++++++++++++
 1 file changed, 145 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 8354af0b31e3..2ecfa90f5e28 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -31,6 +31,130 @@ sb_3v3: regulator-sb3v3 {
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	mdio-mux-1 {
+		compatible = "mdio-mux-multiplexer";
+		mux-controls = <&mux 0>;
+		mdio-parent-bus = <&emdio1>;
+		#address-cells=<1>;
+		#size-cells = <0>;
+
+		mdio@0 { /* On-board PHY #1 RGMI1*/
+			reg = <0x00>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@8 { /* On-board PHY #2 RGMI2*/
+			reg = <0x8>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@18 { /* Slot #1 */
+			reg = <0x18>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@19 { /* Slot #2 */
+			reg = <0x19>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1a { /* Slot #3 */
+			reg = <0x1a>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1b { /* Slot #4 */
+			reg = <0x1b>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1c { /* Slot #5 */
+			reg = <0x1c>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1d { /* Slot #6 */
+			reg = <0x1d>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1e { /* Slot #7 */
+			reg = <0x1e>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1f { /* Slot #8 */
+			reg = <0x1f>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	mdio-mux-2 {
+		compatible = "mdio-mux-multiplexer";
+		mux-controls = <&mux 1>;
+		mdio-parent-bus = <&emdio2>;
+		#address-cells=<1>;
+		#size-cells = <0>;
+
+		mdio@0 { /* Slot #1 (secondary EMI) */
+			reg = <0x00>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@1 { /* Slot #2 (secondary EMI) */
+			reg = <0x01>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@2 { /* Slot #3 (secondary EMI) */
+			reg = <0x02>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@3 { /* Slot #4 (secondary EMI) */
+			reg = <0x03>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@4 { /* Slot #5 (secondary EMI) */
+			reg = <0x04>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@5 { /* Slot #6 (secondary EMI) */
+			reg = <0x05>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@6 { /* Slot #7 (secondary EMI) */
+			reg = <0x06>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mdio@7 { /* Slot #8 (secondary EMI) */
+			reg = <0x07>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
 };
 
 &can0 {
@@ -81,6 +205,14 @@ dflash2: flash@0 {
 	};
 };
 
+&emdio1 {
+	status = "okay";
+};
+
+&emdio2 {
+	status = "okay";
+};
+
 &esdhc0 {
 	status = "okay";
 };
@@ -107,6 +239,19 @@ mt35xu512aba0: flash@0 {
 &i2c0 {
 	status = "okay";
 
+	fpga@66 {
+		compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
+			     "simple-mfd";
+		reg = <0x66>;
+
+		mux: mux-controller {
+			compatible = "reg-mux";
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
+					<0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
+		};
+	};
+
 	i2c-mux@77 {
 		compatible = "nxp,pca9547";
 		reg = <0x77>;
-- 
2.25.1


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  parent reply	other threads:[~2021-12-03 23:57 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-03 23:54 [PATCH v2 00/10] lx216x DTS updates Li Yang
2021-12-03 23:54 ` [PATCH v2 01/10] arm64: dts: lx2160a: fix scl-gpios property name Li Yang
2021-12-14  5:33   ` Shawn Guo
2021-12-03 23:54 ` [PATCH v2 02/10] arm64: dts: lx2160a-rdb: Add Inphi PHY node Li Yang
2021-12-03 23:54 ` [PATCH v2 03/10] arm64: dts: lx2160a: add optee-tz node Li Yang
2021-12-03 23:54 ` Li Yang [this message]
2021-12-03 23:54 ` [PATCH v2 05/10] arm64: dts: lx2160a: update PCIe nodes to match rev2 silicon Li Yang
2021-12-14  5:39   ` Shawn Guo
2021-12-14  6:14     ` Leo Li
2021-12-03 23:54 ` [PATCH v2 06/10] arm64: dts: lx2160a: add pcie EP mode nodes Li Yang
2021-12-14  5:40   ` Shawn Guo
2021-12-03 23:54 ` [PATCH v2 07/10] arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes Li Yang
2021-12-03 23:54 ` [PATCH v2 08/10] arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes Li Yang
2021-12-03 23:54 ` [PATCH v2 09/10] arm64: dts: lx2162a-qds: add interrupt line for RTC node Li Yang
2021-12-03 23:54 ` [PATCH v2 10/10] arm64: dts: lx2162a-qds: enable CAN nodes Li Yang
2021-12-06  5:58   ` Kuldeep Singh

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