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From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	<wim@linux-watchdog.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	"Nathan Chancellor" <nathan@kernel.org>,
	Nick Desaulniers <ndesaulniers@google.com>,
	"Nancy . Lin" <nancy.lin@mediatek.com>,
	"jason-jh . lin" <jason-jh.lin@mediatek.com>,
	Yongqiang Niu <yongqiang.niu@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	 <dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
	<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v15 09/22] soc: mediatek: add mtk-mutex support for mt8195 vdosys1
Date: Fri, 11 Mar 2022 09:54:53 +0800	[thread overview]
Message-ID: <20220311015506.11232-10-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220311015506.11232-1-nancy.lin@mediatek.com>

Add mtk-mutex support for mt8195 vdosys1.
The vdosys1 path component contains ovl_adaptor, merge5,
and dp_intf1. Ovl_adaptor is composed of several sub-elements.

Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/soc/mediatek/mtk-mutex.c | 54 ++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
index cb791671d751..70e6043e99df 100644
--- a/drivers/soc/mediatek/mtk-mutex.c
+++ b/drivers/soc/mediatek/mtk-mutex.c
@@ -129,6 +129,35 @@
 #define MT8195_MUTEX_MOD_DISP_PWM0		BIT(27)
 #define MT8195_MUTEX_MOD_DISP_PWM1		BIT(28)
 
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0	BIT(0)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1	BIT(1)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2	BIT(2)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3	BIT(3)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4	BIT(4)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5	BIT(5)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6	BIT(6)
+#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7	BIT(7)
+#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0	BIT(8)
+#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1	BIT(9)
+#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2	BIT(10)
+#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3	BIT(11)
+#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4	BIT(12)
+#define MT8195_MUTEX_MOD_DISP1_VPP2_DL_RELAY	BIT(13)
+#define MT8195_MUTEX_MOD_DISP1_VPP3_DL_RELAY	BIT(14)
+#define MT8195_MUTEX_MOD_DISP1_VDO0_DSC_DL_ASYNC	BIT(15)
+#define MT8195_MUTEX_MOD_DISP1_VDO0_MERGE_DL_ASYNC	BIT(16)
+#define MT8195_MUTEX_MOD_DISP1_VDO1_OUT_DL_RELAY	BIT(17)
+#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER	BIT(18)
+#define MT8195_MUTEX_MOD_DISP1_HDR_VDO_FE0	BIT(19)
+#define MT8195_MUTEX_MOD_DISP1_HDR_VDO_FE1	BIT(20)
+#define MT8195_MUTEX_MOD_DISP1_HDR_GFX_FE0	BIT(21)
+#define MT8195_MUTEX_MOD_DISP1_HDR_GFX_FE1	BIT(22)
+#define MT8195_MUTEX_MOD_DISP1_HDR_VDO_BE0	BIT(23)
+#define MT8195_MUTEX_MOD_DISP1_HDR_MLOAD	BIT(24)
+#define MT8195_MUTEX_MOD_DISP1_DPI0		BIT(25)
+#define MT8195_MUTEX_MOD_DISP1_DPI1		BIT(26)
+#define MT8195_MUTEX_MOD_DISP1_DP_INTF0		BIT(27)
+
 #define MT2712_MUTEX_MOD_DISP_PWM2		BIT(10)
 #define MT2712_MUTEX_MOD_DISP_OVL0		BIT(11)
 #define MT2712_MUTEX_MOD_DISP_OVL1		BIT(12)
@@ -332,6 +361,27 @@ static const u64 mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
 	[DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0,
 	[DDP_COMPONENT_PWM0] = MT8195_MUTEX_MOD_DISP_PWM0,
 	[DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0,
+	[DDP_COMPONENT_OVL_ADAPTOR] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA0 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA1 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA2 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA3 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA4 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA5 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA6 |
+				      MT8195_MUTEX_MOD_DISP1_MDP_RDMA7 |
+				      MT8195_MUTEX_MOD_DISP1_VPP_MERGE0 |
+				      MT8195_MUTEX_MOD_DISP1_VPP_MERGE1 |
+				      MT8195_MUTEX_MOD_DISP1_VPP_MERGE2 |
+				      MT8195_MUTEX_MOD_DISP1_VPP_MERGE3 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_VDO_FE0 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_VDO_FE1 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_GFX_FE0 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_GFX_FE1 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_VDO_BE0 |
+				      MT8195_MUTEX_MOD_DISP1_HDR_MLOAD |
+				      MT8195_MUTEX_MOD_DISP1_DISP_MIXER,
+	[DDP_COMPONENT_MERGE5] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE4,
+	[DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0,
 };
 
 static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = {
@@ -517,6 +567,9 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex,
 	case DDP_COMPONENT_DP_INTF0:
 		sof_id = MUTEX_SOF_DP_INTF0;
 		break;
+	case DDP_COMPONENT_DP_INTF1:
+		sof_id = MUTEX_SOF_DP_INTF1;
+		break;
 	default:
 		if (mtx->data->mutex_mod[id] <= BIT(31)) {
 			offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg,
@@ -557,6 +610,7 @@ void mtk_mutex_remove_comp(struct mtk_mutex *mutex,
 	case DDP_COMPONENT_DPI0:
 	case DDP_COMPONENT_DPI1:
 	case DDP_COMPONENT_DP_INTF0:
+	case DDP_COMPONENT_DP_INTF1:
 		writel_relaxed(MUTEX_SOF_SINGLE_MODE,
 			       mtx->regs +
 			       DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg,
-- 
2.18.0


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  parent reply	other threads:[~2022-03-11  2:09 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-11  1:54 [PATCH v15 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 01/22] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2022-03-11  9:31   ` AngeloGioacchino Del Regno
2022-03-11  1:54 ` [PATCH v15 02/22] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 03/22] dt-bindings: mediatek: add ethdr definition for mt8195 Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 04/22] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2022-03-17 13:01   ` Rex-BC Chen
2022-03-11  1:54 ` [PATCH v15 05/22] soc: mediatek: add mtk-mmsys config API " Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 06/22] soc: mediatek: add cmdq support of " Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 07/22] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 08/22] soc: mediatek: change the mutex defines and the mutex_mod type Nancy.Lin
2022-03-11  1:54 ` Nancy.Lin [this message]
2022-03-11  1:54 ` [PATCH v15 10/22] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 11/22] drm/mediatek: add display merge advance config API " Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 12/22] drm/mediatek: add display merge start/stop API for cmdq support Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 13/22] drm/mediatek: add display merge mute/unmute support for MT8195 Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 14/22] drm/mediatek: add display merge async reset control Nancy.Lin
2022-03-11  1:54 ` [PATCH v15 15/22] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 16/22] drm/mediatek: add mediatek-drm plane color encoding info Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 17/22] drm/mediatek: add ovl_adaptor support for MT8195 Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 18/22] drm/mediatek: add dma dev get function Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 19/22] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-03-14 10:08   ` CK Hu
2022-03-18 13:04     ` Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 20/22] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-03-15  5:08   ` CK Hu
2022-03-18 13:05     ` Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 21/22] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-03-15  5:10   ` CK Hu
2022-03-18 13:06     ` Nancy.Lin
2022-03-11  1:55 ` [PATCH v15 22/22] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2022-03-11  9:51 ` [PATCH v15 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195 AngeloGioacchino Del Regno

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