From: Nancy.Lin <nancy.lin@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
<wim@linux-watchdog.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>, <linux@roeck-us.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
"Nathan Chancellor" <nathan@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
"Nancy . Lin" <nancy.lin@mediatek.com>,
"jason-jh . lin" <jason-jh.lin@mediatek.com>,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<dri-devel@lists.freedesktop.org>, <llvm@lists.linux.dev>,
<singo.chang@mediatek.com>, <srv_heupstream@mediatek.com>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH v15 07/22] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1
Date: Fri, 11 Mar 2022 09:54:51 +0800 [thread overview]
Message-ID: <20220311015506.11232-8-nancy.lin@mediatek.com> (raw)
In-Reply-To: <20220311015506.11232-1-nancy.lin@mediatek.com>
MT8195 vdosys1 has more than 32 reset bits and a different reset base
than other chips. Modify mmsys for support 64 bit and different reset
base.
Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/soc/mediatek/mt8195-mmsys.h | 1 +
drivers/soc/mediatek/mtk-mmsys.c | 20 +++++++++++++++-----
drivers/soc/mediatek/mtk-mmsys.h | 1 +
3 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
index 8b7adbd22919..fafe7c639b52 100644
--- a/drivers/soc/mediatek/mt8195-mmsys.h
+++ b/drivers/soc/mediatek/mt8195-mmsys.h
@@ -139,6 +139,7 @@
#define MT8195_VDO1_MIXER_SOUT_SEL_IN 0xf68
#define MT8195_MIXER_SOUT_SEL_IN_FROM_DISP_MIXER 0
+#define MT8195_VDO1_SW0_RST_B 0x1d0
#define MT8195_VDO1_MERGE0_ASYNC_CFG_WD 0xe30
#define MT8195_VDO1_MERGE1_ASYNC_CFG_WD 0xe40
#define MT8195_VDO1_MERGE2_ASYNC_CFG_WD 0xe50
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index c686b17ca62f..f36e41b2df82 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -20,6 +20,8 @@
#include "mt8195-mmsys.h"
#include "mt8365-mmsys.h"
+#define MMSYS_SW_RESET_PER_REG 32
+
static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.clk_driver = "clk-mt2701-mm",
.routes = mmsys_default_routing_table,
@@ -51,6 +53,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
.routes = mmsys_default_routing_table,
.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
+ .num_resets = 32,
};
static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
@@ -58,6 +61,7 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
.routes = mmsys_mt8183_routing_table,
.num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
+ .num_resets = 32,
};
static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
@@ -65,6 +69,7 @@ static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
.routes = mmsys_mt8186_routing_table,
.num_routes = ARRAY_SIZE(mmsys_mt8186_routing_table),
.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
+ .num_resets = 32,
};
static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
@@ -85,6 +90,8 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
.config = mmsys_mt8195_config_table,
.num_configs = ARRAY_SIZE(mmsys_mt8195_config_table),
+ .sw0_rst_offset = MT8195_VDO1_SW0_RST_B,
+ .num_resets = 64,
};
static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
@@ -143,18 +150,22 @@ static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned l
{
struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
unsigned long flags;
+ u32 offset;
u32 reg;
+ offset = (id / MMSYS_SW_RESET_PER_REG) * sizeof(u32);
+ id = id % MMSYS_SW_RESET_PER_REG;
+
spin_lock_irqsave(&mmsys->lock, flags);
- reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
+ reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset + offset);
if (assert)
reg &= ~BIT(id);
else
reg |= BIT(id);
- writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
+ writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset + offset);
spin_unlock_irqrestore(&mmsys->lock, flags);
@@ -250,10 +261,11 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
return ret;
}
+ mmsys->data = of_device_get_match_data(&pdev->dev);
spin_lock_init(&mmsys->lock);
mmsys->rcdev.owner = THIS_MODULE;
- mmsys->rcdev.nr_resets = 32;
+ mmsys->rcdev.nr_resets = mmsys->data->num_resets;
mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
mmsys->rcdev.of_node = pdev->dev.of_node;
ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);
@@ -262,8 +274,6 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
return ret;
}
- mmsys->data = of_device_get_match_data(&pdev->dev);
-
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
ret = cmdq_dev_get_client_reg(dev, &mmsys->cmdq_base, 0);
if (ret)
diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
index 78c7069bac0e..013639e34617 100644
--- a/drivers/soc/mediatek/mtk-mmsys.h
+++ b/drivers/soc/mediatek/mtk-mmsys.h
@@ -99,6 +99,7 @@ struct mtk_mmsys_driver_data {
const struct mtk_mmsys_routes *routes;
const unsigned int num_routes;
const u16 sw0_rst_offset;
+ const u32 num_resets;
const struct mtk_mmsys_config *config;
const unsigned int num_configs;
};
--
2.18.0
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next prev parent reply other threads:[~2022-03-11 2:13 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-11 1:54 [PATCH v15 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195 Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 01/22] dt-bindings: mediatek: add vdosys1 RDMA definition " Nancy.Lin
2022-03-11 9:31 ` AngeloGioacchino Del Regno
2022-03-11 1:54 ` [PATCH v15 02/22] dt-bindings: reset: mt8195: add vdosys1 reset control bit Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 03/22] dt-bindings: mediatek: add ethdr definition for mt8195 Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 04/22] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1 Nancy.Lin
2022-03-17 13:01 ` Rex-BC Chen
2022-03-11 1:54 ` [PATCH v15 05/22] soc: mediatek: add mtk-mmsys config API " Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 06/22] soc: mediatek: add cmdq support of " Nancy.Lin
2022-03-11 1:54 ` Nancy.Lin [this message]
2022-03-11 1:54 ` [PATCH v15 08/22] soc: mediatek: change the mutex defines and the mutex_mod type Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 09/22] soc: mediatek: add mtk-mutex support for mt8195 vdosys1 Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 10/22] drm/mediatek: add display MDP RDMA support for MT8195 Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 11/22] drm/mediatek: add display merge advance config API " Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 12/22] drm/mediatek: add display merge start/stop API for cmdq support Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 13/22] drm/mediatek: add display merge mute/unmute support for MT8195 Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 14/22] drm/mediatek: add display merge async reset control Nancy.Lin
2022-03-11 1:54 ` [PATCH v15 15/22] drm/mediatek: add ETHDR support for MT8195 Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 16/22] drm/mediatek: add mediatek-drm plane color encoding info Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 17/22] drm/mediatek: add ovl_adaptor support for MT8195 Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 18/22] drm/mediatek: add dma dev get function Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 19/22] drm/mediatek: modify mediatek-drm for mt8195 multi mmsys support Nancy.Lin
2022-03-14 10:08 ` CK Hu
2022-03-18 13:04 ` Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 20/22] drm/mediatek: add drm ovl_adaptor sub driver for MT8195 Nancy.Lin
2022-03-15 5:08 ` CK Hu
2022-03-18 13:05 ` Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 21/22] drm/mediatek: add mediatek-drm of vdosys1 support " Nancy.Lin
2022-03-15 5:10 ` CK Hu
2022-03-18 13:06 ` Nancy.Lin
2022-03-11 1:55 ` [PATCH v15 22/22] arm64: dts: mt8195: add display node for vdosys1 Nancy.Lin
2022-03-11 9:51 ` [PATCH v15 00/22] Add MediaTek SoC DRM (vdosys1) support for mt8195 AngeloGioacchino Del Regno
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