[PATCH V4 0/3] Add the fec node on i.MX8ULP platform

[PATCH V4 0/3] Add the fec node on i.MX8ULP platform

[wei.fang]

From: Wei Fang <wei.fang@nxp.com>

Add the fec node on i.MX8ULP platfroms.
And enable the fec support on i.MX8ULP EVK boards.

Wei Fang (3):
  dt-bindings: net: fsl,fec: Add i.MX8ULP FEC items
  arm64: dts: imx8ulp: Add the fec support
  arm64: dts: imx8ulp-evk: Add the fec support

 .../devicetree/bindings/net/fsl,fec.yaml      |  5 ++
 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 57 +++++++++++++++++++
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi    | 11 ++++
 3 files changed, 73 insertions(+)

-- 
2.25.1


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[PATCH V4 1/3] dt-bindings: net: fsl,fec: Add i.MX8ULP FEC items

[wei.fang]

From: Wei Fang <wei.fang@nxp.com>

Add fsl,imx8ulp-fec for i.MX8ULP platform.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
V2 change:
Add fsl,imx6q-fec
V3 change:
No change.
V4 change:
Add Acked-by tag.
---
 Documentation/devicetree/bindings/net/fsl,fec.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
index daa2f79a294f..4d2454ade3b6 100644
--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -58,6 +58,11 @@ properties:
               - fsl,imx8qxp-fec
           - const: fsl,imx8qm-fec
           - const: fsl,imx6sx-fec
+      - items:
+          - enum:
+              - fsl,imx8ulp-fec
+          - const: fsl,imx6ul-fec
+          - const: fsl,imx6q-fec
 
   reg:
     maxItems: 1
-- 
2.25.1


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[PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support

[wei.fang]

From: Wei Fang <wei.fang@nxp.com>

Add the fec support on i.MX8ULP platforms.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
---
V2 change:
Remove the external clocks which is related to specific board.
V3 change:
No change.
V4 Change:
Add Reviewed-by tag.
---
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 60c1b018bf03..3e8a1e4f0fc2 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -16,6 +16,7 @@ / {
 	#size-cells = <2>;
 
 	aliases {
+		ethernet0 = &fec;
 		gpio0 = &gpiod;
 		gpio1 = &gpioe;
 		gpio2 = &gpiof;
@@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 {
 				bus-width = <4>;
 				status = "disabled";
 			};
+
+			fec: ethernet@29950000 {
+				compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";
+				reg = <0x29950000 0x10000>;
+				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "int0";
+				fsl,num-tx-queues = <1>;
+				fsl,num-rx-queues = <1>;
+				status = "disabled";
+			};
 		};
 
 		gpioe: gpio@2d000080 {
-- 
2.25.1


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[PATCH V4 3/3] arm64: dts: imx8ulp-evk: Add the fec support

[wei.fang]

From: Wei Fang <wei.fang@nxp.com>

Enable the fec on i.MX8ULP EVK board.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
V2 change:
Add clock_ext_rmii and clock_ext_ts. They are both related to EVK board.
V3 change:
No change.
V4 change:
Add ethernet-phy address "@1".
---
 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index 33e84c4e9ed8..f1c6d933a17c 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -19,6 +19,21 @@ memory@80000000 {
 		device_type = "memory";
 		reg = <0x0 0x80000000 0 0x80000000>;
 	};
+
+	clock_ext_rmii: clock-ext-rmii {
+		compatible = "fixed-clock";
+		clock-frequency = <50000000>;
+		clock-output-names = "ext_rmii_clk";
+		#clock-cells = <0>;
+	};
+
+	clock_ext_ts: clock-ext-ts {
+		compatible = "fixed-clock";
+		/* External ts clock is 50MHZ from PHY on EVK board. */
+		clock-frequency = <50000000>;
+		clock-output-names = "ext_ts_clk";
+		#clock-cells = <0>;
+	};
 };
 
 &lpuart5 {
@@ -38,7 +53,49 @@ &usdhc0 {
 	status = "okay";
 };
 
+&fec {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&pinctrl_enet>;
+	pinctrl-1 = <&pinctrl_enet>;
+	clocks = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>,
+		 <&pcc4 IMX8ULP_CLK_ENET>,
+		 <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>,
+		 <&clock_ext_rmii>;
+	clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
+	assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>;
+	assigned-clock-parents = <&clock_ext_ts>;
+	phy-mode = "rmii";
+	phy-handle = <&ethphy>;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy: ethernet-phy@1 {
+			reg = <1>;
+			micrel,led-mode = <1>;
+		};
+	};
+};
+
 &iomuxc1 {
+	pinctrl_enet: enetgrp {
+		fsl,pins = <
+			MX8ULP_PAD_PTE15__ENET0_MDC     0x43
+			MX8ULP_PAD_PTE14__ENET0_MDIO    0x43
+			MX8ULP_PAD_PTE17__ENET0_RXER    0x43
+			MX8ULP_PAD_PTE18__ENET0_CRS_DV  0x43
+			MX8ULP_PAD_PTF1__ENET0_RXD0     0x43
+			MX8ULP_PAD_PTE20__ENET0_RXD1    0x43
+			MX8ULP_PAD_PTE16__ENET0_TXEN    0x43
+			MX8ULP_PAD_PTE23__ENET0_TXD0    0x43
+			MX8ULP_PAD_PTE22__ENET0_TXD1    0x43
+			MX8ULP_PAD_PTE19__ENET0_REFCLK  0x43
+			MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
+		>;
+	};
+
 	pinctrl_lpuart5: lpuart5grp {
 		fsl,pins = <
 			MX8ULP_PAD_PTF14__LPUART5_TX	0x3
-- 
2.25.1


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Re: [PATCH V4 0/3] Add the fec node on i.MX8ULP platform

[Jakub Kicinski]

On Wed, 27 Jul 2022 00:38:50 +1000 wei.fang@nxp.com wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> Add the fec node on i.MX8ULP platfroms.
> And enable the fec support on i.MX8ULP EVK boards.

FWIW the dts patches do not apply cleanly to netdev so if someone wants
to take the whole thing please LMK/LUK otherwise we can take the schema
in separately for 5.20 and leave the rest to whoever.

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RE: [PATCH V4 3/3] arm64: dts: imx8ulp-evk: Add the fec support

[Wei Fang]

Hi
	Kindly Ping.

> -----Original Message-----
> From: Wei Fang
> Sent: 2022年7月26日 14:46
> To: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> shawnguo@kernel.org; s.hauer@pengutronix.de
> Cc: netdev@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; Peng Fan <peng.fan@nxp.com>; Jacky Bai
> <ping.bai@nxp.com>; sudeep.holla@arm.com;
> linux-arm-kernel@lists.infradead.org; Aisheng Dong <aisheng.dong@nxp.com>
> Subject: [PATCH V4 3/3] arm64: dts: imx8ulp-evk: Add the fec support
> 
> From: Wei Fang <wei.fang@nxp.com>
> 
> Enable the fec on i.MX8ULP EVK board.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---
> V2 change:
> Add clock_ext_rmii and clock_ext_ts. They are both related to EVK board.
> V3 change:
> No change.
> V4 change:
> Add ethernet-phy address "@1".
> ---
>  arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 57
> +++++++++++++++++++
>  1 file changed, 57 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> index 33e84c4e9ed8..f1c6d933a17c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
> @@ -19,6 +19,21 @@ memory@80000000 {
>  		device_type = "memory";
>  		reg = <0x0 0x80000000 0 0x80000000>;
>  	};
> +
> +	clock_ext_rmii: clock-ext-rmii {
> +		compatible = "fixed-clock";
> +		clock-frequency = <50000000>;
> +		clock-output-names = "ext_rmii_clk";
> +		#clock-cells = <0>;
> +	};
> +
> +	clock_ext_ts: clock-ext-ts {
> +		compatible = "fixed-clock";
> +		/* External ts clock is 50MHZ from PHY on EVK board. */
> +		clock-frequency = <50000000>;
> +		clock-output-names = "ext_ts_clk";
> +		#clock-cells = <0>;
> +	};
>  };
> 
>  &lpuart5 {
> @@ -38,7 +53,49 @@ &usdhc0 {
>  	status = "okay";
>  };
> 
> +&fec {
> +	pinctrl-names = "default", "sleep";
> +	pinctrl-0 = <&pinctrl_enet>;
> +	pinctrl-1 = <&pinctrl_enet>;
> +	clocks = <&cgc1 IMX8ULP_CLK_XBAR_DIVBUS>,
> +		 <&pcc4 IMX8ULP_CLK_ENET>,
> +		 <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>,
> +		 <&clock_ext_rmii>;
> +	clock-names = "ipg", "ahb", "ptp", "enet_clk_ref";
> +	assigned-clocks = <&cgc1 IMX8ULP_CLK_ENET_TS_SEL>;
> +	assigned-clock-parents = <&clock_ext_ts>;
> +	phy-mode = "rmii";
> +	phy-handle = <&ethphy>;
> +	status = "okay";
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		ethphy: ethernet-phy@1 {
> +			reg = <1>;
> +			micrel,led-mode = <1>;
> +		};
> +	};
> +};
> +
>  &iomuxc1 {
> +	pinctrl_enet: enetgrp {
> +		fsl,pins = <
> +			MX8ULP_PAD_PTE15__ENET0_MDC     0x43
> +			MX8ULP_PAD_PTE14__ENET0_MDIO    0x43
> +			MX8ULP_PAD_PTE17__ENET0_RXER    0x43
> +			MX8ULP_PAD_PTE18__ENET0_CRS_DV  0x43
> +			MX8ULP_PAD_PTF1__ENET0_RXD0     0x43
> +			MX8ULP_PAD_PTE20__ENET0_RXD1    0x43
> +			MX8ULP_PAD_PTE16__ENET0_TXEN    0x43
> +			MX8ULP_PAD_PTE23__ENET0_TXD0    0x43
> +			MX8ULP_PAD_PTE22__ENET0_TXD1    0x43
> +			MX8ULP_PAD_PTE19__ENET0_REFCLK  0x43
> +			MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43
> +		>;
> +	};
> +
>  	pinctrl_lpuart5: lpuart5grp {
>  		fsl,pins = <
>  			MX8ULP_PAD_PTF14__LPUART5_TX	0x3
> --
> 2.25.1

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Re: [PATCH V4 0/3] Add the fec node on i.MX8ULP platform

[patchwork-bot+netdevbpf]

Hello:

This series was applied to netdev/net-next.git (master)
by Jakub Kicinski <kuba@kernel.org>:

On Wed, 27 Jul 2022 00:38:50 +1000 you wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> Add the fec node on i.MX8ULP platfroms.
> And enable the fec support on i.MX8ULP EVK boards.
> 
> Wei Fang (3):
>   dt-bindings: net: fsl,fec: Add i.MX8ULP FEC items
>   arm64: dts: imx8ulp: Add the fec support
>   arm64: dts: imx8ulp-evk: Add the fec support
> 
> [...]

Here is the summary with links:
  - [V4,1/3] dt-bindings: net: fsl,fec: Add i.MX8ULP FEC items
    https://git.kernel.org/netdev/net-next/c/ad3564ccc367
  - [V4,2/3] arm64: dts: imx8ulp: Add the fec support
    (no matching commit)
  - [V4,3/3] arm64: dts: imx8ulp-evk: Add the fec support
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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Re: [PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support

[Shawn Guo]

On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> Add the fec support on i.MX8ULP platforms.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> ---
> V2 change:
> Remove the external clocks which is related to specific board.
> V3 change:
> No change.
> V4 Change:
> Add Reviewed-by tag.
> ---
>  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index 60c1b018bf03..3e8a1e4f0fc2 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -16,6 +16,7 @@ / {
>  	#size-cells = <2>;
>  
>  	aliases {
> +		ethernet0 = &fec;
>  		gpio0 = &gpiod;
>  		gpio1 = &gpioe;
>  		gpio2 = &gpiof;
> @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 {
>  				bus-width = <4>;
>  				status = "disabled";
>  			};
> +
> +			fec: ethernet@29950000 {
> +				compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec", "fsl,imx6q-fec";

Since imx8ulp-fec is compatible with imx6ul-fec, what's the point of
having imx6q-fec in there?  It can be dropped, I guess?

Shawn

> +				reg = <0x29950000 0x10000>;
> +				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> +				interrupt-names = "int0";
> +				fsl,num-tx-queues = <1>;
> +				fsl,num-rx-queues = <1>;
> +				status = "disabled";
> +			};
>  		};
>  
>  		gpioe: gpio@2d000080 {
> -- 
> 2.25.1
> 

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RE: [PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support

[Wei Fang]

> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2022年8月17日 17:47
> To: Wei Fang <wei.fang@nxp.com>
> Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> s.hauer@pengutronix.de; netdev@vger.kernel.org; devicetree@vger.kernel.org;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; festevam@gmail.com;
> dl-linux-imx <linux-imx@nxp.com>; Peng Fan <peng.fan@nxp.com>; Jacky Bai
> <ping.bai@nxp.com>; sudeep.holla@arm.com;
> linux-arm-kernel@lists.infradead.org; Aisheng Dong <aisheng.dong@nxp.com>
> Subject: Re: [PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support
> 
> On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote:
> > From: Wei Fang <wei.fang@nxp.com>
> >
> > Add the fec support on i.MX8ULP platforms.
> >
> > Signed-off-by: Wei Fang <wei.fang@nxp.com>
> > Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
> > ---
> > V2 change:
> > Remove the external clocks which is related to specific board.
> > V3 change:
> > No change.
> > V4 Change:
> > Add Reviewed-by tag.
> > ---
> >  arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > index 60c1b018bf03..3e8a1e4f0fc2 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> > @@ -16,6 +16,7 @@ / {
> >  	#size-cells = <2>;
> >
> >  	aliases {
> > +		ethernet0 = &fec;
> >  		gpio0 = &gpiod;
> >  		gpio1 = &gpioe;
> >  		gpio2 = &gpiof;
> > @@ -365,6 +366,16 @@ usdhc2: mmc@298f0000 {
> >  				bus-width = <4>;
> >  				status = "disabled";
> >  			};
> > +
> > +			fec: ethernet@29950000 {
> > +				compatible = "fsl,imx8ulp-fec", "fsl,imx6ul-fec",
> > +"fsl,imx6q-fec";
> 
> Since imx8ulp-fec is compatible with imx6ul-fec, what's the point of having
> imx6q-fec in there?  It can be dropped, I guess?
> 
Actually, I did drop this in version 1. But when I added the imx8ulp compatible
property to the fsl,fec.yaml, the maintainer expected imx8ulp to be compatible
with imx6ul and with imx6q. The patch of fsl,fec.yaml as follows:

--- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
+++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
@@ -58,6 +58,11 @@ properties:
               - fsl,imx8qxp-fec
           - const: fsl,imx8qm-fec
           - const: fsl,imx6sx-fec
+      - items:
+          - enum:
+              - fsl,imx8ulp-fec
+          - const: fsl,imx6ul-fec
+          - const: fsl,imx6q-fec

For compliant with the fsl,fec.yaml, so I added the imx6q-fec in the later 
version. And the patch of the fsl,fec.yaml has already applied to the 
upstream kernel. Therefore, I think it does not matter if the imx6q-fec is
added.


> Shawn
> 
> > +				reg = <0x29950000 0x10000>;
> > +				interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> > +				interrupt-names = "int0";
> > +				fsl,num-tx-queues = <1>;
> > +				fsl,num-rx-queues = <1>;
> > +				status = "disabled";
> > +			};
> >  		};
> >
> >  		gpioe: gpio@2d000080 {
> > --
> > 2.25.1
> >
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Re: [PATCH V4 2/3] arm64: dts: imx8ulp: Add the fec support

[Shawn Guo]

On Wed, Jul 27, 2022 at 12:38:52AM +1000, wei.fang@nxp.com wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> Add the fec support on i.MX8ULP platforms.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

Applied, thanks!

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Re: [PATCH V4 3/3] arm64: dts: imx8ulp-evk: Add the fec support

[Shawn Guo]

On Wed, Jul 27, 2022 at 12:38:53AM +1000, wei.fang@nxp.com wrote:
> From: Wei Fang <wei.fang@nxp.com>
> 
> Enable the fec on i.MX8ULP EVK board.
> 
> Signed-off-by: Wei Fang <wei.fang@nxp.com>

Applied, thanks!

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