From: Sean Anderson <sean.anderson@seco.com>
To: Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
linux-phy@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org,
linux-arm-kernel@lists.infradead.org,
Madalin Bucur <madalin.bucur@nxp.com>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
Rob Herring <robh+dt@kernel.org>,
Sean Anderson <sean.anderson@seco.com>,
Rob Herring <robh@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org
Subject: [PATCH v6 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs
Date: Tue, 20 Sep 2022 16:23:51 -0400 [thread overview]
Message-ID: <20220920202356.1451033-4-sean.anderson@seco.com> (raw)
In-Reply-To: <20220920202356.1451033-1-sean.anderson@seco.com>
This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
with assigned-clock* to specify a particular frequency to use. For
example, to set the second PLL (at offset 0x20)'s frequency, use
LYNX10G_PLLa(1). These are for use only in the device tree, and are not
otherwise used by the driver.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v6:
- frequence -> frequency
Changes in v5:
- Update commit description
- Dual id header
Changes in v4:
- New
include/dt-bindings/clock/fsl,lynx-10g.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindings/clock/fsl,lynx-10g.h
diff --git a/include/dt-bindings/clock/fsl,lynx-10g.h b/include/dt-bindings/clock/fsl,lynx-10g.h
new file mode 100644
index 000000000000..15362ae85304
--- /dev/null
+++ b/include/dt-bindings/clock/fsl,lynx-10g.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com>
+ */
+
+#ifndef __DT_BINDINGS_CLK_LYNX_10G_H
+#define __DT_BINDINGS_CLK_LYNX_10G_H
+
+#define LYNX10G_CLKS_PER_PLL 2
+
+#define LYNX10G_PLLa(a) ((a) * LYNX10G_CLKS_PER_PLL)
+#define LYNX10G_PLLa_EX_DLY(a) ((a) * LYNX10G_CLKS_PER_PLL + 1)
+
+#endif /* __DT_BINDINGS_CLK_LYNX_10G_H */
--
2.35.1.1320.gc452695387.dirty
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next prev parent reply other threads:[~2022-09-20 20:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-20 20:23 [PATCH v6 0/8] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-09-20 20:23 ` [PATCH v6 1/8] dt-bindings: phy: Add 2500BASE-X and 10GBASE-R Sean Anderson
2022-09-20 20:23 ` [PATCH v6 2/8] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-09-21 6:57 ` Krzysztof Kozlowski
2022-09-22 15:23 ` Sean Anderson
2022-09-22 16:00 ` Krzysztof Kozlowski
2022-09-22 16:00 ` Krzysztof Kozlowski
2022-09-20 20:23 ` Sean Anderson [this message]
2022-09-29 0:37 ` [PATCH v6 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs Stephen Boyd
2022-09-20 20:23 ` [PATCH v6 4/8] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-09-24 6:54 ` Vinod Koul
2022-09-26 15:35 ` Sean Anderson
2022-10-03 17:04 ` Sean Anderson
2022-09-20 20:23 ` [PATCH v6 5/8] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
2022-09-20 20:23 ` [PATCH v6 6/8] arm64: dts: ls1088a: " Sean Anderson
2022-09-20 20:23 ` [PATCH v6 7/8] arm64: dts: ls1046ardb: " Sean Anderson
2022-09-20 20:23 ` [PATCH v6 8/8] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
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