linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] lib/xor: use r10 rather than r7 in xor_arm4regs_{2|3}
       [not found] <202210072120.V1O2SuKY-lkp@intel.com>
@ 2022-10-10 17:51 ` Nick Desaulniers
  2022-10-17 13:49   ` Ard Biesheuvel
  0 siblings, 1 reply; 2+ messages in thread
From: Nick Desaulniers @ 2022-10-10 17:51 UTC (permalink / raw)
  To: Russell King, Ard Biesheuvel
  Cc: Nathan Chancellor, Tom Rix, Herbert Xu, linux-arm-kernel,
	linux-kernel, llvm, Steven Rostedt (Google),
	kernel test robot, kbuild-all, Nick Desaulniers

kbuild test robot reports:
In file included from crypto/xor.c:17:
./arch/arm/include/asm/xor.h:61:3: error: write to reserved register 'R7'
                GET_BLOCK_4(p1);
                ^
./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
        __asm__("ldmia  %0, {%1, %2, %3, %4}" \
                ^
./arch/arm/include/asm/xor.h:63:3: error: write to reserved register 'R7'
                PUT_BLOCK_4(p1);
                ^
./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
        __asm__ __volatile__("stmia     %0!, {%2, %3, %4, %5}" \
                             ^
./arch/arm/include/asm/xor.h:83:3: error: write to reserved register 'R7'
                GET_BLOCK_4(p1);
                ^
./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
        __asm__("ldmia  %0, {%1, %2, %3, %4}" \
                ^
./arch/arm/include/asm/xor.h:86:3: error: write to reserved register 'R7'
                PUT_BLOCK_4(p1);
                ^
./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
        __asm__ __volatile__("stmia     %0!, {%2, %3, %4, %5}" \
                             ^
Thumb2 uses r7 rather than r11 as the frame pointer. Let's use r10
rather than r7 for these temporaries.

Link: https://github.com/ClangBuiltLinux/linux/issues/1732
Link: https://lore.kernel.org/llvm/202210072120.V1O2SuKY-lkp@intel.com/
Reported-by: kernel test robot <lkp@intel.com>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
---
 arch/arm/include/asm/xor.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/xor.h b/arch/arm/include/asm/xor.h
index 669cad5194d3..934b549905f5 100644
--- a/arch/arm/include/asm/xor.h
+++ b/arch/arm/include/asm/xor.h
@@ -51,7 +51,7 @@ xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,
 	register unsigned int a1 __asm__("r4");
 	register unsigned int a2 __asm__("r5");
 	register unsigned int a3 __asm__("r6");
-	register unsigned int a4 __asm__("r7");
+	register unsigned int a4 __asm__("r10");
 	register unsigned int b1 __asm__("r8");
 	register unsigned int b2 __asm__("r9");
 	register unsigned int b3 __asm__("ip");
@@ -73,7 +73,7 @@ xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,
 	register unsigned int a1 __asm__("r4");
 	register unsigned int a2 __asm__("r5");
 	register unsigned int a3 __asm__("r6");
-	register unsigned int a4 __asm__("r7");
+	register unsigned int a4 __asm__("r10");
 	register unsigned int b1 __asm__("r8");
 	register unsigned int b2 __asm__("r9");
 	register unsigned int b3 __asm__("ip");
-- 
2.38.0.rc2.412.g84df46c1b4-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] lib/xor: use r10 rather than r7 in xor_arm4regs_{2|3}
  2022-10-10 17:51 ` [PATCH] lib/xor: use r10 rather than r7 in xor_arm4regs_{2|3} Nick Desaulniers
@ 2022-10-17 13:49   ` Ard Biesheuvel
  0 siblings, 0 replies; 2+ messages in thread
From: Ard Biesheuvel @ 2022-10-17 13:49 UTC (permalink / raw)
  To: Nick Desaulniers
  Cc: Russell King, Nathan Chancellor, Tom Rix, Herbert Xu,
	linux-arm-kernel, linux-kernel, llvm, Steven Rostedt (Google),
	kernel test robot, kbuild-all

On Mon, 10 Oct 2022 at 19:51, Nick Desaulniers <ndesaulniers@google.com> wrote:
>
> kbuild test robot reports:
> In file included from crypto/xor.c:17:
> ./arch/arm/include/asm/xor.h:61:3: error: write to reserved register 'R7'
>                 GET_BLOCK_4(p1);
>                 ^
> ./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
>         __asm__("ldmia  %0, {%1, %2, %3, %4}" \
>                 ^
> ./arch/arm/include/asm/xor.h:63:3: error: write to reserved register 'R7'
>                 PUT_BLOCK_4(p1);
>                 ^
> ./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
>         __asm__ __volatile__("stmia     %0!, {%2, %3, %4, %5}" \
>                              ^
> ./arch/arm/include/asm/xor.h:83:3: error: write to reserved register 'R7'
>                 GET_BLOCK_4(p1);
>                 ^
> ./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
>         __asm__("ldmia  %0, {%1, %2, %3, %4}" \
>                 ^
> ./arch/arm/include/asm/xor.h:86:3: error: write to reserved register 'R7'
>                 PUT_BLOCK_4(p1);
>                 ^
> ./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
>         __asm__ __volatile__("stmia     %0!, {%2, %3, %4, %5}" \
>                              ^
> Thumb2 uses r7 rather than r11 as the frame pointer. Let's use r10
> rather than r7 for these temporaries.
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/1732
> Link: https://lore.kernel.org/llvm/202210072120.V1O2SuKY-lkp@intel.com/
> Reported-by: kernel test robot <lkp@intel.com>
> Suggested-by: Ard Biesheuvel <ardb@kernel.org>
> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>

Reviewed-by: Ard Biesheuvel <ardb@kernel.org>

> ---
>  arch/arm/include/asm/xor.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/include/asm/xor.h b/arch/arm/include/asm/xor.h
> index 669cad5194d3..934b549905f5 100644
> --- a/arch/arm/include/asm/xor.h
> +++ b/arch/arm/include/asm/xor.h
> @@ -51,7 +51,7 @@ xor_arm4regs_2(unsigned long bytes, unsigned long * __restrict p1,
>         register unsigned int a1 __asm__("r4");
>         register unsigned int a2 __asm__("r5");
>         register unsigned int a3 __asm__("r6");
> -       register unsigned int a4 __asm__("r7");
> +       register unsigned int a4 __asm__("r10");
>         register unsigned int b1 __asm__("r8");
>         register unsigned int b2 __asm__("r9");
>         register unsigned int b3 __asm__("ip");
> @@ -73,7 +73,7 @@ xor_arm4regs_3(unsigned long bytes, unsigned long * __restrict p1,
>         register unsigned int a1 __asm__("r4");
>         register unsigned int a2 __asm__("r5");
>         register unsigned int a3 __asm__("r6");
> -       register unsigned int a4 __asm__("r7");
> +       register unsigned int a4 __asm__("r10");
>         register unsigned int b1 __asm__("r8");
>         register unsigned int b2 __asm__("r9");
>         register unsigned int b3 __asm__("ip");
> --
> 2.38.0.rc2.412.g84df46c1b4-goog
>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2022-10-17 13:51 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
     [not found] <202210072120.V1O2SuKY-lkp@intel.com>
2022-10-10 17:51 ` [PATCH] lib/xor: use r10 rather than r7 in xor_arm4regs_{2|3} Nick Desaulniers
2022-10-17 13:49   ` Ard Biesheuvel

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).