From: Mark Brown <broonie@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Oleg Nesterov <oleg@redhat.com>,
Marc Zyngier <maz@kernel.org>, James Morse <james.morse@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Shuah Khan <shuah@kernel.org>
Cc: Alan Hayward <alan.hayward@arm.com>,
Luis Machado <luis.machado@arm.com>,
Szabolcs Nagy <szabolcs.nagy@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-kselftest@vger.kernel.org, Mark Brown <broonie@kernel.org>
Subject: [PATCH v4 08/21] arm64/sme: Add basic enumeration for SME2
Date: Mon, 16 Jan 2023 16:04:43 +0000 [thread overview]
Message-ID: <20221208-arm64-sme2-v4-8-f2fa0aef982f@kernel.org> (raw)
In-Reply-To: <20221208-arm64-sme2-v4-0-f2fa0aef982f@kernel.org>
Add basic feature detection for SME2, detecting that the feature is present
and disabling traps for ZT0.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/cpufeature.h | 6 ++++++
arch/arm64/include/asm/fpsimd.h | 1 +
arch/arm64/kernel/cpufeature.c | 14 ++++++++++++++
arch/arm64/kernel/fpsimd.c | 11 +++++++++++
arch/arm64/tools/cpucaps | 1 +
5 files changed, 33 insertions(+)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 03d1c9d7af82..fc2c739f48f1 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -769,6 +769,12 @@ static __always_inline bool system_supports_sme(void)
cpus_have_const_cap(ARM64_SME);
}
+static __always_inline bool system_supports_sme2(void)
+{
+ return IS_ENABLED(CONFIG_ARM64_SME) &&
+ cpus_have_const_cap(ARM64_SME2);
+}
+
static __always_inline bool system_supports_fa64(void)
{
return IS_ENABLED(CONFIG_ARM64_SME) &&
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index 2d3fa80cd95d..2a66e3b94553 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -118,6 +118,7 @@ extern void za_load_state(void const *state);
struct arm64_cpu_capabilities;
extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused);
extern void sme_kernel_enable(const struct arm64_cpu_capabilities *__unused);
+extern void sme2_kernel_enable(const struct arm64_cpu_capabilities *__unused);
extern void fa64_kernel_enable(const struct arm64_cpu_capabilities *__unused);
extern u64 read_zcr_features(void);
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index a77315b338e6..fd90905bc2e6 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -282,6 +282,8 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = {
static const struct arm64_ftr_bits ftr_id_aa64smfr0[] = {
ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),
FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_FA64_SHIFT, 1, 0),
+ ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),
+ FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_SMEver_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),
FTR_STRICT, FTR_EXACT, ID_AA64SMFR0_EL1_I16I64_SHIFT, 4, 0),
ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SME),
@@ -2649,6 +2651,18 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
.matches = has_cpuid_feature,
.cpu_enable = fa64_kernel_enable,
},
+ {
+ .desc = "SME2",
+ .type = ARM64_CPUCAP_SYSTEM_FEATURE,
+ .capability = ARM64_SME2,
+ .sys_reg = SYS_ID_AA64PFR1_EL1,
+ .sign = FTR_UNSIGNED,
+ .field_pos = ID_AA64PFR1_EL1_SME_SHIFT,
+ .field_width = ID_AA64PFR1_EL1_SME_WIDTH,
+ .min_field_value = ID_AA64PFR1_EL1_SME_SME2,
+ .matches = has_cpuid_feature,
+ .cpu_enable = sme2_kernel_enable,
+ },
#endif /* CONFIG_ARM64_SME */
{
.desc = "WFx with timeout",
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 9e168a9eb615..717ae4aaa021 100644
--- a/arch/arm64/kernel/fpsimd.c
+++ b/arch/arm64/kernel/fpsimd.c
@@ -1298,6 +1298,17 @@ void sme_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p)
isb();
}
+/*
+ * This must be called after sme_kernel_enable(), we rely on the
+ * feature table being sorted to ensure this.
+ */
+void sme2_kernel_enable(const struct arm64_cpu_capabilities *__always_unused p)
+{
+ /* Allow use of ZT0 */
+ write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_EZT0_MASK,
+ SYS_SMCR_EL1);
+}
+
/*
* This must be called after sme_kernel_enable(), we rely on the
* feature table being sorted to ensure this.
diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps
index a86ee376920a..1222b0ed63a2 100644
--- a/arch/arm64/tools/cpucaps
+++ b/arch/arm64/tools/cpucaps
@@ -50,6 +50,7 @@ MTE
MTE_ASYMM
SME
SME_FA64
+SME2
SPECTRE_V2
SPECTRE_V3A
SPECTRE_V4
--
2.34.1
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next prev parent reply other threads:[~2023-01-16 16:09 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-16 16:04 [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Mark Brown
2023-01-16 16:04 ` [PATCH v4 01/21] arm64/sme: Rename za_state to sme_state Mark Brown
2023-01-16 16:04 ` [PATCH v4 02/21] arm64: Document boot requirements for SME 2 Mark Brown
2023-01-16 16:04 ` [PATCH v4 03/21] arm64/sysreg: Update system registers for SME 2 and 2.1 Mark Brown
2023-01-16 16:04 ` [PATCH v4 04/21] arm64/sme: Document SME 2 and SME 2.1 ABI Mark Brown
2023-01-16 16:04 ` [PATCH v4 05/21] arm64/esr: Document ISS for ZT0 being disabled Mark Brown
2023-01-16 16:04 ` [PATCH v4 06/21] arm64/sme: Manually encode ZT0 load and store instructions Mark Brown
2023-01-16 16:04 ` [PATCH v4 07/21] arm64/sme: Enable host kernel to access ZT0 Mark Brown
2023-02-06 9:31 ` Marc Zyngier
2023-02-06 13:02 ` Mark Brown
2023-02-06 16:44 ` Catalin Marinas
2023-01-16 16:04 ` Mark Brown [this message]
2023-01-16 16:04 ` [PATCH v4 09/21] arm64/sme: Provide storage for ZT0 Mark Brown
2023-01-16 16:04 ` [PATCH v4 10/21] arm64/sme: Implement context switching " Mark Brown
2023-01-16 16:04 ` [PATCH v4 11/21] arm64/sme: Implement signal handling for ZT Mark Brown
2023-01-16 16:04 ` [PATCH v4 12/21] arm64/sme: Implement ZT0 ptrace support Mark Brown
2023-01-16 16:04 ` [PATCH v4 13/21] arm64/sme: Add hwcaps for SME 2 and 2.1 features Mark Brown
2023-01-16 16:04 ` [PATCH v4 14/21] kselftest/arm64: Add a stress test program for ZT0 Mark Brown
2023-01-16 16:04 ` [PATCH v4 15/21] kselftest/arm64: Cover ZT in the FP stress test Mark Brown
2023-01-16 16:04 ` [PATCH v4 16/21] kselftest/arm64: Enumerate SME2 in the signal test utility code Mark Brown
2023-01-16 16:04 ` [PATCH v4 17/21] kselftest/arm64: Teach the generic signal context validation about ZT Mark Brown
2023-01-16 16:04 ` [PATCH v4 18/21] kselftest/arm64: Add test coverage for ZT register signal frames Mark Brown
2023-01-16 16:04 ` [PATCH v4 19/21] kselftest/arm64: Add SME2 coverage to syscall-abi Mark Brown
2023-01-16 16:04 ` [PATCH v4 20/21] kselftest/arm64: Add coverage of the ZT ptrace regset Mark Brown
2023-01-16 16:04 ` [PATCH v4 21/21] kselftest/arm64: Add coverage of SME 2 and 2.1 hwcaps Mark Brown
2023-01-20 16:59 ` [PATCH v4 00/21] arm64/sme: Support SME 2 and SME 2.1 Catalin Marinas
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