[PATCH v2 0/2] mtk-wdt: Add reset-by-toprgu support

[PATCH v2 0/2] mtk-wdt: Add reset-by-toprgu support

[Allen-KH Cheng]

This series is based on next-20230116.

In some cases, we may need toprgu to reset the wdt timer after system
resets.

Provide a reset_by_toprgu parameter for configuration. We can disable
or enable it by adding reset_by_toprgu in dts.

Changes since v1:
 - Add more information in bindings
 - Modify some words in the commit message

Allen-KH Cheng (2):
  dt-bindings: watchdog: mtk-wdt: Add reset-by-toprgu support
  watchdog: mtk_wdt: Add reset_by_toprgu support

 .../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml     | 6 ++++++
 drivers/watchdog/mtk_wdt.c                                 | 7 +++++++
 2 files changed, 13 insertions(+)

-- 
2.18.0


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[PATCH v2 1/2] dt-bindings: watchdog: mtk-wdt: Add reset-by-toprgu support

[Allen-KH Cheng]

In some applications, the mtk-wdt requires the toprgu (TOP Reset
Generation Unit) to reset timer after system resets. Add optional
mediatek,reset-by-toprgu property to enable it.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 .../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml      | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
index b3605608410c..b4de6b134ce1 100644
--- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
@@ -52,6 +52,12 @@ properties:
     description: Disable sending output reset signal
     type: boolean
 
+  mediatek,reset-by-toprgu:
+    description: The top reset generate unit (toprgu) generates reset signals
+      and distributes them to each system. If present, means the watchdog
+      timer will reset by toprgu once system resets.
+    type: boolean
+
   '#reset-cells':
     const: 1
 
-- 
2.18.0


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[PATCH v2 2/2] watchdog: mtk_wdt: Add reset_by_toprgu support

[Allen-KH Cheng]

In some cases, the MediaTek watchdog requires the toprgu to reset
timer after system resets.

Provide a reset_by_toprgu parameter for configuration.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
---
 drivers/watchdog/mtk_wdt.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 3e6212591e69..a9c437598e7e 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -50,6 +50,7 @@
 #define WDT_MODE_IRQ_EN		(1 << 3)
 #define WDT_MODE_AUTO_START	(1 << 4)
 #define WDT_MODE_DUAL_EN	(1 << 6)
+#define WDT_MODE_CNT_SEL	(1 << 8)
 #define WDT_MODE_KEY		0x22000000
 
 #define WDT_SWRST		0x14
@@ -70,6 +71,7 @@ struct mtk_wdt_dev {
 	spinlock_t lock; /* protects WDT_SWSYSRST reg */
 	struct reset_controller_dev rcdev;
 	bool disable_wdt_extrst;
+	bool reset_by_toprgu;
 };
 
 struct mtk_wdt_data {
@@ -279,6 +281,8 @@ static int mtk_wdt_start(struct watchdog_device *wdt_dev)
 		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
 	if (mtk_wdt->disable_wdt_extrst)
 		reg &= ~WDT_MODE_EXRST_EN;
+	if (mtk_wdt->reset_by_toprgu)
+		reg |= WDT_MODE_CNT_SEL;
 	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
 	iowrite32(reg, wdt_base + WDT_MODE);
 
@@ -408,6 +412,9 @@ static int mtk_wdt_probe(struct platform_device *pdev)
 	mtk_wdt->disable_wdt_extrst =
 		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
 
+	mtk_wdt->reset_by_toprgu =
+		of_property_read_bool(dev->of_node, "mediatek,reset-by-toprgu");
+
 	return 0;
 }
 
-- 
2.18.0


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Re: [PATCH v2 1/2] dt-bindings: watchdog: mtk-wdt: Add reset-by-toprgu support

[AngeloGioacchino Del Regno]

Il 16/01/23 11:53, Allen-KH Cheng ha scritto:
> In some applications, the mtk-wdt requires the toprgu (TOP Reset
> Generation Unit) to reset timer after system resets. Add optional
> mediatek,reset-by-toprgu property to enable it.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   .../devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml      | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> index b3605608410c..b4de6b134ce1 100644
> --- a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml
> @@ -52,6 +52,12 @@ properties:
>       description: Disable sending output reset signal
>       type: boolean
>   
> +  mediatek,reset-by-toprgu:
> +    description: The top reset generate unit (toprgu) generates reset signals

TOPRGU = Top Reset Generation Unit

Please fix the description...

The Top Reset Generation Unit (TOPRGU) generate reset signals
and distributes them to each IP. If present, the watchdog timer
will be reset by TOPRGU once system resets.

Apart from that:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


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Re: [PATCH v2 2/2] watchdog: mtk_wdt: Add reset_by_toprgu support

[AngeloGioacchino Del Regno]

Il 16/01/23 11:53, Allen-KH Cheng ha scritto:
> In some cases, the MediaTek watchdog requires the toprgu to reset
> timer after system resets.
> 
> Provide a reset_by_toprgu parameter for configuration.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


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Re: [PATCH v2 2/2] watchdog: mtk_wdt: Add reset_by_toprgu support

[Guenter Roeck]

On 1/16/23 02:53, Allen-KH Cheng wrote:
> In some cases, the MediaTek watchdog requires the toprgu to reset
> timer after system resets.
> 
> Provide a reset_by_toprgu parameter for configuration.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>   drivers/watchdog/mtk_wdt.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
> index 3e6212591e69..a9c437598e7e 100644
> --- a/drivers/watchdog/mtk_wdt.c
> +++ b/drivers/watchdog/mtk_wdt.c
> @@ -50,6 +50,7 @@
>   #define WDT_MODE_IRQ_EN		(1 << 3)
>   #define WDT_MODE_AUTO_START	(1 << 4)
>   #define WDT_MODE_DUAL_EN	(1 << 6)
> +#define WDT_MODE_CNT_SEL	(1 << 8)
>   #define WDT_MODE_KEY		0x22000000
>   
>   #define WDT_SWRST		0x14
> @@ -70,6 +71,7 @@ struct mtk_wdt_dev {
>   	spinlock_t lock; /* protects WDT_SWSYSRST reg */
>   	struct reset_controller_dev rcdev;
>   	bool disable_wdt_extrst;
> +	bool reset_by_toprgu;
>   };
>   
>   struct mtk_wdt_data {
> @@ -279,6 +281,8 @@ static int mtk_wdt_start(struct watchdog_device *wdt_dev)
>   		reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
>   	if (mtk_wdt->disable_wdt_extrst)
>   		reg &= ~WDT_MODE_EXRST_EN;
> +	if (mtk_wdt->reset_by_toprgu)
> +		reg |= WDT_MODE_CNT_SEL;
>   	reg |= (WDT_MODE_EN | WDT_MODE_KEY);
>   	iowrite32(reg, wdt_base + WDT_MODE);
>   
> @@ -408,6 +412,9 @@ static int mtk_wdt_probe(struct platform_device *pdev)
>   	mtk_wdt->disable_wdt_extrst =
>   		of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
>   
> +	mtk_wdt->reset_by_toprgu =
> +		of_property_read_bool(dev->of_node, "mediatek,reset-by-toprgu");
> +
>   	return 0;
>   }
>   


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