[PATCH 0/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[PATCH 0/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[Stefan Wahren]

This series adds the support for chargebyte Tarragon, which is an Electrical
Vehicle Supply Equipment (EVSE) for AC charging stations
(according to IEC 61851, ISO 15118).

The Tarragon board is based on an i.MX6ULL SoC and is available in
4 variants (Master, Slave, SlaveXT, Micro), which provide more or
less peripherals.

Supported features:
  * 512 MB DDR RAM
  * eMMC
  * Debug UART
  * 100 Mbit Ethernet
  * USB 2.0 Host interface
  * Powerline communication (QCA700x)
  * 2x RS485
  * Digital in- and outputs (12 V)
  * One-Wire master for external temp sensors
  * 2x relay outputs
  * 2x motor interfaces
  
The Tarragon hardware is bundled with a charging stack under the name Charge Control C: 
https://chargebyte.com/products/charging-station-communication/charge-control-c

This series is rebased on top of:
https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git?h=for-next

Stefan Wahren (8):
  dt-bindings: vendor-prefixes: add chargebyte
  dt-bindings: Add DS2482/DS2484 as trivial device
  w1: ds2482: add i2c id for ds2484
  dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer
  iio: accel: add support for IIS328DQ variant
  dt-bindings: ARM: fsl: Add chargebyte Tarragon
  ARM: dts: imx6ull: Add chargebyte Tarragon support
  ARM: imx_v6_v7_defconfig: Enable Tarragon peripheral drivers

 .../devicetree/bindings/arm/fsl.yaml          |   9 +
 .../bindings/iio/st,st-sensors.yaml           |   1 +
 .../devicetree/bindings/trivial-devices.yaml  |   4 +
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 arch/arm/boot/dts/Makefile                    |   4 +
 .../arm/boot/dts/imx6ull-tarragon-common.dtsi | 858 ++++++++++++++++++
 arch/arm/boot/dts/imx6ull-tarragon-master.dts |  82 ++
 arch/arm/boot/dts/imx6ull-tarragon-micro.dts  |  10 +
 arch/arm/boot/dts/imx6ull-tarragon-slave.dts  |  32 +
 .../arm/boot/dts/imx6ull-tarragon-slavext.dts |  64 ++
 arch/arm/configs/imx_v6_v7_defconfig          |   6 +
 drivers/iio/accel/st_accel.h                  |   1 +
 drivers/iio/accel/st_accel_core.c             |   1 +
 drivers/iio/accel/st_accel_i2c.c              |   5 +
 drivers/iio/accel/st_accel_spi.c              |   5 +
 drivers/w1/masters/ds2482.c                   |   1 +
 16 files changed, 1085 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-master.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-micro.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slave.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slavext.dts

-- 
2.34.1


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[PATCH 1/8] dt-bindings: vendor-prefixes: add chargebyte

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

chargebyte supplies hardware and software products for all
aspects of charging communication.
https://chargebyte.com/

Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index ed64e06ecca4..b8d8fa1d1fd6 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -240,6 +240,8 @@ patternProperties:
     description: CellWise Microelectronics Co., Ltd
   "^ceva,.*":
     description: Ceva, Inc.
+  "^chargebyte,.*":
+    description: chargebyte GmbH
   "^checkpoint,.*":
     description: Check Point Software Technologies Ltd.
   "^chefree,.*":
-- 
2.34.1


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[PATCH 2/8] dt-bindings: Add DS2482/DS2484 as trivial device

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

Both chips are I2C to 1-wire bridges.

Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 Documentation/devicetree/bindings/trivial-devices.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
index 6f482a254a1d..9b7b24989359 100644
--- a/Documentation/devicetree/bindings/trivial-devices.yaml
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
@@ -183,6 +183,10 @@ properties:
           - maxim,ds1803-050
             # 100 kOhm digital potentiometer with I2C interface
           - maxim,ds1803-100
+            # I2C to 1-wire bridge
+          - maxim,ds2482
+            # I2C to 1-wire bridge
+          - maxim,ds2484
             # 10 kOhm digital potentiometer with I2C interface
           - maxim,ds3502
             # Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
-- 
2.34.1


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[PATCH 3/8] w1: ds2482: add i2c id for ds2484

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

The DS2484 is very similar to the DS2482-100, but also supports a
pin-controlled power-saving sleep mode.

Link: https://www.analog.com/media/en/technical-documentation/data-sheets/DS2484.pdf
Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/w1/masters/ds2482.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/w1/masters/ds2482.c b/drivers/w1/masters/ds2482.c
index 62c44616d8a9..6f6df686e9ad 100644
--- a/drivers/w1/masters/ds2482.c
+++ b/drivers/w1/masters/ds2482.c
@@ -545,6 +545,7 @@ static void ds2482_remove(struct i2c_client *client)
  */
 static const struct i2c_device_id ds2482_id[] = {
 	{ "ds2482", 0 },
+	{ "ds2484", 0 },
 	{ }
 };
 MODULE_DEVICE_TABLE(i2c, ds2482_id);
-- 
2.34.1


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[PATCH 4/8] dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

The ST IIS328DQ is an accelerometer sensor compatible with
the existing ST sensor binding.

Link: https://lore.kernel.org/linux-iio/2bac9ecf-9d2e-967e-9020-1c950487d781@i2se.com/
Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 Documentation/devicetree/bindings/iio/st,st-sensors.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
index c6201976378f..247700537aa8 100644
--- a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
+++ b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml
@@ -25,6 +25,7 @@ properties:
       - description: STMicroelectronics Accelerometers
         enum:
           - st,h3lis331dl-accel
+          - st,iis328dq
           - st,lis2de12
           - st,lis2dw12
           - st,lis2hh12
-- 
2.34.1


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[PATCH 5/8] iio: accel: add support for IIS328DQ variant

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

Add support for ST IIS328DQ accelerometer to the st_accel framework.
The chip is compatible to the LIS331DL.

Link: https://www.st.com/resource/en/datasheet/iis328dq.pdf
Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 drivers/iio/accel/st_accel.h      | 1 +
 drivers/iio/accel/st_accel_core.c | 1 +
 drivers/iio/accel/st_accel_i2c.c  | 5 +++++
 drivers/iio/accel/st_accel_spi.c  | 5 +++++
 4 files changed, 12 insertions(+)

diff --git a/drivers/iio/accel/st_accel.h b/drivers/iio/accel/st_accel.h
index 56ed0c776d4a..e7525615712b 100644
--- a/drivers/iio/accel/st_accel.h
+++ b/drivers/iio/accel/st_accel.h
@@ -39,6 +39,7 @@
 #define LIS302DL_ACCEL_DEV_NAME		"lis302dl"
 #define LSM303C_ACCEL_DEV_NAME		"lsm303c_accel"
 #define SC7A20_ACCEL_DEV_NAME		"sc7a20"
+#define IIS328DQ_ACCEL_DEV_NAME		"iis328dq"
 
 
 #ifdef CONFIG_IIO_BUFFER
diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c
index 6b8562f684d5..5f7d81b44b1d 100644
--- a/drivers/iio/accel/st_accel_core.c
+++ b/drivers/iio/accel/st_accel_core.c
@@ -517,6 +517,7 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
 		.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
 		.sensors_supported = {
 			[0] = H3LIS331DL_ACCEL_DEV_NAME,
+			[1] = IIS328DQ_ACCEL_DEV_NAME,
 		},
 		.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
 		.odr = {
diff --git a/drivers/iio/accel/st_accel_i2c.c b/drivers/iio/accel/st_accel_i2c.c
index 3f02fd5d5946..fb9e2d6f4210 100644
--- a/drivers/iio/accel/st_accel_i2c.c
+++ b/drivers/iio/accel/st_accel_i2c.c
@@ -119,6 +119,10 @@ static const struct of_device_id st_accel_of_match[] = {
 		.compatible = "silan,sc7a20",
 		.data = SC7A20_ACCEL_DEV_NAME,
 	},
+	{
+		.compatible = "st,iis328dq",
+		.data = IIS328DQ_ACCEL_DEV_NAME,
+	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, st_accel_of_match);
@@ -157,6 +161,7 @@ static const struct i2c_device_id st_accel_id_table[] = {
 	{ LIS302DL_ACCEL_DEV_NAME },
 	{ LSM303C_ACCEL_DEV_NAME },
 	{ SC7A20_ACCEL_DEV_NAME },
+	{ IIS328DQ_ACCEL_DEV_NAME },
 	{},
 };
 MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
diff --git a/drivers/iio/accel/st_accel_spi.c b/drivers/iio/accel/st_accel_spi.c
index 5740dc1820bd..f72a24f45322 100644
--- a/drivers/iio/accel/st_accel_spi.c
+++ b/drivers/iio/accel/st_accel_spi.c
@@ -100,6 +100,10 @@ static const struct of_device_id st_accel_of_match[] = {
 		.compatible = "st,lsm303c-accel",
 		.data = LSM303C_ACCEL_DEV_NAME,
 	},
+	{
+		.compatible = "st,iis328dq",
+		.data = IIS328DQ_ACCEL_DEV_NAME,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, st_accel_of_match);
@@ -157,6 +161,7 @@ static const struct spi_device_id st_accel_id_table[] = {
 	{ LIS3DE_ACCEL_DEV_NAME },
 	{ LIS302DL_ACCEL_DEV_NAME },
 	{ LSM303C_ACCEL_DEV_NAME },
+	{ IIS328DQ_ACCEL_DEV_NAME },
 	{},
 };
 MODULE_DEVICE_TABLE(spi, st_accel_id_table);
-- 
2.34.1


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[PATCH 6/8] dt-bindings: ARM: fsl: Add chargebyte Tarragon

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

This adds the compatibles for the chargebyte Tarragon boards.

Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 Documentation/devicetree/bindings/arm/fsl.yaml | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
index dece3e9ba7fd..2b430e20a7a6 100644
--- a/Documentation/devicetree/bindings/arm/fsl.yaml
+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
@@ -781,6 +781,15 @@ properties:
           - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant
           - const: fsl,imx6ull
 
+      - description: chargebyte Tarragon Boards
+        items:
+          - enum:
+              - chargebyte,imx6ull-tarragon-master
+              - chargebyte,imx6ull-tarragon-micro
+              - chargebyte,imx6ull-tarragon-slave
+              - chargebyte,imx6ull-tarragon-slavext
+          - const: fsl,imx6ull
+
       - description: i.MX6ULZ based Boards
         items:
           - enum:
-- 
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[PATCH 7/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

This adds the support for chargebyte Tarragon, which is an Electrical
Vehicle Supply Equipment (EVSE) for AC charging stations
(according to IEC 61851, ISO 15118).

The Tarragon board is based on an i.MX6ULL SoC and is available in
4 variants (Master, Slave, SlaveXT, Micro), which provide more or
less peripherals.

Supported features:
  * 512 MB DDR RAM
  * eMMC
  * Debug UART
  * 100 Mbit Ethernet
  * USB 2.0 Host interface
  * Powerline communication (QCA700x)
  * 2x RS485
  * Digital in- and outputs (12 V)
  * One-Wire master for external temp sensors
  * 2x relay outputs
  * 2x motor interfaces

Link: https://chargebyte.com/products/charging-station-communication/charge-control-c
Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 arch/arm/boot/dts/Makefile                    |   4 +
 .../arm/boot/dts/imx6ull-tarragon-common.dtsi | 858 ++++++++++++++++++
 arch/arm/boot/dts/imx6ull-tarragon-master.dts |  82 ++
 arch/arm/boot/dts/imx6ull-tarragon-micro.dts  |  10 +
 arch/arm/boot/dts/imx6ull-tarragon-slave.dts  |  32 +
 .../arm/boot/dts/imx6ull-tarragon-slavext.dts |  64 ++
 6 files changed, 1050 insertions(+)
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-master.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-micro.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slave.dts
 create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slavext.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index efe4152e5846..aae52a6380bc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -755,6 +755,10 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
 	imx6ull-phytec-segin-lc-rdk-nand.dtb \
 	imx6ull-phytec-tauri-emmc.dtb \
 	imx6ull-phytec-tauri-nand.dtb \
+	imx6ull-tarragon-master.dtb \
+	imx6ull-tarragon-micro.dtb \
+	imx6ull-tarragon-slave.dtb \
+	imx6ull-tarragon-slavext.dtb \
 	imx6ull-tqma6ull2-mba6ulx.dtb \
 	imx6ull-tqma6ull2l-mba6ulx.dtb \
 	imx6ulz-14x14-evk.dtb \
diff --git a/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
new file mode 100644
index 000000000000..1099dd688e80
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
@@ -0,0 +1,858 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+//
+// Copyright (C) 2023 chargebyte GmbH
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "imx6ull.dtsi"
+
+/ {
+	aliases {
+		mmc0 = &usdhc2; /* eMMC */
+	};
+
+	chosen {
+		stdout-path = &uart4;
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 0x20000000>;
+	};
+
+	emmc_pwrseq: emmc-pwrseq {
+		compatible = "mmc-pwrseq-emmc";
+		pinctrl-0 = <&pinctrl_emmc_rst>;
+		pinctrl-names = "default";
+		reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
+	};
+
+	reg_dcdc_3v3: regulator-dcdc-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "dcdc-3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "ldo-1v8";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_status_leds>;
+
+		led1 {
+			label = "evse:green:led1";
+			function = LED_FUNCTION_BOOT;
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "timer";
+		};
+
+		led2 {
+			label = "evse:yellow:led2";
+			function = LED_FUNCTION_PROGRAMMING;
+			color = <LED_COLOR_ID_YELLOW>;
+			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+		};
+
+		led3 {
+			label = "evse:red:led3";
+			function = LED_FUNCTION_HEARTBEAT;
+			color = <LED_COLOR_ID_RED>;
+			gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+};
+
+&adc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_adc_motor
+		     &pinctrl_adc_cp
+		     &pinctrl_adc_pp>;
+	vref-supply = <&vgen1_reg>;
+	status = "okay";
+};
+
+&cpu0 {
+	clock-frequency = <792000000>;
+};
+
+&ecspi2 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi2>;
+	num-cs = <3>;
+	cs-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH
+		    &gpio3 2  GPIO_ACTIVE_HIGH
+		    &gpio3 4  GPIO_ACTIVE_HIGH>;
+};
+
+&ecspi4 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_qca700x_mains_spi>;
+	num-cs = <1>;
+	cs-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet1
+		     &pinctrl_enet1_phy_rst
+		     &pinctrl_enet_mdio>;
+	phy-supply = <&reg_dcdc_3v3>;
+	phy-mode = "rmii";
+	phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <25>;
+	phy-handle = <&ethphy0>;
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_enet1_phy_int>;
+			interrupt-parent = <&gpio2>;
+			interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
+			interrupts-extended = <&gpio2 7 IRQ_TYPE_EDGE_FALLING>;
+			clocks = <&clks IMX6UL_CLK_ENET_REF>;
+			clock-names = "rmii-ref";
+			max-speed = <100>;
+			smsc,disable-energy-detect;
+		};
+	};
+};
+
+&gpio1 {
+	gpio-line-names = "",				/* 0 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",				/* 5 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",				/* 10 */
+			  "",
+			  "",
+			  "CP_INVERT",
+			  "",
+			  "",				/* 15 */
+			  "",
+			  "",
+			  "",
+			  "MOTOR_1_FAULT_N",
+			  "",				/* 20 */
+			  "",
+			  "ROTARY_SWITCH_1_2_N",
+			  "ROTARY_SWITCH_1_4_N",
+			  "ROTARY_SWITCH_1_8_N",
+			  "MOTOR_2_FAULT_N";		/* 25 */
+};
+
+&gpio3 {
+	gpio-line-names = "",				/* 0 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",				/* 5 */
+			  "EXT_GPIO",
+			  "MOTOR_1_DRIVER_IN1_N",
+			  "MOTOR_1_DRIVER_IN2",
+			  "MOTOR_2_DRIVER_IN1",
+			  "STM32_BOOT0",		/* 10 */
+			  "STM32_RST_N",
+			  "RELAY_1_ENABLE",
+			  "RELAY_2_ENABLE",
+			  "",
+			  "",				/* 15 */
+			  "QCA700X_MAINS_BOOTLOADER_N",
+			  "QCA700X_CP_RST_N",
+			  "QCA700X_CP_BOOTLOADER_N",
+			  "",
+			  "DIGITAL_OUT_1",		/* 20 */
+			  "DIGITAL_OUT_2",
+			  "DIGITAL_OUT_3",
+			  "DIGITAL_OUT_4",
+			  "DIGITAL_OUT_5",
+			  "DIGITAL_OUT_6",		/* 25 */
+			  "ROTARY_SWITCH_2_8_N",
+			  "ROTARY_SWITCH_2_4_N",
+			  "ROTARY_SWITCH_2_2_N";
+};
+
+&gpio4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pmic>;
+
+	gpio-line-names = "",				/* 0 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",				/* 5 */
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",				/* 10 */
+			  "",
+			  "",
+			  "BOARD_VARIANT_1",
+			  "BOARD_VARIANT_2",
+			  "BOARD_VARIANT_0",		/* 15 */
+			  "BOARD_VARIANT_3",
+			  "",
+			  "ROTARY_SWITCH_2_1_N",
+			  "",
+			  "DIGITAL_IN_5",		/* 20 */
+			  "",
+			  "",
+			  "DIGITAL_IN_6",
+			  "",
+			  "DIGITAL_IN_1",		/* 25 */
+			  "DIGITAL_IN_2",
+			  "DIGITAL_IN_4",
+			  "DIGITAL_IN_3";
+
+	pmic-int-hog {
+		gpio-hog;
+		gpios = <19 0>;
+		input;
+	};
+};
+
+&gpio5 {
+	gpio-line-names = "ROTARY_SWITCH_1_1_N",	/* 0 */
+			  "",
+			  "RELAY_2_SENSE",
+			  "RELAY_1_SENSE",
+			  "",
+			  "",				/* 5 */
+			  "",
+			  "QCA700X_MAINS_RST_N",
+			  "MOTOR_2_DRIVER_IN2",
+			  "",
+			  "CP_POSITIVE_PEAK_RST",	/* 10 */
+			  "CP_NEGATIVE_PEAK_RST";
+};
+
+&i2c4 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	pinctrl-1 = <&pinctrl_i2c4_gpio>;
+	scl-gpios = <&gpio1 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+	sda-gpios = <&gpio1 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+	status = "okay";
+
+	pfuze3001: pmic@8 {
+		compatible = "fsl,pfuze3001";
+		reg = <0x08>;
+
+		regulators {
+			sw1_reg: sw1 {
+				regulator-name = "SW1";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw2_reg: sw2 {
+				regulator-name = "SW2";
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			sw3_reg: sw3 {
+				regulator-name = "SW3";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1650000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-name = "VSNVS";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vldo1 {
+				regulator-name = "VLDO1";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen2_reg: vldo2 {
+				regulator-name = "VLDO2";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-always-on;
+			};
+
+			vgen3_reg: vccsd {
+				regulator-name = "VCCSD";
+				regulator-min-microvolt = <2850000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen4_reg: v33 {
+				regulator-name = "V33";
+				regulator-min-microvolt = <2850000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vldo3 {
+				regulator-name = "VLDO3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vldo4 {
+				regulator-name = "VLDO4";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+			};
+		};
+	};
+
+	onewire@18 {
+		compatible = "maxim,ds2484";
+		reg = <0x18>;
+	};
+
+	accelerometer@19 {
+		compatible = "st,iis328dq";
+		reg = <0x19>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_accelerometer_int1_snvs>;
+		vdd-supply = <&reg_dcdc_3v3>;
+		vddio-supply = <&reg_dcdc_3v3>;
+		st,drdy-int-pin = <1>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <5 IRQ_TYPE_EDGE_RISING>;
+	};
+};
+
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hog_pins
+		     &pinctrl_gpio_motor
+		     &pinctrl_board_var
+		     &pinctrl_digital_input
+		     &pinctrl_digital_output
+		     &pinctrl_rotary_switch1
+		     &pinctrl_rotary_switch2>;
+
+	tarragon {
+		pinctrl_status_leds: status-ledsgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA09__GPIO3_IO14            0xb0
+				MX6UL_PAD_LCD_DATA10__GPIO3_IO15            0xb0
+				MX6UL_PAD_LCD_DATA14__GPIO3_IO19            0xb0
+			>;
+		};
+
+		pinctrl_adc_motor: adc-motorgrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO00__GPIO1_IO00            0xb0
+				MX6UL_PAD_GPIO1_IO01__GPIO1_IO01            0xb0
+				MX6UL_PAD_GPIO1_IO04__GPIO1_IO04            0xb0
+			>;
+		};
+
+		pinctrl_gpio_motor: gpio-motorgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA02__GPIO3_IO07            0x400000b0
+				MX6UL_PAD_LCD_DATA03__GPIO3_IO08            0x400000b0
+				MX6UL_PAD_LCD_DATA04__GPIO3_IO09            0x400000b0
+				MX6UL_PAD_UART1_RTS_B__GPIO1_IO19           0xb0
+				MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25         0xb0
+			>;
+		};
+
+		pinctrl_adc_cp: adc-cpgrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO02__GPIO1_IO02            0xb0
+				MX6UL_PAD_GPIO1_IO03__GPIO1_IO03            0xb0
+			>;
+		};
+
+		pinctrl_adc_pp: adc-ppgrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO05__GPIO1_IO05            0xb0
+			>;
+		};
+
+		pinctrl_usb_pwr: usb-pwrgrp {
+			fsl,pins = <
+				MX6UL_PAD_SD1_CMD__USB_OTG1_PWR             0xb0
+			>;
+		};
+
+		pinctrl_usb: usbgrp {
+			fsl,pins = <
+				MX6UL_PAD_SD1_CLK__USB_OTG1_OC              0x70b0
+				MX6UL_PAD_SD1_DATA0__ANATOP_OTG1_ID         0x70b0
+			>;
+		};
+
+		pinctrl_enet_mdio: enet-mdiogrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO06__ENET1_MDIO            0x10b0
+				MX6UL_PAD_GPIO1_IO07__ENET1_MDC             0x10b0
+			>;
+		};
+
+		pinctrl_enet1_phy_int: enet1-phy-intgrp {
+			fsl,pins = <
+				MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07           0x10b0
+			>;
+		};
+
+		pinctrl_enet1: enet1grp {
+			fsl,pins = <
+				MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00     0x100b0
+				MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01     0x100b0
+				MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN          0x100b0
+				MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1      0x400000b1
+				MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00     0xb0
+				MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01     0xb0
+				MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN          0xb0
+			>;
+		};
+
+		pinctrl_fan_enable: fan-enablegrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA00__GPIO3_IO05            0x400000b0
+			>;
+		};
+
+		pinctrl_pwm_digital_input_ref: pwm-digital-input-refgrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO09__PWM2_OUT              0xb0
+			>;
+		};
+
+		pinctrl_pwm_fan: pwm-fangrp {
+			fsl,pins = <
+				MX6UL_PAD_JTAG_TCK__PWM7_OUT                0x60a0
+			>;
+		};
+
+		pinctrl_pwm_cp: pinctrl-pwm-cpgrp {
+			fsl,pins = <
+				MX6UL_PAD_JTAG_TRST_B__PWM8_OUT             0x60a0
+			>;
+		};
+
+		pinctrl_rs485_1: rs485-1grp {
+			fsl,pins = <
+				MX6UL_PAD_UART1_CTS_B__GPIO1_IO18           0xb0
+				MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX       0xb0
+				MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX       0xb0
+			>;
+		};
+
+		pinctrl_rs485_2: rs485-2grp {
+			fsl,pins = <
+				MX6UL_PAD_CSI_DATA03__GPIO4_IO24            0x10b0
+				MX6UL_PAD_CSI_DATA01__UART5_DCE_RX          0x10b0
+				MX6UL_PAD_CSI_DATA00__UART5_DCE_TX          0x10b0
+			>;
+		};
+
+		pinctrl_stm32: stm32grp {
+			fsl,pins = <
+				MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX      0x10b0
+				MX6UL_PAD_ENET2_RX_DATA0__UART6_DCE_TX      0x10b0
+			>;
+		};
+
+		pinctrl_ext_uart: ext-uartgrp {
+			fsl,pins = <
+				MX6UL_PAD_ENET2_TX_DATA0__UART7_DCE_RX      0xb0
+				MX6UL_PAD_ENET2_RX_EN__UART7_DCE_TX         0xb0
+			>;
+		};
+
+		pinctrl_i2c4: i2c4grp {
+			fsl,pins = <
+				MX6UL_PAD_UART2_RX_DATA__I2C4_SDA           0x400008b0
+				MX6UL_PAD_UART2_TX_DATA__I2C4_SCL           0x400008b0
+			>;
+		};
+
+		pinctrl_i2c4_gpio: i2c4-gpiogrp {
+			fsl,pins = <
+				MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21         0x400008b0
+				MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20         0x400008b0
+			>;
+		};
+
+		pinctrl_ecspi2: ecspi2grp {
+			fsl,pins = <
+				MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29         0x10b0
+				MX6UL_PAD_LCD_HSYNC__GPIO3_IO02             0xb0
+				MX6UL_PAD_LCD_RESET__GPIO3_IO04             0xb0
+				MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK        0x10b0
+				MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO        0x10b0
+				MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI        0x10b0
+			>;
+		};
+
+		pinctrl_qca700x_cp_int: qca700x-cp-intgrp {
+			fsl,pins = <
+				MX6UL_PAD_SD1_DATA1__GPIO2_IO19             0x10b0
+			>;
+		};
+
+		pinctrl_qca700x_cp_rst: qca700x-cp-rstgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA12__GPIO3_IO17            0x400000b0
+			>;
+		};
+
+		pinctrl_qca700x_cp_btld: qca700x-cp-btldgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA13__GPIO3_IO18            0x400000b0
+			>;
+		};
+
+		pinctrl_qca700x_mains_spi: qca700x-mains-spigrp {
+			fsl,pins = <
+				MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15           0x10b0
+				MX6UL_PAD_ENET2_TX_DATA1__ECSPI4_SCLK       0x10b0
+				MX6UL_PAD_ENET2_TX_CLK__ECSPI4_MISO         0x10b0
+				MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI          0x10b0
+			>;
+		};
+
+		pinctrl_qca700x_mains_btld: qca700x-mains-btldgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA11__GPIO3_IO16            0x400000b0
+			>;
+		};
+
+		pinctrl_uart4: uart4grp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_CLK__UART4_DTE_RX             0xb0
+				MX6UL_PAD_LCD_ENABLE__UART4_DTE_TX          0xb0
+			>;
+		};
+
+		pinctrl_digital_input: digital-inputgrp {
+			fsl,pins = <
+				MX6UL_PAD_CSI_DATA04__GPIO4_IO25            0xb0
+				MX6UL_PAD_CSI_DATA05__GPIO4_IO26            0xb0
+				MX6UL_PAD_CSI_DATA07__GPIO4_IO28            0xb0
+				MX6UL_PAD_CSI_DATA06__GPIO4_IO27            0xb0
+				MX6UL_PAD_CSI_HSYNC__GPIO4_IO20             0xb0
+				MX6UL_PAD_CSI_DATA02__GPIO4_IO23            0xb0
+			>;
+		};
+
+		pinctrl_board_var: board-vargrp {
+			fsl,pins = <
+				MX6UL_PAD_NAND_CLE__GPIO4_IO15              0xb0
+				MX6UL_PAD_NAND_CE0_B__GPIO4_IO13            0xb0
+				MX6UL_PAD_NAND_CE1_B__GPIO4_IO14            0xb0
+				MX6UL_PAD_NAND_DQS__GPIO4_IO16              0xb0
+			>;
+		};
+
+		pinctrl_pmic: pmicgrp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO08__USDHC2_VSELECT        0x70b1
+				MX6UL_PAD_CSI_VSYNC__GPIO4_IO19             0xb0
+			>;
+		};
+
+		pinctrl_digital_output: digital-outputgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA15__GPIO3_IO20            0x400000b0
+				MX6UL_PAD_LCD_DATA16__GPIO3_IO21            0x400000b0
+				MX6UL_PAD_LCD_DATA17__GPIO3_IO22            0x400000b0
+				MX6UL_PAD_LCD_DATA18__GPIO3_IO23            0x400000b0
+				MX6UL_PAD_LCD_DATA19__GPIO3_IO24            0x400000b0
+				MX6UL_PAD_LCD_DATA20__GPIO3_IO25            0x400000b0
+			>;
+		};
+
+		pinctrl_usdhc2: usdhc2grp {
+			fsl,pins = <
+				MX6UL_PAD_NAND_RE_B__USDHC2_CLK             0x7071
+				MX6UL_PAD_NAND_WE_B__USDHC2_CMD             0x7071
+				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0         0x7071
+				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1         0x7071
+				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2         0x7071
+				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3         0x7071
+				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4         0x7071
+				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5         0x7071
+				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6         0x7071
+				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7         0x7071
+			>;
+		};
+
+		pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+			fsl,pins = <
+				MX6UL_PAD_NAND_RE_B__USDHC2_CLK             0x70b1
+				MX6UL_PAD_NAND_WE_B__USDHC2_CMD             0x70b1
+				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0         0x70b1
+				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1         0x70b1
+				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2         0x70b1
+				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3         0x70b1
+				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4         0x70b1
+				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5         0x70b1
+				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6         0x70b1
+				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7         0x70b1
+			>;
+		};
+
+		pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+			fsl,pins = <
+				MX6UL_PAD_NAND_RE_B__USDHC2_CLK             0x70f1
+				MX6UL_PAD_NAND_WE_B__USDHC2_CMD             0x70f1
+				MX6UL_PAD_NAND_DATA00__USDHC2_DATA0         0x70f1
+				MX6UL_PAD_NAND_DATA01__USDHC2_DATA1         0x70f1
+				MX6UL_PAD_NAND_DATA02__USDHC2_DATA2         0x70f1
+				MX6UL_PAD_NAND_DATA03__USDHC2_DATA3         0x70f1
+				MX6UL_PAD_NAND_DATA04__USDHC2_DATA4         0x70f1
+				MX6UL_PAD_NAND_DATA05__USDHC2_DATA5         0x70f1
+				MX6UL_PAD_NAND_DATA06__USDHC2_DATA6         0x70f1
+				MX6UL_PAD_NAND_DATA07__USDHC2_DATA7         0x70f1
+			>;
+		};
+
+		pinctrl_emmc_rst: emmc-rstgrp {
+			fsl,pins = <
+				MX6UL_PAD_NAND_ALE__GPIO4_IO10              0x400010b0
+			>;
+		};
+
+		pinctrl_rotary_switch1: rotary-switch1grp {
+			fsl,pins = <
+				MX6UL_PAD_UART2_CTS_B__GPIO1_IO22           0xb0
+				MX6UL_PAD_UART2_RTS_B__GPIO1_IO23           0xb0
+				MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24         0xb0
+			>;
+		};
+
+		pinctrl_rotary_switch2: rotary-switch2grp {
+			fsl,pins = <
+				MX6UL_PAD_CSI_PIXCLK__GPIO4_IO18            0xb0
+				MX6UL_PAD_LCD_DATA23__GPIO3_IO28            0xb0
+				MX6UL_PAD_LCD_DATA22__GPIO3_IO27            0xb0
+				MX6UL_PAD_LCD_DATA21__GPIO3_IO26            0xb0
+			>;
+		};
+
+		pinctrl_wdog2: wdoggrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_VSYNC__WDOG2_WDOG_B           0x10b0
+			>;
+		};
+
+		pinctrl_hog_pins: hog-pinsgrp {
+			fsl,pins = <
+				MX6UL_PAD_LCD_DATA07__GPIO3_IO12            0x400000b0
+				MX6UL_PAD_LCD_DATA08__GPIO3_IO13            0x400000b0
+				MX6UL_PAD_JTAG_TDI__GPIO1_IO13              0x400070a0
+				MX6UL_PAD_LCD_DATA05__GPIO3_IO10            0x400000b0
+				MX6UL_PAD_LCD_DATA06__GPIO3_IO11            0x400000b0
+			>;
+		};
+	};
+};
+
+&iomuxc_snvs {
+	pinctrl-names = "default_snvs";
+	pinctrl-0 = <&pinctrl_cp_peak_snvs
+		     &pinctrl_gpio_motor_snvs
+		     &pinctrl_rotary_switch1_snvs
+		     &pinctrl_relay_sense_snvs>;
+
+	tarragon {
+		pinctrl_cp_peak_snvs: cp-peak-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10           0x400010b0
+				MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11           0x400010b0
+			>;
+		};
+
+		pinctrl_gpio_motor_snvs: gpio-motor-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08         0x400000b0
+			>;
+		};
+
+		pinctrl_enet1_phy_rst: enet1-phy-rstgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06         0x400010b0
+			>;
+		};
+
+		pinctrl_qca700x_mains_rst: qca700x-mains-rstgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07         0x400000b0
+			>;
+		};
+
+		pinctrl_qca700x_mains_int: qca700x-mains-intgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09         0x10b0
+			>;
+		};
+
+		pinctrl_fan_sense_snvs: fan-sense-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01         0x100a0
+			>;
+		};
+
+		pinctrl_accelerometer_int1_snvs: accelerometer-int1-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05         0x10b0
+			>;
+		};
+
+		pinctrl_relay_sense_snvs: relay-sense-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03         0x100a0
+				MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02         0x100a0
+			>;
+		};
+
+		pinctrl_rotary_switch1_snvs: rotary-switch1-snvsgrp {
+			fsl,pins = <
+				MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00         0xb0
+			>;
+		};
+	};
+};
+
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm_digital_input_ref>;
+	status = "okay";
+};
+
+&pwm8 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm_cp>;
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rs485_1>;
+	status = "okay";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart4>;
+	fsl,dte-mode;
+	status = "okay";
+};
+
+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_rs485_2>;
+};
+
+&uart6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_stm32>;
+	status = "okay";
+};
+
+&uart7 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ext_uart>;
+	status = "okay";
+};
+
+&usbotg1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb
+		     &pinctrl_usb_pwr>;
+	dr_mode = "host";
+	power-active-high;
+	disable-over-current;
+	status = "okay";
+};
+
+&usbotg2 {
+	dr_mode = "host";
+	disable-over-current;
+	status = "okay";
+};
+
+&usbphy1 {
+	fsl,tx-cal-45-dn-ohms = <35>;
+	fsl,tx-cal-45-dp-ohms = <35>;
+};
+
+&usbphy2 {
+	fsl,tx-cal-45-dn-ohms = <35>;
+	fsl,tx-cal-45-dp-ohms = <35>;
+};
+
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+	vmmc-supply = <&sw2_reg>;
+	vqmmc-supply = <&reg_1v8>;
+	mmc-pwrseq = <&emmc_pwrseq>;
+	bus-width = <8>;
+	broken-cd;
+	non-removable;
+	status = "okay";
+};
+
+&wdog1 {
+	status = "disabled";
+};
+
+&wdog2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog2>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-tarragon-master.dts b/arch/arm/boot/dts/imx6ull-tarragon-master.dts
new file mode 100644
index 000000000000..67007ce383e3
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-tarragon-master.dts
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+//
+// Copyright (C) 2023 chargebyte GmbH
+
+#include "imx6ull-tarragon-common.dtsi"
+
+/ {
+	model = "chargebyte Tarragon Master";
+	compatible = "chargebyte,imx6ull-tarragon-master", "fsl,imx6ull";
+
+	fan0: pwm-fan {
+		compatible = "pwm-fan";
+		pwms = <&pwm7 0 40000 PWM_POLARITY_INVERTED>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_fan_sense_snvs>;
+		fan-supply = <&reg_fan>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+	};
+
+	reg_fan: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "fan-supply";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_fan_enable>;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+};
+
+&ecspi2 {
+	status = "okay";
+
+	qca700x_cp: ethernet@0 {
+		reg = <0x0>;
+		compatible = "qca,qca7000";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qca700x_cp_int
+			     &pinctrl_qca700x_cp_rst
+			     &pinctrl_qca700x_cp_btld>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <19 IRQ_TYPE_EDGE_RISING>;
+		spi-cpha;
+		spi-cpol;
+		spi-max-frequency = <16000000>;
+	};
+};
+
+&ecspi4 {
+	status = "okay";
+
+	qca700x_mains: ethernet@0 {
+		reg = <0x0>;
+		compatible = "qca,qca7000";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qca700x_mains_int
+			     &pinctrl_qca700x_mains_rst
+			     &pinctrl_qca700x_mains_btld>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <9 IRQ_TYPE_EDGE_RISING>;
+		spi-cpha;
+		spi-cpol;
+		spi-max-frequency = <16000000>;
+	};
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&pwm7 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm_fan>;
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-tarragon-micro.dts b/arch/arm/boot/dts/imx6ull-tarragon-micro.dts
new file mode 100644
index 000000000000..e471c2005bee
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-tarragon-micro.dts
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+//
+// Copyright (C) 2023 chargebyte GmbH
+
+#include "imx6ull-tarragon-common.dtsi"
+
+/ {
+	model = "chargebyte Tarragon Micro";
+	compatible = "chargebyte,imx6ull-tarragon-micro", "fsl,imx6ull";
+};
diff --git a/arch/arm/boot/dts/imx6ull-tarragon-slave.dts b/arch/arm/boot/dts/imx6ull-tarragon-slave.dts
new file mode 100644
index 000000000000..cee223b5f8e1
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-tarragon-slave.dts
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+//
+// Copyright (C) 2023 chargebyte GmbH
+
+#include "imx6ull-tarragon-common.dtsi"
+
+/ {
+	model = "chargebyte Tarragon Slave";
+	compatible = "chargebyte,imx6ull-tarragon-slave", "fsl,imx6ull";
+};
+
+&ecspi2 {
+	status = "okay";
+
+	qca700x_cp: ethernet@0 {
+		reg = <0x0>;
+		compatible = "qca,qca7000";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qca700x_cp_int
+			     &pinctrl_qca700x_cp_rst
+			     &pinctrl_qca700x_cp_btld>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <19 IRQ_TYPE_EDGE_RISING>;
+		spi-cpha;
+		spi-cpol;
+		spi-max-frequency = <16000000>;
+	};
+};
+
+&fec1 {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6ull-tarragon-slavext.dts b/arch/arm/boot/dts/imx6ull-tarragon-slavext.dts
new file mode 100644
index 000000000000..7fd53b7a4372
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-tarragon-slavext.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+//
+// Copyright (C) 2023 chargebyte GmbH
+
+#include "imx6ull-tarragon-common.dtsi"
+
+/ {
+	model = "chargebyte Tarragon SlaveXT";
+	compatible = "chargebyte,imx6ull-tarragon-slavext", "fsl,imx6ull";
+
+	fan0: pwm-fan {
+		compatible = "pwm-fan";
+		pwms = <&pwm7 0 40000 PWM_POLARITY_INVERTED>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_fan_sense_snvs>;
+		fan-supply = <&reg_fan>;
+		interrupt-parent = <&gpio5>;
+		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
+	};
+
+	reg_fan: regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "fan-supply";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_fan_enable>;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-boot-on;
+	};
+};
+
+&ecspi2 {
+	status = "okay";
+
+	qca700x_cp: ethernet@0 {
+		reg = <0x0>;
+		compatible = "qca,qca7000";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_qca700x_cp_int
+			     &pinctrl_qca700x_cp_rst
+			     &pinctrl_qca700x_cp_btld>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <19 IRQ_TYPE_EDGE_RISING>;
+		spi-cpha;
+		spi-cpol;
+		spi-max-frequency = <16000000>;
+	};
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&pwm7 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm_fan>;
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
-- 
2.34.1


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[PATCH 8/8] ARM: imx_v6_v7_defconfig: Enable Tarragon peripheral drivers

[Stefan Wahren]

From: Stefan Wahren <stefan.wahren@chargebyte.com>

We need to enable some drivers in order to use the following peripherals
of Tarragon:
  * QCA7000/7005 Powerline chip
  * One-Wire Master DS2484 with external thermal sensors
  * external 4 pin PWM fan
  * ST IIS328DQ I2C accelerometer

Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
---
 arch/arm/configs/imx_v6_v7_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 6dc6fed12af8..c854b03fabf2 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -128,6 +128,7 @@ CONFIG_CS89x0_PLATFORM=y
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_MICROCHIP is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+CONFIG_QCA7000_SPI=m
 # CONFIG_NET_VENDOR_SEEQ is not set
 CONFIG_SMC91X=y
 CONFIG_SMC911X=y
@@ -215,6 +216,9 @@ CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCF857X=y
 CONFIG_GPIO_STMPE=y
 CONFIG_GPIO_74X164=y
+CONFIG_W1=m
+CONFIG_W1_MASTER_DS2482=m
+CONFIG_W1_SLAVE_THERM=m
 CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_SYSCON=y
 CONFIG_POWER_RESET_SYSCON_POWEROFF=y
@@ -223,6 +227,7 @@ CONFIG_RN5T618_POWER=m
 CONFIG_SENSORS_MC13783_ADC=y
 CONFIG_SENSORS_GPIO_FAN=y
 CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_SENSORS_PWM_FAN=y
 CONFIG_SENSORS_SY7636A=y
 CONFIG_THERMAL_STATISTICS=y
 CONFIG_THERMAL_WRITABLE_TRIPS=y
@@ -403,6 +408,7 @@ CONFIG_CLK_IMX8MQ=y
 CONFIG_SOC_IMX8M=y
 CONFIG_EXTCON_USB_GPIO=y
 CONFIG_IIO=y
+CONFIG_IIO_ST_ACCEL_3AXIS=m
 CONFIG_MMA8452=y
 CONFIG_IMX7D_ADC=y
 CONFIG_RN5T618_ADC=y
-- 
2.34.1


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Re: [PATCH 1/8] dt-bindings: vendor-prefixes: add chargebyte

[Krzysztof Kozlowski]

On 06/03/2023 18:22, Stefan Wahren wrote:
> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> chargebyte supplies hardware and software products for all
> aspects of charging communication.
> https://chargebyte.com/
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


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Re: [PATCH 2/8] dt-bindings: Add DS2482/DS2484 as trivial device

[Krzysztof Kozlowski]

On 06/03/2023 18:22, Stefan Wahren wrote:
> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> Both chips are I2C to 1-wire bridges.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


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Re: [PATCH 4/8] dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer

[Krzysztof Kozlowski]

On 06/03/2023 18:22, Stefan Wahren wrote:
> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> The ST IIS328DQ is an accelerometer sensor compatible with
> the existing ST sensor binding.

If it is compatible with existing binding, then make it compatible.
Although your driver change suggests it is not compatible...

Best regards,
Krzysztof


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Re: [PATCH 6/8] dt-bindings: ARM: fsl: Add chargebyte Tarragon

[Krzysztof Kozlowski]

On 06/03/2023 18:22, Stefan Wahren wrote:
> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> This adds the compatibles for the chargebyte Tarragon boards.
> 
> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---
>  Documentation/devicetree/bindings/arm/fsl.yaml | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
> index dece3e9ba7fd..2b430e20a7a6 100644
> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
> @@ -781,6 +781,15 @@ properties:
>            - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant
>            - const: fsl,imx6ull
>  
> +      - description: chargebyte Tarragon Boards
> +        items:
> +          - enum:
> +              - chargebyte,imx6ull-tarragon-master
> +              - chargebyte,imx6ull-tarragon-micro
> +              - chargebyte,imx6ull-tarragon-slave
> +              - chargebyte,imx6ull-tarragon-slavext
> +          - const: fsl,imx6ull

I don't think you put it in correct place. Didn't you just stuff it at
the end?

Best regards,
Krzysztof


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Re: [PATCH 7/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[Krzysztof Kozlowski]

On 06/03/2023 18:22, Stefan Wahren wrote:
> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> This adds the support for chargebyte Tarragon, which is an Electrical
> Vehicle Supply Equipment (EVSE) for AC charging stations
> (according to IEC 61851, ISO 15118).
> 
> The Tarragon board is based on an i.MX6ULL SoC and is available in
> 4 variants (Master, Slave, SlaveXT, Micro), which provide more or
> less peripherals.
> 
> Supported features:
>   * 512 MB DDR RAM
>   * eMMC
>   * Debug UART
>   * 100 Mbit Ethernet
>   * USB 2.0 Host interface
>   * Powerline communication (QCA700x)
>   * 2x RS485
>   * Digital in- and outputs (12 V)
>   * One-Wire master for external temp sensors
>   * 2x relay outputs
>   * 2x motor interfaces
> 
> Link: https://chargebyte.com/products/charging-station-communication/charge-control-c
> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
> ---
>  arch/arm/boot/dts/Makefile                    |   4 +
>  .../arm/boot/dts/imx6ull-tarragon-common.dtsi | 858 ++++++++++++++++++
>  arch/arm/boot/dts/imx6ull-tarragon-master.dts |  82 ++
>  arch/arm/boot/dts/imx6ull-tarragon-micro.dts  |  10 +
>  arch/arm/boot/dts/imx6ull-tarragon-slave.dts  |  32 +
>  .../arm/boot/dts/imx6ull-tarragon-slavext.dts |  64 ++
>  6 files changed, 1050 insertions(+)
>  create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
>  create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-master.dts
>  create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-micro.dts
>  create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slave.dts
>  create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slavext.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index efe4152e5846..aae52a6380bc 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -755,6 +755,10 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
>  	imx6ull-phytec-segin-lc-rdk-nand.dtb \
>  	imx6ull-phytec-tauri-emmc.dtb \
>  	imx6ull-phytec-tauri-nand.dtb \
> +	imx6ull-tarragon-master.dtb \
> +	imx6ull-tarragon-micro.dtb \
> +	imx6ull-tarragon-slave.dtb \
> +	imx6ull-tarragon-slavext.dtb \
>  	imx6ull-tqma6ull2-mba6ulx.dtb \
>  	imx6ull-tqma6ull2l-mba6ulx.dtb \
>  	imx6ulz-14x14-evk.dtb \
> diff --git a/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
> new file mode 100644
> index 000000000000..1099dd688e80
> --- /dev/null
> +++ b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
> @@ -0,0 +1,858 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +//
> +// Copyright (C) 2023 chargebyte GmbH
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pwm/pwm.h>
> +#include "imx6ull.dtsi"
> +
> +/ {
> +	aliases {
> +		mmc0 = &usdhc2; /* eMMC */
> +	};
> +
> +	chosen {
> +		stdout-path = &uart4;
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		reg = <0x80000000 0x20000000>;
> +	};
> +
> +	emmc_pwrseq: emmc-pwrseq {
> +		compatible = "mmc-pwrseq-emmc";
> +		pinctrl-0 = <&pinctrl_emmc_rst>;
> +		pinctrl-names = "default";
> +		reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
> +	};
> +
> +	reg_dcdc_3v3: regulator-dcdc-3v3 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "dcdc-3v3";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	reg_1v8: regulator-1v8 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "ldo-1v8";
> +		regulator-min-microvolt = <1800000>;
> +		regulator-max-microvolt = <1800000>;
> +		regulator-boot-on;
> +		regulator-always-on;
> +	};
> +
> +	leds {
> +		compatible = "gpio-leds";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_status_leds>;
> +
> +		led1 {

Does not look like you tested the DTS against bindings. Please run `make
dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
for instructions).

> +			label = "evse:green:led1";

Drop the label.

> +			function = LED_FUNCTION_BOOT;
> +			color = <LED_COLOR_ID_GREEN>;
> +			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
> +			linux,default-trigger = "timer";
> +		};
> +
> +		led2 {
> +			label = "evse:yellow:led2";

Drop the label.

> +			function = LED_FUNCTION_PROGRAMMING;
> +			color = <LED_COLOR_ID_YELLOW>;
> +			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
> +		};
> +
> +		led3 {
> +			label = "evse:red:led3";

Drop the label.

> +			function = LED_FUNCTION_HEARTBEAT;
> +			color = <LED_COLOR_ID_RED>;
> +			gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
> +			linux,default-trigger = "heartbeat";
> +		};
> +	};
> +};

(...)

> +};
> +
> +&usdhc2 {
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc2>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
> +	vmmc-supply = <&sw2_reg>;
> +	vqmmc-supply = <&reg_1v8>;
> +	mmc-pwrseq = <&emmc_pwrseq>;
> +	bus-width = <8>;
> +	broken-cd;
> +	non-removable;

Hm, isn't polling for CD a contradictory to non-removable card? Few
other boards also have it but it looks wrong.

> +	status = "okay";
> +};
> +
> +&wdog1 {
> +	status = "disabled";
> +};


Best regards,
Krzysztof


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Re: [PATCH 7/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[Stefan Wahren]

Hi Krzysztof,

Am 07.03.23 um 09:30 schrieb Krzysztof Kozlowski:
> On 06/03/2023 18:22, Stefan Wahren wrote:
>> From: Stefan Wahren <stefan.wahren@chargebyte.com>
>>
>> This adds the support for chargebyte Tarragon, which is an Electrical
>> Vehicle Supply Equipment (EVSE) for AC charging stations
>> (according to IEC 61851, ISO 15118).
>>
>> The Tarragon board is based on an i.MX6ULL SoC and is available in
>> 4 variants (Master, Slave, SlaveXT, Micro), which provide more or
>> less peripherals.
>>
>> Supported features:
>>    * 512 MB DDR RAM
>>    * eMMC
>>    * Debug UART
>>    * 100 Mbit Ethernet
>>    * USB 2.0 Host interface
>>    * Powerline communication (QCA700x)
>>    * 2x RS485
>>    * Digital in- and outputs (12 V)
>>    * One-Wire master for external temp sensors
>>    * 2x relay outputs
>>    * 2x motor interfaces
>>
>> Link: https://chargebyte.com/products/charging-station-communication/charge-control-c
>> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
>> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
>> ---
>>   arch/arm/boot/dts/Makefile                    |   4 +
>>   .../arm/boot/dts/imx6ull-tarragon-common.dtsi | 858 ++++++++++++++++++
>>   arch/arm/boot/dts/imx6ull-tarragon-master.dts |  82 ++
>>   arch/arm/boot/dts/imx6ull-tarragon-micro.dts  |  10 +
>>   arch/arm/boot/dts/imx6ull-tarragon-slave.dts  |  32 +
>>   .../arm/boot/dts/imx6ull-tarragon-slavext.dts |  64 ++
>>   6 files changed, 1050 insertions(+)
>>   create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
>>   create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-master.dts
>>   create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-micro.dts
>>   create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slave.dts
>>   create mode 100644 arch/arm/boot/dts/imx6ull-tarragon-slavext.dts
>>
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index efe4152e5846..aae52a6380bc 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -755,6 +755,10 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
>>   	imx6ull-phytec-segin-lc-rdk-nand.dtb \
>>   	imx6ull-phytec-tauri-emmc.dtb \
>>   	imx6ull-phytec-tauri-nand.dtb \
>> +	imx6ull-tarragon-master.dtb \
>> +	imx6ull-tarragon-micro.dtb \
>> +	imx6ull-tarragon-slave.dtb \
>> +	imx6ull-tarragon-slavext.dtb \
>>   	imx6ull-tqma6ull2-mba6ulx.dtb \
>>   	imx6ull-tqma6ull2l-mba6ulx.dtb \
>>   	imx6ulz-14x14-evk.dtb \
>> diff --git a/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
>> new file mode 100644
>> index 000000000000..1099dd688e80
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/imx6ull-tarragon-common.dtsi
>> @@ -0,0 +1,858 @@
>> +// SPDX-License-Identifier: GPL-2.0 OR MIT
>> +//
>> +// Copyright (C) 2023 chargebyte GmbH
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/input/input.h>
>> +#include <dt-bindings/leds/common.h>
>> +#include <dt-bindings/pwm/pwm.h>
>> +#include "imx6ull.dtsi"
>> +
>> +/ {
>> +	aliases {
>> +		mmc0 = &usdhc2; /* eMMC */
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = &uart4;
>> +	};
>> +
>> +	memory@80000000 {
>> +		device_type = "memory";
>> +		reg = <0x80000000 0x20000000>;
>> +	};
>> +
>> +	emmc_pwrseq: emmc-pwrseq {
>> +		compatible = "mmc-pwrseq-emmc";
>> +		pinctrl-0 = <&pinctrl_emmc_rst>;
>> +		pinctrl-names = "default";
>> +		reset-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
>> +	};
>> +
>> +	reg_dcdc_3v3: regulator-dcdc-3v3 {
>> +		compatible = "regulator-fixed";
>> +		regulator-name = "dcdc-3v3";
>> +		regulator-min-microvolt = <3300000>;
>> +		regulator-max-microvolt = <3300000>;
>> +		regulator-boot-on;
>> +		regulator-always-on;
>> +	};
>> +
>> +	reg_1v8: regulator-1v8 {
>> +		compatible = "regulator-fixed";
>> +		regulator-name = "ldo-1v8";
>> +		regulator-min-microvolt = <1800000>;
>> +		regulator-max-microvolt = <1800000>;
>> +		regulator-boot-on;
>> +		regulator-always-on;
>> +	};
>> +
>> +	leds {
>> +		compatible = "gpio-leds";
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&pinctrl_status_leds>;
>> +
>> +		led1 {
> Does not look like you tested the DTS against bindings. Please run `make
> dtbs_check` (see Documentation/devicetree/bindings/writing-schema.rst
> for instructions).

I ran make dtbs_check before sending this series. All of these issues in 
the included dtsi files makes it hard to spot DTS specific issues. This 
is the output of make dtbs_check:

   DTC_CHK arch/arm/boot/dts/imx6ull-tarragon-master.dtb
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
nand-controller@1806000: #size-cells:0:0: 0 was expected
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/mtd/nand-controller.yaml
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
nand-controller@1806000: #size-cells:0:0: 0 was expected
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/spba-bus@2000000/spi@200c000/ethernet@0: failed to 
match any schema with compatible: ['qca,qca7000']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/spba-bus@2000000/spi@2014000/ethernet@0: failed to 
match any schema with compatible: ['qca,qca7000']
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
serial@2018000: Unevaluated properties are not allowed ('clock-names', 
'clocks' were unexpected)
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
serial@2020000: Unevaluated properties are not allowed ('clock-names', 
'clocks' were unexpected)
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/spba-bus@2000000/asrc@2034000: failed to match any 
schema with compatible: ['fsl,imx6ul-asrc', 'fsl,imx53-asrc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/spba-bus@2000000/asrc@2034000: failed to match any 
schema with compatible: ['fsl,imx6ul-asrc', 'fsl,imx53-asrc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/tsc@2040000: failed to match any schema with 
compatible: ['fsl,imx6ul-tsc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/anatop@20c8000: failed to match any schema with 
compatible: ['fsl,imx6ul-anatop', 'fsl,imx6q-anatop', 'syscon', 
'simple-mfd']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/anatop@20c8000: failed to match any schema with 
compatible: ['fsl,imx6ul-anatop', 'fsl,imx6q-anatop', 'syscon', 
'simple-mfd']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/usbphy@20c9000: failed to match any schema with 
compatible: ['fsl,imx6ul-usbphy', 'fsl,imx23-usbphy']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/usbphy@20c9000: failed to match any schema with 
compatible: ['fsl,imx6ul-usbphy', 'fsl,imx23-usbphy']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/usbphy@20ca000: failed to match any schema with 
compatible: ['fsl,imx6ul-usbphy', 'fsl,imx23-usbphy']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/usbphy@20ca000: failed to match any schema with 
compatible: ['fsl,imx6ul-usbphy', 'fsl,imx23-usbphy']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/snvs@20cc000: failed to match any schema with 
compatible: ['fsl,sec-v4.0-mon', 'syscon', 'simple-mfd']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/snvs@20cc000/snvs-rtc-lp: failed to match any schema 
with compatible: ['fsl,sec-v4.0-mon-rtc-lp']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/snvs@20cc000/snvs-powerkey: failed to match any schema 
with compatible: ['fsl,sec-v4.0-pwrkey']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/pinctrl@20e0000: failed to match any schema with 
compatible: ['fsl,imx6ul-iomuxc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/iomuxc-gpr@20e4000: failed to match any schema with 
compatible: ['fsl,imx6ul-iomuxc-gpr', 'fsl,imx6q-iomuxc-gpr', 'syscon']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2000000/iomuxc-gpr@20e4000: failed to match any schema with 
compatible: ['fsl,imx6ul-iomuxc-gpr', 'fsl,imx6q-iomuxc-gpr', 'syscon']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usb@2184000: failed to match any schema with 
compatible: ['fsl,imx6ul-usb', 'fsl,imx27-usb']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usb@2184000: failed to match any schema with 
compatible: ['fsl,imx6ul-usb', 'fsl,imx27-usb']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usb@2184200: failed to match any schema with 
compatible: ['fsl,imx6ul-usb', 'fsl,imx27-usb']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usb@2184200: failed to match any schema with 
compatible: ['fsl,imx6ul-usb', 'fsl,imx27-usb']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usbmisc@2184800: failed to match any schema with 
compatible: ['fsl,imx6ul-usbmisc', 'fsl,imx6q-usbmisc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/usbmisc@2184800: failed to match any schema with 
compatible: ['fsl,imx6ul-usbmisc', 'fsl,imx6q-usbmisc']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/weim@21b8000: failed to match any schema with 
compatible: ['fsl,imx6ul-weim', 'fsl,imx6q-weim']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2100000/weim@21b8000: failed to match any schema with 
compatible: ['fsl,imx6ul-weim', 'fsl,imx6q-weim']
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
serial@21f0000: Unevaluated properties are not allowed ('clock-names', 
'clocks' were unexpected)
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
serial@21f4000: Unevaluated properties are not allowed ('clock-names', 
'clocks' were unexpected)
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
/home/stefanw/mainline/arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
serial@21fc000: Unevaluated properties are not allowed ('clock-names', 
'clocks' were unexpected)
     From schema: 
/home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
/soc/bus@2200000/iomuxc-snvs@2290000: failed to match any schema with 
compatible: ['fsl,imx6ull-iomuxc-snvs']
arch/arm/boot/dts/imx6ull-tarragon-master.dtb: /pwm-fan: failed to match 
any schema with compatible: ['pwm-fan']

Can you please point me, what is wrong or did you refer just to the 
deprecated "label" property which doesn't throw a warning in my case?

Did i missed a parameter?

Best regards


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Re: [PATCH 4/8] dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer

[Stefan Wahren]

Hi Krzysztof,

Am 07.03.23 um 09:23 schrieb Krzysztof Kozlowski:
> On 06/03/2023 18:22, Stefan Wahren wrote:
>> From: Stefan Wahren <stefan.wahren@chargebyte.com>
>>
>> The ST IIS328DQ is an accelerometer sensor compatible with
>> the existing ST sensor binding.
> If it is compatible with existing binding, then make it compatible.
> Although your driver change suggests it is not compatible...
since the policy is to make the compatible so specific as possible, i 
will fix the wording here.
>
> Best regards,
> Krzysztof
>
>
> _______________________________________________
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Re: [PATCH 7/8] ARM: dts: imx6ull: Add chargebyte Tarragon support

[Krzysztof Kozlowski]

On 07/03/2023 18:25, Stefan Wahren wrote:
> Hi Krzysztof,
> 

>      From schema: 
> /home/stefanw/mainline/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
> arch/arm/boot/dts/imx6ull-tarragon-master.dtb: 
> /soc/bus@2200000/iomuxc-snvs@2290000: failed to match any schema with 
> compatible: ['fsl,imx6ull-iomuxc-snvs']
> arch/arm/boot/dts/imx6ull-tarragon-master.dtb: /pwm-fan: failed to match 
> any schema with compatible: ['pwm-fan']
> 
> Can you please point me, what is wrong or did you refer just to the 
> deprecated "label" property which doesn't throw a warning in my case?
> 
> Did i missed a parameter?

No, you are right, this will pass the tests. I was pretty sure the regex
for leds will fail here but it turns out it is very flexible and led can
appear anywhere. Anyway the doc states that first form is preferred,
(because it is preferred for all other cases) so: led-1, led-2, led-3



Best regards,
Krzysztof


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Re: [PATCH 6/8] dt-bindings: ARM: fsl: Add chargebyte Tarragon

[Stefan Wahren]

Hi Krzysztof,

Am 07.03.23 um 09:24 schrieb Krzysztof Kozlowski:
> On 06/03/2023 18:22, Stefan Wahren wrote:
>> From: Stefan Wahren <stefan.wahren@chargebyte.com>
>>
>> This adds the compatibles for the chargebyte Tarragon boards.
>>
>> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
>> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
>> ---
>>   Documentation/devicetree/bindings/arm/fsl.yaml | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
>> index dece3e9ba7fd..2b430e20a7a6 100644
>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
>> @@ -781,6 +781,15 @@ properties:
>>             - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant
>>             - const: fsl,imx6ull
>>   
>> +      - description: chargebyte Tarragon Boards
>> +        items:
>> +          - enum:
>> +              - chargebyte,imx6ull-tarragon-master
>> +              - chargebyte,imx6ull-tarragon-micro
>> +              - chargebyte,imx6ull-tarragon-slave
>> +              - chargebyte,imx6ull-tarragon-slavext
>> +          - const: fsl,imx6ull
> I don't think you put it in correct place. Didn't you just stuff it at
> the end?

Yes, i just put it at the end. But to be honest, i'm not sure about the 
order:

armadeus,imx6ull-opos6uldev
..
dh,imx6ull-dhcom-drc02
..
phytec,imx6ull-pbacd10-emmc
..
toradex,colibri-imx6ull-aster
..
kontron,bl-imx6ull
..
tq,imx6ull-tqma6ull2-mba6ulx

Does the order depend on the compatibles and vendor is relevant?

So your expectation was between armadeus and dh?

>
> Best regards,
> Krzysztof
>

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Re: [PATCH 6/8] dt-bindings: ARM: fsl: Add chargebyte Tarragon

[Krzysztof Kozlowski]

On 10/03/2023 11:08, Stefan Wahren wrote:
> Hi Krzysztof,
> 
> Am 07.03.23 um 09:24 schrieb Krzysztof Kozlowski:
>> On 06/03/2023 18:22, Stefan Wahren wrote:
>>> From: Stefan Wahren <stefan.wahren@chargebyte.com>
>>>
>>> This adds the compatibles for the chargebyte Tarragon boards.
>>>
>>> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
>>> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
>>> ---
>>>   Documentation/devicetree/bindings/arm/fsl.yaml | 9 +++++++++
>>>   1 file changed, 9 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml
>>> index dece3e9ba7fd..2b430e20a7a6 100644
>>> --- a/Documentation/devicetree/bindings/arm/fsl.yaml
>>> +++ b/Documentation/devicetree/bindings/arm/fsl.yaml
>>> @@ -781,6 +781,15 @@ properties:
>>>             - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant
>>>             - const: fsl,imx6ull
>>>   
>>> +      - description: chargebyte Tarragon Boards
>>> +        items:
>>> +          - enum:
>>> +              - chargebyte,imx6ull-tarragon-master
>>> +              - chargebyte,imx6ull-tarragon-micro
>>> +              - chargebyte,imx6ull-tarragon-slave
>>> +              - chargebyte,imx6ull-tarragon-slavext
>>> +          - const: fsl,imx6ull
>> I don't think you put it in correct place. Didn't you just stuff it at
>> the end?
> 
> Yes, i just put it at the end. But to be honest, i'm not sure about the 
> order:
> 
> armadeus,imx6ull-opos6uldev
> ..
> dh,imx6ull-dhcom-drc02
> ..
> phytec,imx6ull-pbacd10-emmc
> ..
> toradex,colibri-imx6ull-aster
> ..
> kontron,bl-imx6ull
> ..
> tq,imx6ull-tqma6ull2-mba6ulx
> 
> Does the order depend on the compatibles and vendor is relevant?
> 
> So your expectation was between armadeus and dh?

This I don't know :). I think order was by description (name of board)
but maybe by compatibles.

Best regards,
Krzysztof


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Re: [PATCH 4/8] dt-bindings: iio: st-sensors: Add IIS328DQ accelerometer

[Jonathan Cameron]

On Tue, 7 Mar 2023 18:27:53 +0100
Stefan Wahren <stefan.wahren@i2se.com> wrote:

> Hi Krzysztof,
> 
> Am 07.03.23 um 09:23 schrieb Krzysztof Kozlowski:
> > On 06/03/2023 18:22, Stefan Wahren wrote:  
> >> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> >>
> >> The ST IIS328DQ is an accelerometer sensor compatible with
> >> the existing ST sensor binding.  
> > If it is compatible with existing binding, then make it compatible.
> > Although your driver change suggests it is not compatible...  
> since the policy is to make the compatible so specific as possible, i 
> will fix the wording here.

Driver changes are naming only - which we do want as that isn't discoverable
from the device but it will 'work' fine with a fallback compatible of
st,h3lis331dl-accel be it with wrong device naming exposed to userspace.

Hmm. That shouldn't have the postfix as it's not a multi device package
(which are the cases where we need postfix as they have multiple drivers
binding to different independent things in the one package / part number)

If someone wants to add a compatible of st,h3lis331dl and deprecate
the accel variant that would be fine, but wouldn't help us much here
for a fallback compatible and it's probably not worth the effort.

Historically we've not been doing fallback compatibles right in this
driver but it's probably not worth 'fixing' that for old devices
as the only real benefit would be things working nicely with old kernels.
Nice to not make it worse though.

So I'd like to see this fallback to st,h3lis331dl-accel

Jonathan


> >
> > Best regards,
> > Krzysztof
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel  


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Re: [PATCH 5/8] iio: accel: add support for IIS328DQ variant

[Jonathan Cameron]

On Mon,  6 Mar 2023 18:22:46 +0100
Stefan Wahren <stefan.wahren@i2se.com> wrote:

> From: Stefan Wahren <stefan.wahren@chargebyte.com>
> 
> Add support for ST IIS328DQ accelerometer to the st_accel framework.
> The chip is compatible to the LIS331DL.
> 
> Link: https://www.st.com/resource/en/datasheet/iis328dq.pdf
> Signed-off-by: Stefan Wahren <stefan.wahren@chargebyte.com>
> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>

LGTM. I'll pick up when the binding discussion concludes.
(assuming no other issues raised!)

Jonathan

> ---
>  drivers/iio/accel/st_accel.h      | 1 +
>  drivers/iio/accel/st_accel_core.c | 1 +
>  drivers/iio/accel/st_accel_i2c.c  | 5 +++++
>  drivers/iio/accel/st_accel_spi.c  | 5 +++++
>  4 files changed, 12 insertions(+)
> 
> diff --git a/drivers/iio/accel/st_accel.h b/drivers/iio/accel/st_accel.h
> index 56ed0c776d4a..e7525615712b 100644
> --- a/drivers/iio/accel/st_accel.h
> +++ b/drivers/iio/accel/st_accel.h
> @@ -39,6 +39,7 @@
>  #define LIS302DL_ACCEL_DEV_NAME		"lis302dl"
>  #define LSM303C_ACCEL_DEV_NAME		"lsm303c_accel"
>  #define SC7A20_ACCEL_DEV_NAME		"sc7a20"
> +#define IIS328DQ_ACCEL_DEV_NAME		"iis328dq"
>  
>  
>  #ifdef CONFIG_IIO_BUFFER
> diff --git a/drivers/iio/accel/st_accel_core.c b/drivers/iio/accel/st_accel_core.c
> index 6b8562f684d5..5f7d81b44b1d 100644
> --- a/drivers/iio/accel/st_accel_core.c
> +++ b/drivers/iio/accel/st_accel_core.c
> @@ -517,6 +517,7 @@ static const struct st_sensor_settings st_accel_sensors_settings[] = {
>  		.wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS,
>  		.sensors_supported = {
>  			[0] = H3LIS331DL_ACCEL_DEV_NAME,
> +			[1] = IIS328DQ_ACCEL_DEV_NAME,
>  		},
>  		.ch = (struct iio_chan_spec *)st_accel_12bit_channels,
>  		.odr = {
> diff --git a/drivers/iio/accel/st_accel_i2c.c b/drivers/iio/accel/st_accel_i2c.c
> index 3f02fd5d5946..fb9e2d6f4210 100644
> --- a/drivers/iio/accel/st_accel_i2c.c
> +++ b/drivers/iio/accel/st_accel_i2c.c
> @@ -119,6 +119,10 @@ static const struct of_device_id st_accel_of_match[] = {
>  		.compatible = "silan,sc7a20",
>  		.data = SC7A20_ACCEL_DEV_NAME,
>  	},
> +	{
> +		.compatible = "st,iis328dq",
> +		.data = IIS328DQ_ACCEL_DEV_NAME,
> +	},
>  	{},
>  };
>  MODULE_DEVICE_TABLE(of, st_accel_of_match);
> @@ -157,6 +161,7 @@ static const struct i2c_device_id st_accel_id_table[] = {
>  	{ LIS302DL_ACCEL_DEV_NAME },
>  	{ LSM303C_ACCEL_DEV_NAME },
>  	{ SC7A20_ACCEL_DEV_NAME },
> +	{ IIS328DQ_ACCEL_DEV_NAME },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(i2c, st_accel_id_table);
> diff --git a/drivers/iio/accel/st_accel_spi.c b/drivers/iio/accel/st_accel_spi.c
> index 5740dc1820bd..f72a24f45322 100644
> --- a/drivers/iio/accel/st_accel_spi.c
> +++ b/drivers/iio/accel/st_accel_spi.c
> @@ -100,6 +100,10 @@ static const struct of_device_id st_accel_of_match[] = {
>  		.compatible = "st,lsm303c-accel",
>  		.data = LSM303C_ACCEL_DEV_NAME,
>  	},
> +	{
> +		.compatible = "st,iis328dq",
> +		.data = IIS328DQ_ACCEL_DEV_NAME,
> +	},
>  	{}
>  };
>  MODULE_DEVICE_TABLE(of, st_accel_of_match);
> @@ -157,6 +161,7 @@ static const struct spi_device_id st_accel_id_table[] = {
>  	{ LIS3DE_ACCEL_DEV_NAME },
>  	{ LIS302DL_ACCEL_DEV_NAME },
>  	{ LSM303C_ACCEL_DEV_NAME },
> +	{ IIS328DQ_ACCEL_DEV_NAME },
>  	{},
>  };
>  MODULE_DEVICE_TABLE(spi, st_accel_id_table);


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