[PATCH v2 0/2] Add Crypto Support for J784S4 SoC

[PATCH v2 0/2] Add Crypto Support for J784S4 SoC

[Jayesh Choudhary]

This series adds the crypto node for sa2ul for j784s4 platform.

First patch adds the device-id for NAVSS without which the probe
for dma-controller fails due to 'ti,sci-dev-id' read failure.
Second patch adds the crypto node.

This series has functional dependency on j784s4 k3_soc_id[1] and
PSIL-thread support[2] but it does not affect the boot.

[1]:
<https://lore.kernel.org/all/20230314085500.10597-1-j-choudhary@ti.com/>

[2]:
<https://lore.kernel.org/all/20230308201513.116638-1-j-choudhary@ti.com/>

For testing the crypto support, crypto extra tests and self tests were
enabled and tcrypt tests were used to verify SHA-1/256/512, AES and DES3
algorithms.

Changelog v1->v2:
- add deviceID for mcu_navss as well and add the 'Fixes:' tag
- retain 'Reviewed-by' tag in both patches from v1:
  <https://lore.kernel.org/all/87v8j3v9fc.fsf@kamlesh.i-did-not-set--mail-host-address--so-tickle-me/>

Jayesh Choudhary (2):
  arm64: dts: ti: k3-j784s4-*: Add 'ti,sci-dev-id' for NAVSS nodes
  arm64: dts: ti: k3-j784s4-main: Enable crypto accelerator

 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi    | 20 +++++++++++++++++++
 .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi     |  1 +
 2 files changed, 21 insertions(+)

-- 
2.25.1


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[PATCH v2 1/2] arm64: dts: ti: k3-j784s4-*: Add 'ti,sci-dev-id' for NAVSS nodes

[Jayesh Choudhary]

TISCI device ID for main_navss and mcu_navss nodes are missing in
the device tree. Add them.

Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi       | 1 +
 arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 7edf324ac159..80a1b08c51a8 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -398,6 +398,7 @@ main_navss: bus@30000000 {
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>;
+		ti,sci-dev-id = <280>;
 		dma-coherent;
 		dma-ranges;
 
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 93952af618f6..64bd3dee14aa 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -209,6 +209,7 @@ mcu_navss: bus@28380000{
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>;
+		ti,sci-dev-id = <323>;
 		dma-coherent;
 		dma-ranges;
 
-- 
2.25.1


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[PATCH v2 2/2] arm64: dts: ti: k3-j784s4-main: Enable crypto accelerator

[Jayesh Choudhary]

Add the node for SA2UL to support hardware crypto algorithms,
including SHA-1/256/512, AES, 3DES and AEAD suites.
Add rng node for hardware random number generator.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Kamlesh Gurudasani <kamlesh@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 80a1b08c51a8..8c1474a7bd0f 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -72,6 +72,25 @@ main_pmx0: pinctrl@11c000 {
 		pinctrl-single,function-mask = <0xffffffff>;
 	};
 
+	main_crypto: crypto@4e00000 {
+		compatible = "ti,j721e-sa2ul";
+		reg = <0x00 0x4e00000 0x00 0x1200>;
+		power-domains = <&k3_pds 369 TI_SCI_PD_EXCLUSIVE>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x04e00000 0x00 0x04e00000 0x00 0x30000>;
+
+		dmas = <&main_udmap 0xca40>, <&main_udmap 0x4a40>,
+				<&main_udmap 0x4a41>;
+		dma-names = "tx", "rx1", "rx2";
+
+		rng: rng@4e10000 {
+			compatible = "inside-secure,safexcel-eip76";
+			reg = <0x00 0x4e10000 0x00 0x7d>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		};
+	};
+
 	main_uart0: serial@2800000 {
 		compatible = "ti,j721e-uart", "ti,am654-uart";
 		reg = <0x00 0x02800000 0x00 0x200>;
-- 
2.25.1


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Re: (subset) [PATCH v2 0/2] Add Crypto Support for J784S4 SoC

[Nishanth Menon]

Hi Jayesh Choudhary,

On Tue, 14 Mar 2023 20:56:09 +0530, Jayesh Choudhary wrote:
> This series adds the crypto node for sa2ul for j784s4 platform.
> 
> First patch adds the device-id for NAVSS without which the probe
> for dma-controller fails due to 'ti,sci-dev-id' read failure.
> Second patch adds the crypto node.
> 
> This series has functional dependency on j784s4 k3_soc_id[1] and
> PSIL-thread support[2] but it does not affect the boot.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/2] arm64: dts: ti: k3-j784s4-*: Add 'ti,sci-dev-id' for NAVSS nodes
      commit: 436b288687176bf4d2c1cd25b86173e5a1649a60

Just picked up the fixes part of the series, rest we can look once we
pick up the dependencies together.

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Nishanth Menon <nm@ti.com>

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Re: (subset) [PATCH v2 0/2] Add Crypto Support for J784S4 SoC

[Nishanth Menon]

Hi Jayesh Choudhary,

On Tue, 14 Mar 2023 20:56:09 +0530, Jayesh Choudhary wrote:
> This series adds the crypto node for sa2ul for j784s4 platform.
> 
> First patch adds the device-id for NAVSS without which the probe
> for dma-controller fails due to 'ti,sci-dev-id' read failure.
> Second patch adds the crypto node.
> 
> This series has functional dependency on j784s4 k3_soc_id[1] and
> PSIL-thread support[2] but it does not affect the boot.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
This takes care of the missing patch for actually enabling crypto.

Thank you!

[2/2] arm64: dts: ti: k3-j784s4-main: Enable crypto accelerator
      commit: a43f0ac3851833302174567dadd60f58e24d0f30

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D


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