[PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100

[PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100

[Andre Przywara]

The Allwinner F1C100 SoC didn't see much love since its initial merge in
2018: the originally submitted .dts files were very basic, and didn't
cover such simple peripherals as MMC and SPI.
On top of that the watchdog compatible string was wrong, leading to a
non-functional watchdog and reset functionality.

This series aims to fix that, after the series MMC and SPI work, and
make dtbs_check comes back clean.
This was tested with mounting a filesystem on /dev/mmcblk0 on a
LicheePi Nano, also with accessing the SPI flash through /dev/mtdblock
and mtd_debug. Reboot and watchdog now also work.

Mainline U-Boot recently gained F1C100 support, and those DT updates are
needed there as well to get full MMC and SPI access.

The series is structured as follows:
- Patches 01/14 and 02/14 fix the watchdog, which allows to properly
  reboot the system.
- Patches 03-06 fix some shortcomings of the existing DT files, to make
  them DT binding compliant.
- Patches 07-09 are Jesse's recent MMC patches, with the comments from
  the last version addressed [1].
- Patches 10-12 add SPI support, to enable access to the SPI flash on
  the LicheePi Nano board.
- The final two patches (13/14 and 14/14) add the F1C100 platform to
  the multi_v5_defconfig, since it was not covered by any other
  defconfig before, and an ARMv5 compliant kernel is not commonly
  offered by distributions.

I saw George's series from two years ago to add USB support[2], that
looks good on the first glance, I will comment on that once I did some
testing on that.

Cheers,
Andre

Changelog for the MMC patches [1]:
- bindings doc: extend commit message
- .dtsi: extend commit message, re-order mmc0_pins node, add
  drive-strength
- .dts: extend commit message, add alias, regulator and disable-wp

[1] https://lore.kernel.org/linux-arm-kernel/20220130220325.1983918-1-Mr.Bossman075@gmail.com/
[2] https://lore.kernel.org/linux-usb/20200331170219.267732-1-thirtythreeforty@gmail.com/

Andre Przywara (10):
  dt-bindings: watchdog: sunxi: fix F1C100s compatible
  ARM: dts: suniv: F1C100: fix watchdog compatible
  dt-bindings: arm: sunxi: document LicheePi Nano name
  ARM: dts: suniv: F1C100: fix CPU node
  ARM: dts: suniv: F1C100: fix timer node
  dt-bindings: spi: sunxi: document F1C100 controllers
  ARM: dts: suniv: F1C100: add SPI support
  ARM: dts: suniv: licheepi-nano: add SPI flash
  ARM: configs: sync multi_v5_defconfig from savedefconfig
  ARM: configs: multi_v5: Enable Allwinner F1C100

Jesse Taube (4):
  ARM: dts: suniv: F1C100: add clock and reset macros
  dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible
  ARM: dts: suniv: F1C100: add MMC controllers
  ARM: dts: suniv: licheepi-nano: add microSD card

 .../devicetree/bindings/arm/sunxi.yaml        |   5 +
 .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml |   3 +
 .../bindings/spi/allwinner,sun6i-a31-spi.yaml |   1 +
 .../watchdog/allwinner,sun4i-a10-wdt.yaml     |   2 +-
 .../boot/dts/suniv-f1c100s-licheepi-nano.dts  |  31 ++++++
 arch/arm/boot/dts/suniv-f1c100s.dtsi          | 102 ++++++++++++++++--
 arch/arm/configs/multi_v5_defconfig           |  25 ++---
 7 files changed, 140 insertions(+), 29 deletions(-)

-- 
2.25.1


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[PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible

[Andre Przywara]

The F1C100 series actually features a newer generation watchdog IP, so
the compatible string was wrong.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml   | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
index 43afa24513b9..d90655418d0e 100644
--- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
@@ -29,7 +29,7 @@ properties:
           - const: allwinner,sun6i-a31-wdt
       - items:
           - const: allwinner,suniv-f1c100s-wdt
-          - const: allwinner,sun4i-a10-wdt
+          - const: allwinner,sun6i-a31-wdt
       - const: allwinner,sun20i-d1-wdt
       - items:
           - const: allwinner,sun20i-d1-wdt-reset
-- 
2.25.1


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[PATCH 02/14] ARM: dts: suniv: F1C100: fix watchdog compatible

[Andre Przywara]

The F1C100 series of SoCs actually have their watchdog IP being
compatible with the newer Allwinner generation, not the older one.

The currently described sun4i-a10-wdt actually does not work, neither
the watchdog functionality (just never fires), nor the reset part
(reboot hangs).

Replace the compatible string with the one used by the newer generation.
Verified to work with both the watchdog and reboot functionality on a
LicheePi Nano.

Also add the missing interrupt line and clock source, to make it binding
compliant.

Fixes: 4ba16d17efdd ("ARM: dts: suniv: add initial DTSI file for F1C100s")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 6100d3b75f61..def830101448 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -104,8 +104,10 @@ timer@1c20c00 {
 
 		wdt: watchdog@1c20ca0 {
 			compatible = "allwinner,suniv-f1c100s-wdt",
-				     "allwinner,sun4i-a10-wdt";
+				     "allwinner,sun6i-a31-wdt";
 			reg = <0x01c20ca0 0x20>;
+			interrupts = <16>;
+			clocks = <&osc32k>;
 		};
 
 		uart0: serial@1c25000 {
-- 
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[PATCH 03/14] dt-bindings: arm: sunxi: document LicheePi Nano name

[Andre Przywara]

The top level LicheePi Nano compatible name was never documented in the
bindings, so add the currently used string.

It looks like the manufacturer might be "sipeed" as well, but I will go
with the "licheepi" string that is in the actual .dts for years now.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
index c8a3102c0fde..a7e7b2e79616 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.yaml
+++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
@@ -391,6 +391,11 @@ properties:
           - const: libretech,all-h5-cc-h5
           - const: allwinner,sun50i-h5
 
+      - description: Lichee Pi Nano
+        items:
+          - const: licheepi,licheepi-nano
+          - const: allwinner,suniv-f1c100s
+
       - description: Lichee Pi One
         items:
           - const: licheepi,licheepi-one
-- 
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[PATCH 04/14] ARM: dts: suniv: F1C100: add clock and reset macros

[Andre Przywara]

From: Jesse Taube <mr.bossman075@gmail.com>

Include clock and reset macros and replace magic numbers.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index def830101448..922efd5e9457 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -4,6 +4,9 @@
  * Copyright 2018 Mesih Kilinc <mesihkilinc@gmail.com>
  */
 
+#include <dt-bindings/clock/suniv-ccu-f1c100s.h>
+#include <dt-bindings/reset/suniv-ccu-f1c100s.h>
+
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -82,7 +85,7 @@ pio: pinctrl@1c20800 {
 			compatible = "allwinner,suniv-f1c100s-pinctrl";
 			reg = <0x01c20800 0x400>;
 			interrupts = <38>, <39>, <40>;
-			clocks = <&ccu 37>, <&osc24M>, <&osc32k>;
+			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
 			clock-names = "apb", "hosc", "losc";
 			gpio-controller;
 			interrupt-controller;
@@ -116,8 +119,8 @@ uart0: serial@1c25000 {
 			interrupts = <1>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			clocks = <&ccu 38>;
-			resets = <&ccu 24>;
+			clocks = <&ccu CLK_BUS_UART0>;
+			resets = <&ccu RST_BUS_UART0>;
 			status = "disabled";
 		};
 
@@ -127,8 +130,8 @@ uart1: serial@1c25400 {
 			interrupts = <2>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			clocks = <&ccu 39>;
-			resets = <&ccu 25>;
+			clocks = <&ccu CLK_BUS_UART1>;
+			resets = <&ccu RST_BUS_UART1>;
 			status = "disabled";
 		};
 
@@ -138,8 +141,8 @@ uart2: serial@1c25800 {
 			interrupts = <3>;
 			reg-shift = <2>;
 			reg-io-width = <4>;
-			clocks = <&ccu 40>;
-			resets = <&ccu 26>;
+			clocks = <&ccu CLK_BUS_UART2>;
+			resets = <&ccu RST_BUS_UART2>;
 			status = "disabled";
 		};
 	};
-- 
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[PATCH 05/14] ARM: dts: suniv: F1C100: fix CPU node

[Andre Przywara]

The /cpu node in the f1c100s.dtsi is not spec compliant, it's missing
the reg property, and the corresponding address and size cells
properties.

Add them to make the bindings check pass.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 922efd5e9457..43d342eaf661 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -29,9 +29,13 @@ osc32k: clk-32k {
 	};
 
 	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
 		cpu {
 			compatible = "arm,arm926ej-s";
 			device_type = "cpu";
+			reg = <0x0>;
 		};
 	};
 
-- 
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[PATCH 06/14] ARM: dts: suniv: F1C100: fix timer node

[Andre Przywara]

The Allwinner F1C100s has three timer instances, each with their own
interrupt line.

Add the missing two interrupts to the DT node, to match the DT binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 43d342eaf661..57f8932ef898 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -105,7 +105,7 @@ uart0_pe_pins: uart0-pe-pins {
 		timer@1c20c00 {
 			compatible = "allwinner,suniv-f1c100s-timer";
 			reg = <0x01c20c00 0x90>;
-			interrupts = <13>;
+			interrupts = <13>, <14>, <15>;
 			clocks = <&osc24M>;
 		};
 
-- 
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[PATCH 07/14] dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible

[Andre Przywara]

From: Jesse Taube <mr.bossman075@gmail.com>

The Allwinner F1C100 series contains two MMC controller blocks. From
comparing the data sheets, they seem to be compatible with the one used
in the Allwinner A20: the register layout is the same, and they use the
same separate sample and output clocks design.
The only difference is the missing reset line in the A20 version, but
both the binding and the Linux driver make this optional, so it's still
a fit.

Add the new SoC specific name and require it to be paired with the A20
fallback name, as this is all the driver needs to care about.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml       | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
index 4f62ad6ce50c..76137132500d 100644
--- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
+++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
@@ -55,6 +55,9 @@ properties:
       - items:
           - const: allwinner,sun50i-h616-mmc
           - const: allwinner,sun50i-a100-mmc
+      - items:
+          - const: allwinner,suniv-f1c100s-mmc
+          - const: allwinner,sun7i-a20-mmc
 
   reg:
     maxItems: 1
-- 
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[PATCH 08/14] ARM: dts: suniv: F1C100: add MMC controllers

[Andre Przywara]

From: Jesse Taube <mr.bossman075@gmail.com>

The F1C100 series contains two MMC controllers, where the first one is
typically connected to an (micro)SD card slot (as this is the one the
BROM is able to boot from).
Describe the two controllers in the SoC .dtsi.
We also add the pinctrl description for MMC0, since this is the only
pin set supporting that function anyway, and SD cards are very common
across boards.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 42 ++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 57f8932ef898..6f2f97458fe0 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -69,6 +69,42 @@ otg_sram: sram-section@0 {
 			};
 		};
 
+		mmc0: mmc@1c0f000 {
+			compatible = "allwinner,suniv-f1c100s-mmc",
+				     "allwinner,sun7i-a20-mmc";
+			reg = <0x01c0f000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC0>,
+				 <&ccu CLK_MMC0>,
+				 <&ccu CLK_MMC0_OUTPUT>,
+				 <&ccu CLK_MMC0_SAMPLE>;
+			clock-names = "ahb", "mmc", "output", "sample";
+			resets = <&ccu RST_BUS_MMC0>;
+			reset-names = "ahb";
+			interrupts = <23>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		mmc1: mmc@1c10000 {
+			compatible = "allwinner,suniv-f1c100s-mmc",
+				     "allwinner,sun7i-a20-mmc";
+			reg = <0x01c10000 0x1000>;
+			clocks = <&ccu CLK_BUS_MMC1>,
+				 <&ccu CLK_MMC1>,
+				 <&ccu CLK_MMC1_OUTPUT>,
+				 <&ccu CLK_MMC1_SAMPLE>;
+			clock-names = "ahb", "mmc", "output", "sample";
+			resets = <&ccu RST_BUS_MMC1>;
+			reset-names = "ahb";
+			interrupts = <24>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		ccu: clock@1c20000 {
 			compatible = "allwinner,suniv-f1c100s-ccu";
 			reg = <0x01c20000 0x400>;
@@ -96,6 +132,12 @@ pio: pinctrl@1c20800 {
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
+			mmc0_pins: mmc0-pins {
+				pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
+				function = "mmc0";
+				drive-strength = <30>;
+			};
+
 			uart0_pe_pins: uart0-pe-pins {
 				pins = "PE0", "PE1";
 				function = "uart0";
-- 
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[PATCH 09/14] ARM: dts: suniv: licheepi-nano: add microSD card

[Andre Przywara]

From: Jesse Taube <mr.bossman075@gmail.com>

Enable MMC0 and supply the board setting to enable the microSD card slot
on the LicheePi Nano board.
Apart from the always missing write protect switch on microSD slots,
the card-detect pin is not connected to anything, so we use the
broken-cd property.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Andre: add alias and vmmc supply]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
index a1154e6c7cb5..8fa79a1d1d2d 100644
--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
@@ -11,12 +11,28 @@ / {
 	compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
 
 	aliases {
+		mmc0 = &mmc0;
 		serial0 = &uart0;
 	};
 
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
+
+	reg_vcc3v3: vcc3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+};
+
+&mmc0 {
+	broken-cd;
+	bus-width = <4>;
+	disable-wp;
+	status = "okay";
+	vmmc-supply = <&reg_vcc3v3>;
 };
 
 &uart0 {
-- 
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[PATCH 10/14] dt-bindings: spi: sunxi: document F1C100 controllers

[Andre Przywara]

The Allwinner F1C100 series contains two SPI controllers, which are
compatible to the IP block used in the Allwinner H3 as well.
The only difference in the integration is the missing mod clock in the
F1C100, but that does not affect the SPI controller binding, as we can
still supply the correct clock (AHB parent) easily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml         | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
index 908248260afa..ca4c95345a49 100644
--- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
@@ -26,6 +26,7 @@ properties:
               - allwinner,sun8i-r40-spi
               - allwinner,sun50i-h6-spi
               - allwinner,sun50i-h616-spi
+              - allwinner,suniv-f1c100s-spi
           - const: allwinner,sun8i-h3-spi
 
   reg:
-- 
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[PATCH 11/14] ARM: dts: suniv: F1C100: add SPI support

[Andre Przywara]

The F1C100 series contains two SPI controllers, and many boards use SPI0
for a SPI flash, as the BROM is able to boot from that.

Describe the two controllers in the SoC .dtsi, and also add the PortC
pins for SPI0, since this is where BROM looks at when trying to boot
from the commonly used SPI flash.

The SPI controller seems to be the same as in the H3 chips, but it lacks
a separate mod clock. The manual says it's connected to AHB directly.
We don't export that AHB clock directly, but can use the AHB *gate* clock
as a clock source, since the MMC driver is not supposed to change the AHB
frequency anyway.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 33 ++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 6f2f97458fe0..f8ec1c7a2ca9 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -105,6 +105,34 @@ mmc1: mmc@1c10000 {
 			#size-cells = <0>;
 		};
 
+		spi0: spi@1c05000 {
+			compatible = "allwinner,suniv-f1c100s-spi",
+				     "allwinner,sun8i-h3-spi";
+			reg = <0x01c05000 0x1000>;
+			interrupts = <10>;
+			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
+			clock-names = "ahb", "mod";
+			resets = <&ccu RST_BUS_SPI0>;
+			status = "disabled";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		spi1: spi@1c06000 {
+			compatible = "allwinner,suniv-f1c100s-spi",
+				     "allwinner,sun8i-h3-spi";
+			reg = <0x01c06000 0x1000>;
+			interrupts = <11>;
+			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
+			clock-names = "ahb", "mod";
+			resets = <&ccu RST_BUS_SPI1>;
+			status = "disabled";
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		ccu: clock@1c20000 {
 			compatible = "allwinner,suniv-f1c100s-ccu";
 			reg = <0x01c20000 0x400>;
@@ -138,6 +166,11 @@ mmc0_pins: mmc0-pins {
 				drive-strength = <30>;
 			};
 
+			spi0_pc_pins: spi0-pc-pins {
+				pins = "PC0", "PC1", "PC2", "PC3";
+				function = "spi0";
+			};
+
 			uart0_pe_pins: uart0-pe-pins {
 				pins = "PE0", "PE1";
 				function = "uart0";
-- 
2.25.1


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[PATCH 12/14] ARM: dts: suniv: licheepi-nano: add SPI flash

[Andre Przywara]

Most LicheePi Nano boards come with soldered SPI flash, so enable SPI0
in the .dts and describe the flash chip. There is evidence of different
flash chips used, also of boards with no flash chip soldered, but the
Winbond 16MiB model is the most common, so use that for the compatible
string.  The actual flash chip model will be auto-detected at runtime
anyway.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
index 8fa79a1d1d2d..04e59b8381cb 100644
--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
@@ -13,6 +13,7 @@ / {
 	aliases {
 		mmc0 = &mmc0;
 		serial0 = &uart0;
+		spi0 = &spi0;
 	};
 
 	chosen {
@@ -35,6 +36,20 @@ &mmc0 {
 	vmmc-supply = <&reg_vcc3v3>;
 };
 
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pc_pins>;
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q128", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pe_pins>;
-- 
2.25.1


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[PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Andre Przywara]

Some Kconfig options have changed, some other platforms have been
removed.

Update multi_v5_defconfig with the result of "make savedefconfig", the
resulting .config files are identical.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/configs/multi_v5_defconfig | 20 +-------------------
 1 file changed, 1 insertion(+), 19 deletions(-)

diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig
index fe8d760256a4..8b7fe7ff5366 100644
--- a/arch/arm/configs/multi_v5_defconfig
+++ b/arch/arm/configs/multi_v5_defconfig
@@ -24,11 +24,6 @@ CONFIG_MACH_DM355_LEOPARD=y
 CONFIG_MACH_MITYOMAPL138=y
 CONFIG_MACH_OMAPL138_HAWKBOARD=y
 CONFIG_ARCH_MXC=y
-CONFIG_MACH_MX21ADS=y
-CONFIG_MACH_MX27ADS=y
-CONFIG_MACH_MX27_3DS=y
-CONFIG_MACH_IMX27_VISSTRIM_M10=y
-CONFIG_MACH_PCA100=y
 CONFIG_SOC_IMX25=y
 CONFIG_SOC_IMX27=y
 CONFIG_ARCH_MVEBU=y
@@ -57,11 +52,8 @@ CONFIG_MACH_WNR854T=y
 CONFIG_MACH_RD88F5181L_GE=y
 CONFIG_MACH_RD88F5181L_FXO=y
 CONFIG_MACH_RD88F6183AP_GE=y
-CONFIG_ARCH_U300=y
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_ARM_APPENDED_DTB=y
 CONFIG_ARM_ATAG_DTB_COMPAT=y
 CONFIG_CPU_FREQ=y
@@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
 CONFIG_I2C_AT91=y
 CONFIG_I2C_IMX=y
 CONFIG_I2C_MV64XXX=y
-CONFIG_I2C_NOMADIK=y
 CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_IMX=y
@@ -183,22 +174,13 @@ CONFIG_ORION_WATCHDOG=y
 CONFIG_NPCM7XX_WATCHDOG=y
 CONFIG_IMX2_WDT=y
 CONFIG_MFD_ATMEL_HLCDC=y
-# CONFIG_ABX500_CORE is not set
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_MEDIA_SUPPORT=y
 CONFIG_MEDIA_CAMERA_SUPPORT=y
-CONFIG_V4L_PLATFORM_DRIVERS=y
-CONFIG_VIDEO_ASPEED=m
-CONFIG_VIDEO_ATMEL_ISI=m
 CONFIG_DRM=y
 CONFIG_DRM_ATMEL_HLCDC=m
-CONFIG_DRM_PANEL_SIMPLE=y
-CONFIG_DRM_PANEL_EDP=y
 CONFIG_DRM_ASPEED_GFX=m
-CONFIG_FB_IMX=y
-CONFIG_FB_ATMEL=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
 CONFIG_SOUND=y
 CONFIG_SND=y
 CONFIG_SND_SOC=y
@@ -303,8 +285,8 @@ CONFIG_CRYPTO_DEV_MARVELL_CESA=y
 CONFIG_CRC_CCITT=y
 CONFIG_LIBCRC32C=y
 CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_FS=y
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_DEBUG_PREEMPT is not set
-- 
2.25.1


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[PATCH 14/14] ARM: configs: multi_v5: Enable Allwinner F1C100

[Andre Przywara]

The Kconfig symbols required for the Allwinner F1C100 (MACH_SUNIV) are
currently not selected by any defconfig. sunxi_defconfig only covers the
v7 SoCs, but the F1C100s is ARMv5, so we cannot share a single image.

Add the required symbols to multi_v5_defconfig, to give people some sane
default config when playing around with this chip. This is probably more
important as there are surely not many distros out there supporting
ARMv5 out of the box.

This allows my LicheePi Nano board to boot to a busybox prompt.

The zImage size grows by about 50 KB, in detail:

    text    data     bss     dec     hex   filename
10269442  4284276  678316 15232034 e86c22 vmlinux-old
10348026  4351912  681516 15381454 eab3ce vmlinux-new

14560300			arch/arm/boot/Image-old
14712940			arch/arm/boot/Image-new
6231192				arch/arm/boot/zImage-old
6282928				arch/arm/boot/zImage-new

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/configs/multi_v5_defconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/configs/multi_v5_defconfig b/arch/arm/configs/multi_v5_defconfig
index 8b7fe7ff5366..3130f5f132f5 100644
--- a/arch/arm/configs/multi_v5_defconfig
+++ b/arch/arm/configs/multi_v5_defconfig
@@ -52,6 +52,7 @@ CONFIG_MACH_WNR854T=y
 CONFIG_MACH_RD88F5181L_GE=y
 CONFIG_MACH_RD88F5181L_FXO=y
 CONFIG_MACH_RD88F6183AP_GE=y
+CONFIG_ARCH_SUNXI=y
 CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
 CONFIG_ARM_APPENDED_DTB=y
@@ -135,6 +136,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=6
 CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_ASPEED_VUART=m
+CONFIG_SERIAL_8250_DW=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_ATMEL=y
 CONFIG_SERIAL_ATMEL_CONSOLE=y
@@ -155,6 +157,7 @@ CONFIG_SPI=y
 CONFIG_SPI_ATMEL=y
 CONFIG_SPI_IMX=y
 CONFIG_SPI_ORION=y
+CONFIG_SPI_SUN6I=y
 CONFIG_GPIO_ASPEED=m
 CONFIG_GPIO_ASPEED_SGPIO=y
 CONFIG_GPIO_MXC=y
@@ -171,6 +174,7 @@ CONFIG_THERMAL=y
 CONFIG_KIRKWOOD_THERMAL=y
 CONFIG_AT91SAM9X_WATCHDOG=y
 CONFIG_ORION_WATCHDOG=y
+CONFIG_SUNXI_WATCHDOG=y
 CONFIG_NPCM7XX_WATCHDOG=y
 CONFIG_IMX2_WDT=y
 CONFIG_MFD_ATMEL_HLCDC=y
@@ -231,6 +235,7 @@ CONFIG_MMC_SDHCI_PLTFM=m
 CONFIG_MMC_SDHCI_OF_ASPEED=m
 CONFIG_MMC_ATMELMCI=y
 CONFIG_MMC_MVSDIO=y
+CONFIG_MMC_SUNXI=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_GPIO=y
-- 
2.25.1


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Re: [PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100

[Jesse Taube]

On 3/7/22 09:34, Andre Przywara wrote:
> The Allwinner F1C100 SoC didn't see much love since its initial merge in
> 2018: the originally submitted .dts files were very basic, and didn't
> cover such simple peripherals as MMC and SPI.
> On top of that the watchdog compatible string was wrong, leading to a
> non-functional watchdog and reset functionality.
> 
> This series aims to fix that, after the series MMC and SPI work, and
> make dtbs_check comes back clean.
> This was tested with mounting a filesystem on /dev/mmcblk0 on a
> LicheePi Nano, also with accessing the SPI flash through /dev/mtdblock
> and mtd_debug. Reboot and watchdog now also work.
> 
> Mainline U-Boot recently gained F1C100 support, and those DT updates are
> needed there as well to get full MMC and SPI access.
Thank you so much for doing this Giulio and I really appreciate this. 
I'm sorry I haven't been available lately i have had other activities 
lately.
> The series is structured as follows:
> - Patches 01/14 and 02/14 fix the watchdog, which allows to properly
>    reboot the system.
> - Patches 03-06 fix some shortcomings of the existing DT files, to make
>    them DT binding compliant.
> - Patches 07-09 are Jesse's recent MMC patches, with the comments from
>    the last version addressed [1].
> - Patches 10-12 add SPI support, to enable access to the SPI flash on
>    the LicheePi Nano board.
> - The final two patches (13/14 and 14/14) add the F1C100 platform to
>    the multi_v5_defconfig, since it was not covered by any other
>    defconfig before, and an ARMv5 compliant kernel is not commonly
>    offered by distributions.
> 
> I saw George's series from two years ago to add USB support[2], that
> looks good on the first glance, I will comment on that once I did some
> testing on that.
There are patches for USB host as well. There are working patches 
floating around for the LCD controller, as well as patches for audio, 
but audio only works in 5.2 even though none of the files the patches 
touched have changed since. To test the LCD controller I made a DAC to 
output to VGA unfortunately the blanking regions aren't set to 0v so its 
not to VGA spec but if there is a black boarder it works fine.
> Cheers,
> Andre
> 
> Changelog for the MMC patches [1]:
> - bindings doc: extend commit message
> - .dtsi: extend commit message, re-order mmc0_pins node, add
>    drive-strength
> - .dts: extend commit message, add alias, regulator and disable-wp
> 
> [1] https://lore.kernel.org/linux-arm-kernel/20220130220325.1983918-1-Mr.Bossman075@gmail.com/
> [2] https://lore.kernel.org/linux-usb/20200331170219.267732-1-thirtythreeforty@gmail.com/
> 
> Andre Przywara (10):
>    dt-bindings: watchdog: sunxi: fix F1C100s compatible
>    ARM: dts: suniv: F1C100: fix watchdog compatible
>    dt-bindings: arm: sunxi: document LicheePi Nano name
>    ARM: dts: suniv: F1C100: fix CPU node
>    ARM: dts: suniv: F1C100: fix timer node
>    dt-bindings: spi: sunxi: document F1C100 controllers
>    ARM: dts: suniv: F1C100: add SPI support
>    ARM: dts: suniv: licheepi-nano: add SPI flash
>    ARM: configs: sync multi_v5_defconfig from savedefconfig
>    ARM: configs: multi_v5: Enable Allwinner F1C100
> 
> Jesse Taube (4):
>    ARM: dts: suniv: F1C100: add clock and reset macros
>    dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible
>    ARM: dts: suniv: F1C100: add MMC controllers
>    ARM: dts: suniv: licheepi-nano: add microSD card
> 
>   .../devicetree/bindings/arm/sunxi.yaml        |   5 +
>   .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml |   3 +
>   .../bindings/spi/allwinner,sun6i-a31-spi.yaml |   1 +
>   .../watchdog/allwinner,sun4i-a10-wdt.yaml     |   2 +-
>   .../boot/dts/suniv-f1c100s-licheepi-nano.dts  |  31 ++++++
>   arch/arm/boot/dts/suniv-f1c100s.dtsi          | 102 ++++++++++++++++--
>   arch/arm/configs/multi_v5_defconfig           |  25 ++---
>   7 files changed, 140 insertions(+), 29 deletions(-)
> 

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Re: [PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100

[Giulio Benetti]

Hi Jesse,

On 07/03/22 19:03, Jesse Taube wrote:
> 
> 
> On 3/7/22 09:34, Andre Przywara wrote:
>> The Allwinner F1C100 SoC didn't see much love since its initial merge in
>> 2018: the originally submitted .dts files were very basic, and didn't
>> cover such simple peripherals as MMC and SPI.
>> On top of that the watchdog compatible string was wrong, leading to a
>> non-functional watchdog and reset functionality.
>>
>> This series aims to fix that, after the series MMC and SPI work, and
>> make dtbs_check comes back clean.
>> This was tested with mounting a filesystem on /dev/mmcblk0 on a
>> LicheePi Nano, also with accessing the SPI flash through /dev/mtdblock
>> and mtd_debug. Reboot and watchdog now also work.
>>
>> Mainline U-Boot recently gained F1C100 support, and those DT updates are
>> needed there as well to get full MMC and SPI access.
> Thank you so much for doing this Giulio and I really appreciate this.
> I'm sorry I haven't been available lately i have had other activities
> lately.

I didn't do it, Andre did it :-) I'm full of other things to do too.
Anyway it's great having patches here to be tested and reviewed.
Hope to find some time soon to test them.

-- 
Giulio Benetti
Benetti Engineering sas

>> The series is structured as follows:
>> - Patches 01/14 and 02/14 fix the watchdog, which allows to properly
>>     reboot the system.
>> - Patches 03-06 fix some shortcomings of the existing DT files, to make
>>     them DT binding compliant.
>> - Patches 07-09 are Jesse's recent MMC patches, with the comments from
>>     the last version addressed [1].
>> - Patches 10-12 add SPI support, to enable access to the SPI flash on
>>     the LicheePi Nano board.
>> - The final two patches (13/14 and 14/14) add the F1C100 platform to
>>     the multi_v5_defconfig, since it was not covered by any other
>>     defconfig before, and an ARMv5 compliant kernel is not commonly
>>     offered by distributions.
>>
>> I saw George's series from two years ago to add USB support[2], that
>> looks good on the first glance, I will comment on that once I did some
>> testing on that.
> There are patches for USB host as well. There are working patches
> floating around for the LCD controller, as well as patches for audio,
> but audio only works in 5.2 even though none of the files the patches
> touched have changed since. To test the LCD controller I made a DAC to
> output to VGA unfortunately the blanking regions aren't set to 0v so its
> not to VGA spec but if there is a black boarder it works fine.
>> Cheers,
>> Andre
>>
>> Changelog for the MMC patches [1]:
>> - bindings doc: extend commit message
>> - .dtsi: extend commit message, re-order mmc0_pins node, add
>>     drive-strength
>> - .dts: extend commit message, add alias, regulator and disable-wp
>>
>> [1] https://lore.kernel.org/linux-arm-kernel/20220130220325.1983918-1-Mr.Bossman075@gmail.com/
>> [2] https://lore.kernel.org/linux-usb/20200331170219.267732-1-thirtythreeforty@gmail.com/
>>
>> Andre Przywara (10):
>>     dt-bindings: watchdog: sunxi: fix F1C100s compatible
>>     ARM: dts: suniv: F1C100: fix watchdog compatible
>>     dt-bindings: arm: sunxi: document LicheePi Nano name
>>     ARM: dts: suniv: F1C100: fix CPU node
>>     ARM: dts: suniv: F1C100: fix timer node
>>     dt-bindings: spi: sunxi: document F1C100 controllers
>>     ARM: dts: suniv: F1C100: add SPI support
>>     ARM: dts: suniv: licheepi-nano: add SPI flash
>>     ARM: configs: sync multi_v5_defconfig from savedefconfig
>>     ARM: configs: multi_v5: Enable Allwinner F1C100
>>
>> Jesse Taube (4):
>>     ARM: dts: suniv: F1C100: add clock and reset macros
>>     dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible
>>     ARM: dts: suniv: F1C100: add MMC controllers
>>     ARM: dts: suniv: licheepi-nano: add microSD card
>>
>>    .../devicetree/bindings/arm/sunxi.yaml        |   5 +
>>    .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml |   3 +
>>    .../bindings/spi/allwinner,sun6i-a31-spi.yaml |   1 +
>>    .../watchdog/allwinner,sun4i-a10-wdt.yaml     |   2 +-
>>    .../boot/dts/suniv-f1c100s-licheepi-nano.dts  |  31 ++++++
>>    arch/arm/boot/dts/suniv-f1c100s.dtsi          | 102 ++++++++++++++++--
>>    arch/arm/configs/multi_v5_defconfig           |  25 ++---
>>    7 files changed, 140 insertions(+), 29 deletions(-)
>>


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Re: [PATCH 05/14] ARM: dts: suniv: F1C100: fix CPU node

[Jesse Taube]

On 3/7/22 09:34, Andre Przywara wrote:
> The /cpu node in the f1c100s.dtsi is not spec compliant, it's missing
> the reg property, and the corresponding address and size cells
> properties.
> 
> Add them to make the bindings check pass.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>   arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> index 922efd5e9457..43d342eaf661 100644
> --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> @@ -29,9 +29,13 @@ osc32k: clk-32k {
>   	};
>   
>   	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
>   		cpu {
cpu@0

also is memory node required?

Thanks,
jesse
>   			compatible = "arm,arm926ej-s";
>   			device_type = "cpu";
> +			reg = <0x0>;
>   		};
>   	};
>   

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Re: [PATCH 05/14] ARM: dts: suniv: F1C100: fix CPU node

[Icenowy Zheng]

在 2022-03-07星期一的 21:44 -0500，Jesse Taube写道：
> 
> 
> On 3/7/22 09:34, Andre Przywara wrote:
> > The /cpu node in the f1c100s.dtsi is not spec compliant, it's
> > missing
> > the reg property, and the corresponding address and size cells
> > properties.
> > 
> > Add them to make the bindings check pass.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >   arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 ++++
> >   1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > index 922efd5e9457..43d342eaf661 100644
> > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > @@ -29,9 +29,13 @@ osc32k: clk-32k {
> >         };
> >   
> >         cpus {
> > +               #address-cells = <1>;
> > +               #size-cells = <0>;
> > +
> >                 cpu {
> cpu@0
> 
> also is memory node required?

It should be filled by U-Boot.

> 
> Thanks,
> jesse
> >                         compatible = "arm,arm926ej-s";
> >                         device_type = "cpu";
> > +                       reg = <0x0>;
> >                 };
> >         };
> >   



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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Arnd Bergmann]

On Mon, Mar 7, 2022 at 3:34 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> Some Kconfig options have changed, some other platforms have been
> removed.

Please split this up into logical chunks: list the platforms that were removed
and remove only the lines corresponding to those platforms in one patch,
do functional changes in separate patches each with a reason for doing them,
and cleanups (moving lines to match the savedefconfig output, removing lines
that are now the default) in one final patch.

>  CONFIG_AEABI=y
>  CONFIG_HIGHMEM=y
> -CONFIG_ZBOOT_ROM_TEXT=0x0
> -CONFIG_ZBOOT_ROM_BSS=0x0
>  CONFIG_ARM_APPENDED_DTB=y
>  CONFIG_ARM_ATAG_DTB_COMPAT=y
>  CONFIG_CPU_FREQ=y

These were not removed, what happened here is that 'savedefconfig'
no longer produces the lines because they now match the defaults.

> @@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
>  CONFIG_I2C_AT91=y
>  CONFIG_I2C_IMX=y
>  CONFIG_I2C_MV64XXX=y
> -CONFIG_I2C_NOMADIK=y
>  CONFIG_SPI=y
>  CONFIG_SPI_ATMEL=y
>  CONFIG_SPI_IMX=y

This one is still there. Not sure why it's no longer enabled.

>  CONFIG_REGULATOR_FIXED_VOLTAGE=y
>  CONFIG_MEDIA_SUPPORT=y
>  CONFIG_MEDIA_CAMERA_SUPPORT=y
> -CONFIG_V4L_PLATFORM_DRIVERS=y
> -CONFIG_VIDEO_ASPEED=m
> -CONFIG_VIDEO_ATMEL_ISI=m
>  CONFIG_DRM=y
>  CONFIG_DRM_ATMEL_HLCDC=m
> -CONFIG_DRM_PANEL_SIMPLE=y
> -CONFIG_DRM_PANEL_EDP=y
>  CONFIG_DRM_ASPEED_GFX=m
> -CONFIG_FB_IMX=y
> -CONFIG_FB_ATMEL=y
> -CONFIG_BACKLIGHT_ATMEL_LCDC=y

This doesn't look right at all. If you want to disable graphics support,
please do that in a separate patch and explain why we can't have those
any more. Are you running into problems with the vmlinux size?

>  CONFIG_LIBCRC32C=y
>  CONFIG_DEBUG_INFO=y
> -CONFIG_DEBUG_FS=y
>  CONFIG_MAGIC_SYSRQ=y
> +CONFIG_DEBUG_FS=y
>  CONFIG_DEBUG_KERNEL=y
>  # CONFIG_SCHED_DEBUG is not set
>  # CONFIG_DEBUG_PREEMPT is not set

This should probably go along with the ZBOOT_ROM change, it's
only cosmetic.

        Arnd

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Re: [PATCH 05/14] ARM: dts: suniv: F1C100: fix CPU node

[Andre Przywara]

On Mon, 7 Mar 2022 21:44:15 -0500
Jesse Taube <mr.bossman075@gmail.com> wrote:

Hi,

> On 3/7/22 09:34, Andre Przywara wrote:
> > The /cpu node in the f1c100s.dtsi is not spec compliant, it's missing
> > the reg property, and the corresponding address and size cells
> > properties.
> > 
> > Add them to make the bindings check pass.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >   arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 ++++
> >   1 file changed, 4 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > index 922efd5e9457..43d342eaf661 100644
> > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > @@ -29,9 +29,13 @@ osc32k: clk-32k {
> >   	};
> >   
> >   	cpus {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> >   		cpu {  
> cpu@0

Right, thanks for spotting this. Wondering why make dtbs and make
dtbs_check didn't warn.

> also is memory node required?

As Icenowy said, it's added by U-Boot anyway, filled with the actual
amount of memory. This means you can have a F1C200s instead and it will
work automatically.

Cheers,
Andre

> 
> Thanks,
> jesse
> >   			compatible = "arm,arm926ej-s";
> >   			device_type = "cpu";
> > +			reg = <0x0>;
> >   		};
> >   	};
> >     
> 


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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Andre Przywara]

On Tue, 8 Mar 2022 10:38:37 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

Hi Arnd,

thanks for having a look. I was a bit unsure about the policy of those
changes, so glad to have the discussion.

> On Mon, Mar 7, 2022 at 3:34 PM Andre Przywara <andre.przywara@arm.com> wrote:
> >
> > Some Kconfig options have changed, some other platforms have been
> > removed.  
> 
> Please split this up into logical chunks: list the platforms that were removed
> and remove only the lines corresponding to those platforms in one patch,
> do functional changes in separate patches each with a reason for doing them,
> and cleanups (moving lines to match the savedefconfig output, removing lines
> that are now the default) in one final patch.

Actually this patch is meant to be only about the last past: to sync
multi_v5_defconfig with the output of "make savedefconfig". .config stays
the same. I initially tried to chase down the reason for each line change,
but gave up quickly, because it becomes tedious to learn about this,
especially about symbols that got *removed*. Also Kconfig is somewhat
sensitive, a single "select" or "default" change in one random Kconfig can
affect the result of savedefconfig.

As I noted in the commit message, the .config does *not* change as a result
of this patch, the whole purpose is just to make the next patch clearer.

So I can try find the reason for each removal, if you like, but I am not
sure that's worthwhile? It is my understanding that Kconfig changes tend
to accumulate cruft in the various defconfigs over time. In U-Boot we gave
up on reasoning, and just regularly sync the output of savedefconfig over
to the *_defconfigs, to keep them minimal and meaningful.

And I found Olof's commit 30b10c77837c ("ARM: defconfig: re-run
savedefconfig on multi_v* configs") as a precedence for this kind of cleanup.

> >  CONFIG_AEABI=y
> >  CONFIG_HIGHMEM=y
> > -CONFIG_ZBOOT_ROM_TEXT=0x0
> > -CONFIG_ZBOOT_ROM_BSS=0x0
> >  CONFIG_ARM_APPENDED_DTB=y
> >  CONFIG_ARM_ATAG_DTB_COMPAT=y
> >  CONFIG_CPU_FREQ=y  
> 
> These were not removed, what happened here is that 'savedefconfig'
> no longer produces the lines because they now match the defaults.

Yes, I understand. Is there some policy here, for instance to keep
those in, for clarity?

> > @@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
> >  CONFIG_I2C_AT91=y
> >  CONFIG_I2C_IMX=y
> >  CONFIG_I2C_MV64XXX=y
> > -CONFIG_I2C_NOMADIK=y
> >  CONFIG_SPI=y
> >  CONFIG_SPI_ATMEL=y
> >  CONFIG_SPI_IMX=y  
> 
> This one is still there. Not sure why it's no longer enabled.

It's not in the current .config. From what I can see, it depends on
ARCH_AMBA, which is selected by ARCH_NOMADIK, but that one is not enabled
by multi_v5_defconfig. Not sure if that is an oversight, or a change, a
the dependency is bogus, or something else.

If you find that useful, I can try to find those dependency chains for the
other options, but I definitely lack the knowledge about the history of
those old platforms, so I can't reason about them. But I could present you
the findings and you can then say what to do?

> >  CONFIG_REGULATOR_FIXED_VOLTAGE=y
> >  CONFIG_MEDIA_SUPPORT=y
> >  CONFIG_MEDIA_CAMERA_SUPPORT=y
> > -CONFIG_V4L_PLATFORM_DRIVERS=y
> > -CONFIG_VIDEO_ASPEED=m
> > -CONFIG_VIDEO_ATMEL_ISI=m
> >  CONFIG_DRM=y
> >  CONFIG_DRM_ATMEL_HLCDC=m
> > -CONFIG_DRM_PANEL_SIMPLE=y
> > -CONFIG_DRM_PANEL_EDP=y
> >  CONFIG_DRM_ASPEED_GFX=m
> > -CONFIG_FB_IMX=y
> > -CONFIG_FB_ATMEL=y
> > -CONFIG_BACKLIGHT_ATMEL_LCDC=y  
> 
> This doesn't look right at all. If you want to disable graphics support,
> please do that in a separate patch and explain why we can't have those
> any more. Are you running into problems with the vmlinux size?

As I mentioned, the .config didn't change at all, so those options are
already not included in mainline anymore.

AFAICS, those last options depend on CONFIG_FB, which isn't enabled. Is
that a regression due to the recent fbdev changes?

Cheers,
Andre

> 
> >  CONFIG_LIBCRC32C=y
> >  CONFIG_DEBUG_INFO=y
> > -CONFIG_DEBUG_FS=y
> >  CONFIG_MAGIC_SYSRQ=y
> > +CONFIG_DEBUG_FS=y
> >  CONFIG_DEBUG_KERNEL=y
> >  # CONFIG_SCHED_DEBUG is not set
> >  # CONFIG_DEBUG_PREEMPT is not set  
> 
> This should probably go along with the ZBOOT_ROM change, it's
> only cosmetic.
> 
>         Arnd


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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Arnd Bergmann]

On Tue, Mar 8, 2022 at 1:07 PM Andre Przywara <andre.przywara@arm.com> wrote:
> On Tue, 8 Mar 2022 10:38:37 +0100 Arnd Bergmann <arnd@arndb.de> wrote:
> > On Mon, Mar 7, 2022 at 3:34 PM Andre Przywara <andre.przywara@arm.com> wrote:
> > >
> > > Some Kconfig options have changed, some other platforms have been
> > > removed.
> >
> > Please split this up into logical chunks: list the platforms that were removed
> > and remove only the lines corresponding to those platforms in one patch,
> > do functional changes in separate patches each with a reason for doing them,
> > and cleanups (moving lines to match the savedefconfig output, removing lines
> > that are now the default) in one final patch.
>
> Actually this patch is meant to be only about the last past: to sync
> multi_v5_defconfig with the output of "make savedefconfig". .config stays
> the same. I initially tried to chase down the reason for each line change,
> but gave up quickly, because it becomes tedious to learn about this,
> especially about symbols that got *removed*. Also Kconfig is somewhat
> sensitive, a single "select" or "default" change in one random Kconfig can
> affect the result of savedefconfig.
>
> As I noted in the commit message, the .config does *not* change as a result
> of this patch, the whole purpose is just to make the next patch clearer.

Ok, then just change the symbols that move around, not the ones that
may have gone missing unintentionally.

> So I can try find the reason for each removal, if you like, but I am not
> sure that's worthwhile? It is my understanding that Kconfig changes tend
> to accumulate cruft in the various defconfigs over time. In U-Boot we gave
> up on reasoning, and just regularly sync the output of savedefconfig over
> to the *_defconfigs, to keep them minimal and meaningful.
>
> And I found Olof's commit 30b10c77837c ("ARM: defconfig: re-run
> savedefconfig on multi_v* configs") as a precedence for this kind of cleanup.

I know, but I never liked doing this because it hides regressions.

> > >  CONFIG_AEABI=y
> > >  CONFIG_HIGHMEM=y
> > > -CONFIG_ZBOOT_ROM_TEXT=0x0
> > > -CONFIG_ZBOOT_ROM_BSS=0x0
> > >  CONFIG_ARM_APPENDED_DTB=y
> > >  CONFIG_ARM_ATAG_DTB_COMPAT=y
> > >  CONFIG_CPU_FREQ=y
> >
> > These were not removed, what happened here is that 'savedefconfig'
> > no longer produces the lines because they now match the defaults.
>
> Yes, I understand. Is there some policy here, for instance to keep
> those in, for clarity?

In this case, as with the moving lines around, there is no functional
change at all, and doing the same thing on older kernels will still
result in the same behavior. I'm not worried about those at all, so
just put them all into one patch.

> > > @@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
> > >  CONFIG_I2C_AT91=y
> > >  CONFIG_I2C_IMX=y
> > >  CONFIG_I2C_MV64XXX=y
> > > -CONFIG_I2C_NOMADIK=y
> > >  CONFIG_SPI=y
> > >  CONFIG_SPI_ATMEL=y
> > >  CONFIG_SPI_IMX=y
> >
> > This one is still there. Not sure why it's no longer enabled.
>
> It's not in the current .config. From what I can see, it depends on
> ARCH_AMBA, which is selected by ARCH_NOMADIK, but that one is not enabled
> by multi_v5_defconfig. Not sure if that is an oversight, or a change, a
> the dependency is bogus, or something else.
>
> If you find that useful, I can try to find those dependency chains for the
> other options, but I definitely lack the knowledge about the history of
> those old platforms, so I can't reason about them. But I could present you
> the findings and you can then say what to do?

I see this was the result of 66e0c12f9e17 ("ARM: nomadik: switch to use the
Nomadik I2C driver"). It's ok to remove this line and others like it,
just explain
what happened for these, as the driver is still enabled.

> > >  CONFIG_REGULATOR_FIXED_VOLTAGE=y
> > >  CONFIG_MEDIA_SUPPORT=y
> > >  CONFIG_MEDIA_CAMERA_SUPPORT=y
> > > -CONFIG_V4L_PLATFORM_DRIVERS=y
> > > -CONFIG_VIDEO_ASPEED=m
> > > -CONFIG_VIDEO_ATMEL_ISI=m
> > >  CONFIG_DRM=y
> > >  CONFIG_DRM_ATMEL_HLCDC=m
> > > -CONFIG_DRM_PANEL_SIMPLE=y
> > > -CONFIG_DRM_PANEL_EDP=y
> > >  CONFIG_DRM_ASPEED_GFX=m
> > > -CONFIG_FB_IMX=y
> > > -CONFIG_FB_ATMEL=y
> > > -CONFIG_BACKLIGHT_ATMEL_LCDC=y
> >
> > This doesn't look right at all. If you want to disable graphics support,
> > please do that in a separate patch and explain why we can't have those
> > any more. Are you running into problems with the vmlinux size?
>
> As I mentioned, the .config didn't change at all, so those options are
> already not included in mainline anymore.
>
> AFAICS, those last options depend on CONFIG_FB, which isn't enabled. Is
> that a regression due to the recent fbdev changes?

Correct, this part was clearly unintentional, and I don't ever want to see
a patch to remove lines like these with a changelog text that fails to
explain why we want them to be removed. We clearly have platforms
that are enabled in multi_v5_config that use some of those drivers, and
we had users that wanted them to be enabled.

I think there are three separate issues here: FB_IMX and FB_ATMEL
broke because of f611b1e7624c ("drm: Avoid circular dependencies for
CONFIG_FB"), VIDEO_ASPEED and VIDEO_ATMEL_ISI  broke
during b0cd4fb27665 ("media: Kconfig: on !EMBEDDED && !EXPERT,
enable driver filtering"), and PANEL_EDP was introduced in 310720875efa
("ARM: configs: Everyone who had PANEL_SIMPLE now gets
PANEL_EDP") without the option ever making it in [1]. These are all
bugs that need to be addressed individually, and not just in a single
defconfig file but across all the affected platforms.

         Arnd

[1] https://lore.kernel.org/all/CAD=FV=VbYcdSqxLHdSaDPh=X0hbW6VWV0mM-iFy3k0J1q+6MWg@mail.gmail.com/

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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Arnd Bergmann]

On Tue, Mar 8, 2022 at 1:07 PM Andre Przywara <andre.przywara@arm.com> wrote:
> If you find that useful, I can try to find those dependency chains for the
> other options, but I definitely lack the knowledge about the history of
> those old platforms, so I can't reason about them. But I could present you
> the findings and you can then say what to do?

Back to this point: the most interesting ones are those that broke because of
some added dependency, or an option that got renamed. This is what I would
use to find the root cause in a scripted way (after identifying the last "good"
version):

$ git bisect run bash -c "make -s O=obj-arm ARCH=arm
multi_v5_defconfig && grep CONFIG_DRM_PANEL_SIMPLE  obj-arm/.config"

You can group the ones that went away because of a deleted platform
or driver, or those that are just default-enabled now, but for cases that
no longer use a driver that may be needed by some platform, just
having the information about what patch broke them usually tells us
what happened. We still need to decide on an appropriate action then,
which could be to include the new dependency explicitly, or to remove
the entire platform that used the driver because we find that the maintainers
never noticed it breaking.

         Arnd

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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Nicolas Ferre]

On 08/03/2022 at 13:07, Andre Przywara wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Tue, 8 Mar 2022 10:38:37 +0100
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> Hi Arnd,
> 
> thanks for having a look. I was a bit unsure about the policy of those
> changes, so glad to have the discussion.
> 
>> On Mon, Mar 7, 2022 at 3:34 PM Andre Przywara <andre.przywara@arm.com> wrote:
>>>
>>> Some Kconfig options have changed, some other platforms have been
>>> removed.
>>
>> Please split this up into logical chunks: list the platforms that were removed
>> and remove only the lines corresponding to those platforms in one patch,
>> do functional changes in separate patches each with a reason for doing them,
>> and cleanups (moving lines to match the savedefconfig output, removing lines
>> that are now the default) in one final patch.
> 
> Actually this patch is meant to be only about the last past: to sync
> multi_v5_defconfig with the output of "make savedefconfig". .config stays
> the same. I initially tried to chase down the reason for each line change,
> but gave up quickly, because it becomes tedious to learn about this,
> especially about symbols that got *removed*. Also Kconfig is somewhat
> sensitive, a single "select" or "default" change in one random Kconfig can
> affect the result of savedefconfig.
> 
> As I noted in the commit message, the .config does *not* change as a result
> of this patch, the whole purpose is just to make the next patch clearer.
> 
> So I can try find the reason for each removal, if you like, but I am not
> sure that's worthwhile? It is my understanding that Kconfig changes tend
> to accumulate cruft in the various defconfigs over time. In U-Boot we gave
> up on reasoning, and just regularly sync the output of savedefconfig over
> to the *_defconfigs, to keep them minimal and meaningful.
> 
> And I found Olof's commit 30b10c77837c ("ARM: defconfig: re-run
> savedefconfig on multi_v* configs") as a precedence for this kind of cleanup.
> 
>>>   CONFIG_AEABI=y
>>>   CONFIG_HIGHMEM=y
>>> -CONFIG_ZBOOT_ROM_TEXT=0x0
>>> -CONFIG_ZBOOT_ROM_BSS=0x0
>>>   CONFIG_ARM_APPENDED_DTB=y
>>>   CONFIG_ARM_ATAG_DTB_COMPAT=y
>>>   CONFIG_CPU_FREQ=y
>>
>> These were not removed, what happened here is that 'savedefconfig'
>> no longer produces the lines because they now match the defaults.
> 
> Yes, I understand. Is there some policy here, for instance to keep
> those in, for clarity?
> 
>>> @@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
>>>   CONFIG_I2C_AT91=y
>>>   CONFIG_I2C_IMX=y
>>>   CONFIG_I2C_MV64XXX=y
>>> -CONFIG_I2C_NOMADIK=y
>>>   CONFIG_SPI=y
>>>   CONFIG_SPI_ATMEL=y
>>>   CONFIG_SPI_IMX=y
>>
>> This one is still there. Not sure why it's no longer enabled.
> 
> It's not in the current .config. From what I can see, it depends on
> ARCH_AMBA, which is selected by ARCH_NOMADIK, but that one is not enabled
> by multi_v5_defconfig. Not sure if that is an oversight, or a change, a
> the dependency is bogus, or something else.
> 
> If you find that useful, I can try to find those dependency chains for the
> other options, but I definitely lack the knowledge about the history of
> those old platforms, so I can't reason about them. But I could present you
> the findings and you can then say what to do?
> 
>>>   CONFIG_REGULATOR_FIXED_VOLTAGE=y
>>>   CONFIG_MEDIA_SUPPORT=y
>>>   CONFIG_MEDIA_CAMERA_SUPPORT=y
>>> -CONFIG_V4L_PLATFORM_DRIVERS=y
>>> -CONFIG_VIDEO_ASPEED=m
>>> -CONFIG_VIDEO_ATMEL_ISI=m
>>>   CONFIG_DRM=y
>>>   CONFIG_DRM_ATMEL_HLCDC=m
>>> -CONFIG_DRM_PANEL_SIMPLE=y
>>> -CONFIG_DRM_PANEL_EDP=y
>>>   CONFIG_DRM_ASPEED_GFX=m
>>> -CONFIG_FB_IMX=y
>>> -CONFIG_FB_ATMEL=y
>>> -CONFIG_BACKLIGHT_ATMEL_LCDC=y
>>
>> This doesn't look right at all. If you want to disable graphics support,
>> please do that in a separate patch and explain why we can't have those
>> any more. Are you running into problems with the vmlinux size?
> 
> As I mentioned, the .config didn't change at all, so those options are
> already not included in mainline anymore.

As far as I'm concerned and only talking about the drivers, I would 
prefer that we keep the following config options activated in the .config:

CONFIG_VIDEO_ATMEL_ISI=m
CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y

The question to know if they are activated by default or not and if the 
associated stack is selected or not, well... I lost track of this, sorry.

Regards,
   Nicolas


> AFAICS, those last options depend on CONFIG_FB, which isn't enabled. Is
> that a regression due to the recent fbdev changes?
> 
> Cheers,
> Andre
> 
>>
>>>   CONFIG_LIBCRC32C=y
>>>   CONFIG_DEBUG_INFO=y
>>> -CONFIG_DEBUG_FS=y
>>>   CONFIG_MAGIC_SYSRQ=y
>>> +CONFIG_DEBUG_FS=y
>>>   CONFIG_DEBUG_KERNEL=y
>>>   # CONFIG_SCHED_DEBUG is not set
>>>   # CONFIG_DEBUG_PREEMPT is not set
>>
>> This should probably go along with the ZBOOT_ROM change, it's
>> only cosmetic.
>>
>>          Arnd
> 
> 
> _______________________________________________
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> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel


-- 
Nicolas Ferre

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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Arnd Bergmann]

On Tue, Mar 8, 2022 at 3:30 PM Nicolas Ferre
<nicolas.ferre@microchip.com> wrote:
> On 08/03/2022 at 13:07, Andre Przywara wrote:
>
> As far as I'm concerned and only talking about the drivers, I would
> prefer that we keep the following config options activated in the .config:
>
> CONFIG_VIDEO_ATMEL_ISI=m
> CONFIG_DRM_PANEL_SIMPLE=y
> CONFIG_FB_ATMEL=y
> CONFIG_BACKLIGHT_ATMEL_LCDC=y
>
> The question to know if they are activated by default or not and if the
> associated stack is selected or not, well... I lost track of this, sorry.

These are actually missing, I think the two options we need to
enable are:

CONFIG_MEDIA_PLATFORM_SUPPORT=y
CONFIG_FB=y

All the other options that get removed are either now the default,
or are no longer part of the kernel.

         Arnd

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Re: [PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible

[Rob Herring]

On Mon, 07 Mar 2022 14:34:08 +0000, Andre Przywara wrote:
> The F1C100 series actually features a newer generation watchdog IP, so
> the compatible string was wrong.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml   | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 03/14] dt-bindings: arm: sunxi: document LicheePi Nano name

[Rob Herring]

On Mon, 07 Mar 2022 14:34:10 +0000, Andre Przywara wrote:
> The top level LicheePi Nano compatible name was never documented in the
> bindings, so add the currently used string.
> 
> It looks like the manufacturer might be "sipeed" as well, but I will go
> with the "licheepi" string that is in the actual .dts for years now.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 07/14] dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible

[Rob Herring]

On Mon, 07 Mar 2022 14:34:14 +0000, Andre Przywara wrote:
> From: Jesse Taube <mr.bossman075@gmail.com>
> 
> The Allwinner F1C100 series contains two MMC controller blocks. From
> comparing the data sheets, they seem to be compatible with the one used
> in the Allwinner A20: the register layout is the same, and they use the
> same separate sample and output clocks design.
> The only difference is the missing reset line in the A20 version, but
> both the binding and the Linux driver make this optional, so it's still
> a fit.
> 
> Add the new SoC specific name and require it to be paired with the A20
> fallback name, as this is all the driver needs to care about.
> 
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml       | 3 +++
>  1 file changed, 3 insertions(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 10/14] dt-bindings: spi: sunxi: document F1C100 controllers

[Rob Herring]

On Mon, 07 Mar 2022 14:34:17 +0000, Andre Przywara wrote:
> The Allwinner F1C100 series contains two SPI controllers, which are
> compatible to the IP block used in the Allwinner H3 as well.
> The only difference in the integration is the missing mod clock in the
> F1C100, but that does not affect the SPI controller binding, as we can
> still supply the correct clock (AHB parent) easily.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml         | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible

[Guenter Roeck]

On Mon, Mar 07, 2022 at 02:34:08PM +0000, Andre Przywara wrote:
> The F1C100 series actually features a newer generation watchdog IP, so
> the compatible string was wrong.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Acked-by: Rob Herring <robh@kernel.org>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

> ---
>  .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml   | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> index 43afa24513b9..d90655418d0e 100644
> --- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> @@ -29,7 +29,7 @@ properties:
>            - const: allwinner,sun6i-a31-wdt
>        - items:
>            - const: allwinner,suniv-f1c100s-wdt
> -          - const: allwinner,sun4i-a10-wdt
> +          - const: allwinner,sun6i-a31-wdt
>        - const: allwinner,sun20i-d1-wdt
>        - items:
>            - const: allwinner,sun20i-d1-wdt-reset

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Re: [PATCH 02/14] ARM: dts: suniv: F1C100: fix watchdog compatible

[Guenter Roeck]

On Mon, Mar 07, 2022 at 02:34:09PM +0000, Andre Przywara wrote:
> The F1C100 series of SoCs actually have their watchdog IP being
> compatible with the newer Allwinner generation, not the older one.
> 
> The currently described sun4i-a10-wdt actually does not work, neither
> the watchdog functionality (just never fires), nor the reset part
> (reboot hangs).
> 
> Replace the compatible string with the one used by the newer generation.
> Verified to work with both the watchdog and reboot functionality on a
> LicheePi Nano.
> 
> Also add the missing interrupt line and clock source, to make it binding
> compliant.
> 
> Fixes: 4ba16d17efdd ("ARM: dts: suniv: add initial DTSI file for F1C100s")
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Guenter Roeck <linux@roeck-us.net>

> ---
>  arch/arm/boot/dts/suniv-f1c100s.dtsi | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> index 6100d3b75f61..def830101448 100644
> --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> @@ -104,8 +104,10 @@ timer@1c20c00 {
>  
>  		wdt: watchdog@1c20ca0 {
>  			compatible = "allwinner,suniv-f1c100s-wdt",
> -				     "allwinner,sun4i-a10-wdt";
> +				     "allwinner,sun6i-a31-wdt";
>  			reg = <0x01c20ca0 0x20>;
> +			interrupts = <16>;
> +			clocks = <&osc32k>;
>  		};
>  
>  		uart0: serial@1c25000 {

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Re: [PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible

[Samuel Holland]

Hi Andre,

On 3/7/22 8:34 AM, Andre Przywara wrote:
> The F1C100 series actually features a newer generation watchdog IP, so
> the compatible string was wrong.

The F1C100s watchdog seems to be unique in that it uses LOSC/osc32k as its only
clock source instead of HOSC/osc24M. The current binding requires that the first
clock is "hosc", so it seems that the binding needs to be relaxed to allow for
this case.

As long as there's only one clock source available, we don't really care where
it comes from. They are both divided to be approximately 32 kHz. So I don't
think this difference prevents using A31 as a fallback compatible.

> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml   | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> index 43afa24513b9..d90655418d0e 100644
> --- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> +++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> @@ -29,7 +29,7 @@ properties:
>            - const: allwinner,sun6i-a31-wdt
>        - items:
>            - const: allwinner,suniv-f1c100s-wdt
> -          - const: allwinner,sun4i-a10-wdt
> +          - const: allwinner,sun6i-a31-wdt

This can be combined with the enum of other compatibles that fall back to
allwinner,sun6i-a31-wdt (earlier in the file).

Regards,
Samuel

>        - const: allwinner,sun20i-d1-wdt
>        - items:
>            - const: allwinner,sun20i-d1-wdt-reset
> 


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Re: [PATCH 13/14] ARM: configs: sync multi_v5_defconfig from savedefconfig

[Andre Przywara]

On Tue, 8 Mar 2022 10:38:37 +0100
Arnd Bergmann <arnd@arndb.de> wrote:

Hi,

> On Mon, Mar 7, 2022 at 3:34 PM Andre Przywara <andre.przywara@arm.com> wrote:
> >
> > Some Kconfig options have changed, some other platforms have been
> > removed.  
> 
> Please split this up into logical chunks: list the platforms that were removed
> and remove only the lines corresponding to those platforms in one patch,
> do functional changes in separate patches each with a reason for doing them,
> and cleanups (moving lines to match the savedefconfig output, removing lines
> that are now the default) in one final patch.

OK, I did that, and will send that as a separate series, as it's not
really related to the F1C100 DT changes.

Please disregard patches 13/14 and 14/14 for now.

For the sake of completeness of this thread, this is what I found out:

> 
> >  CONFIG_AEABI=y
> >  CONFIG_HIGHMEM=y
> > -CONFIG_ZBOOT_ROM_TEXT=0x0
> > -CONFIG_ZBOOT_ROM_BSS=0x0
> >  CONFIG_ARM_APPENDED_DTB=y
> >  CONFIG_ARM_ATAG_DTB_COMPAT=y
> >  CONFIG_CPU_FREQ=y  
> 
> These were not removed, what happened here is that 'savedefconfig'
> no longer produces the lines because they now match the defaults.
> 
> > @@ -159,7 +151,6 @@ CONFIG_I2C_ASPEED=m
> >  CONFIG_I2C_AT91=y
> >  CONFIG_I2C_IMX=y
> >  CONFIG_I2C_MV64XXX=y
> > -CONFIG_I2C_NOMADIK=y
> >  CONFIG_SPI=y
> >  CONFIG_SPI_ATMEL=y
> >  CONFIG_SPI_IMX=y  
> 
> This one is still there. Not sure why it's no longer enabled.

ARCH_U300 was the only user, and we lost a prerequisite (ARCH_AMBA) when
it was removed, so this symbol cannot be selected anymore.
 
> 
> >  CONFIG_REGULATOR_FIXED_VOLTAGE=y
> >  CONFIG_MEDIA_SUPPORT=y
> >  CONFIG_MEDIA_CAMERA_SUPPORT=y
> > -CONFIG_V4L_PLATFORM_DRIVERS=y
> > -CONFIG_VIDEO_ASPEED=m
> > -CONFIG_VIDEO_ATMEL_ISI=m
> >  CONFIG_DRM=y
> >  CONFIG_DRM_ATMEL_HLCDC=m
> > -CONFIG_DRM_PANEL_SIMPLE=y
> > -CONFIG_DRM_PANEL_EDP=y
> >  CONFIG_DRM_ASPEED_GFX=m
> > -CONFIG_FB_IMX=y
> > -CONFIG_FB_ATMEL=y
> > -CONFIG_BACKLIGHT_ATMEL_LCDC=y  
> 
> This doesn't look right at all. If you want to disable graphics support,
> please do that in a separate patch and explain why we can't have those
> any more. Are you running into problems with the vmlinux size?

CONFIG_FB was not selected anymore, when DRM_KMS_FB_HELPER was removed, so
we lost all those drivers. I brought CONFIG_FB in explicitly, as
multi_v7_defconfig did a while ago.

More details in the commit messages of the upcoming series.

Cheers,
Andre


> >  CONFIG_LIBCRC32C=y
> >  CONFIG_DEBUG_INFO=y
> > -CONFIG_DEBUG_FS=y
> >  CONFIG_MAGIC_SYSRQ=y
> > +CONFIG_DEBUG_FS=y
> >  CONFIG_DEBUG_KERNEL=y
> >  # CONFIG_SCHED_DEBUG is not set
> >  # CONFIG_DEBUG_PREEMPT is not set  
> 
> This should probably go along with the ZBOOT_ROM change, it's
> only cosmetic.
> 
>         Arnd


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Re: [PATCH 03/14] dt-bindings: arm: sunxi: document LicheePi Nano name

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> The top level LicheePi Nano compatible name was never documented in the
> bindings, so add the currently used string.
> 
> It looks like the manufacturer might be "sipeed" as well, but I will go
> with the "licheepi" string that is in the actual .dts for years now.

From what  I can tell, "Lichee Pi Nano" [1][2] is the original board, and the
"Sipeed Lichee Nano" [3] is a newer batch by some of the same people [4].

Other than the silkscreen and the addition of the resistive touchscreen IC, the
boards look identical. And in fact I was able to find an intermediate version of
the schematic [5] that uses the old styling but includes the touchscreen IC.

So this looks good to me.

Reviewed-by: Samuel Holland <samuel@sholland.org>

[1]: https://licheepizero.us/
[2]: http://nano.lichee.pro/
[3]: https://wiki.sipeed.com/hardware/en/lichee/Nano/Nano.html
[4]: see e.g. http://bbs.lichee.pro/
[5]:
https://github.com/hongxuyao/F1C100s_with_Keil_RTX4_emWin5/blob/spl-separated/doc/lichee-nano/lichee_nano-Schematic.pdf

> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml
> index c8a3102c0fde..a7e7b2e79616 100644
> --- a/Documentation/devicetree/bindings/arm/sunxi.yaml
> +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml
> @@ -391,6 +391,11 @@ properties:
>            - const: libretech,all-h5-cc-h5
>            - const: allwinner,sun50i-h5
>  
> +      - description: Lichee Pi Nano
> +        items:
> +          - const: licheepi,licheepi-nano
> +          - const: allwinner,suniv-f1c100s
> +
>        - description: Lichee Pi One
>          items:
>            - const: licheepi,licheepi-one
> 


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Re: [PATCH 04/14] ARM: dts: suniv: F1C100: add clock and reset macros

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> From: Jesse Taube <mr.bossman075@gmail.com>
> 
> Include clock and reset macros and replace magic numbers.
> 
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 00/14] ARM: suniv: dts: update Allwinner F1C100

[Jesse Taube]

On 3/7/22 09:34, Andre Przywara wrote:
> The Allwinner F1C100 SoC didn't see much love since its initial merge in
> 2018: the originally submitted .dts files were very basic, and didn't
> cover such simple peripherals as MMC and SPI.
> On top of that the watchdog compatible string was wrong, leading to a
> non-functional watchdog and reset functionality.
> 
> This series aims to fix that, after the series MMC and SPI work, and
> make dtbs_check comes back clean.
> This was tested with mounting a filesystem on /dev/mmcblk0 on a
> LicheePi Nano, also with accessing the SPI flash through /dev/mtdblock
> and mtd_debug. Reboot and watchdog now also work.
> 
> Mainline U-Boot recently gained F1C100 support, and those DT updates are
> needed there as well to get full MMC and SPI access.
> 
> The series is structured as follows:
> - Patches 01/14 and 02/14 fix the watchdog, which allows to properly
>    reboot the system.
> - Patches 03-06 fix some shortcomings of the existing DT files, to make
>    them DT binding compliant.
> - Patches 07-09 are Jesse's recent MMC patches, with the comments from
>    the last version addressed [1].
> - Patches 10-12 add SPI support, to enable access to the SPI flash on
>    the LicheePi Nano board.
> - The final two patches (13/14 and 14/14) add the F1C100 platform to
>    the multi_v5_defconfig, since it was not covered by any other
>    defconfig before, and an ARMv5 compliant kernel is not commonly
>    offered by distributions.
> 
> I saw George's series from two years ago to add USB support[2], that
> looks good on the first glance, I will comment on that once I did some
> testing on that.
> 
> Cheers,
> Andre
> 
> Changelog for the MMC patches [1]:
> - bindings doc: extend commit message
> - .dtsi: extend commit message, re-order mmc0_pins node, add
>    drive-strength
> - .dts: extend commit message, add alias, regulator and disable-wp
> 
> [1] https://lore.kernel.org/linux-arm-kernel/20220130220325.1983918-1-Mr.Bossman075@gmail.com/
> [2] https://lore.kernel.org/linux-usb/20200331170219.267732-1-thirtythreeforty@gmail.com/
> 
> Andre Przywara (10):
>    dt-bindings: watchdog: sunxi: fix F1C100s compatible
>    ARM: dts: suniv: F1C100: fix watchdog compatible
>    dt-bindings: arm: sunxi: document LicheePi Nano name
>    ARM: dts: suniv: F1C100: fix CPU node
>    ARM: dts: suniv: F1C100: fix timer node
>    dt-bindings: spi: sunxi: document F1C100 controllers
>    ARM: dts: suniv: F1C100: add SPI support
>    ARM: dts: suniv: licheepi-nano: add SPI flash
>    ARM: configs: sync multi_v5_defconfig from savedefconfig
>    ARM: configs: multi_v5: Enable Allwinner F1C100
> 
> Jesse Taube (4):
>    ARM: dts: suniv: F1C100: add clock and reset macros
>    dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible
>    ARM: dts: suniv: F1C100: add MMC controllers
>    ARM: dts: suniv: licheepi-nano: add microSD card
> 
>   .../devicetree/bindings/arm/sunxi.yaml        |   5 +
>   .../bindings/mmc/allwinner,sun4i-a10-mmc.yaml |   3 +
>   .../bindings/spi/allwinner,sun6i-a31-spi.yaml |   1 +
>   .../watchdog/allwinner,sun4i-a10-wdt.yaml     |   2 +-
>   .../boot/dts/suniv-f1c100s-licheepi-nano.dts  |  31 ++++++
>   arch/arm/boot/dts/suniv-f1c100s.dtsi          | 102 ++++++++++++++++--
>   arch/arm/configs/multi_v5_defconfig           |  25 ++---
>   7 files changed, 140 insertions(+), 29 deletions(-)
> It boots fine and SPI flash and MMC are found. Time keeping also works.
I didn't use the multi_v5_defconfig though.


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Re: [PATCH 06/14] ARM: dts: suniv: F1C100: fix timer node

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> The Allwinner F1C100s has three timer instances, each with their own
> interrupt line.
> 
> Add the missing two interrupts to the DT node, to match the DT binding.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 07/14] dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> From: Jesse Taube <mr.bossman075@gmail.com>
> 
> The Allwinner F1C100 series contains two MMC controller blocks. From
> comparing the data sheets, they seem to be compatible with the one used
> in the Allwinner A20: the register layout is the same, and they use the
> same separate sample and output clocks design.
> The only difference is the missing reset line in the A20 version, but
> both the binding and the Linux driver make this optional, so it's still
> a fit.
> 
> Add the new SoC specific name and require it to be paired with the A20
> fallback name, as this is all the driver needs to care about.
> 
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 08/14] ARM: dts: suniv: F1C100: add MMC controllers

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> From: Jesse Taube <mr.bossman075@gmail.com>
> 
> The F1C100 series contains two MMC controllers, where the first one is
> typically connected to an (micro)SD card slot (as this is the one the
> BROM is able to boot from).
> Describe the two controllers in the SoC .dtsi.
> We also add the pinctrl description for MMC0, since this is the only
> pin set supporting that function anyway, and SD cards are very common
> across boards.
> 
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 09/14] ARM: dts: suniv: licheepi-nano: add microSD card

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> From: Jesse Taube <mr.bossman075@gmail.com>
> 
> Enable MMC0 and supply the board setting to enable the microSD card slot
> on the LicheePi Nano board.
> Apart from the always missing write protect switch on microSD slots,
> the card-detect pin is not connected to anything, so we use the
> broken-cd property.
> 
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> [Andre: add alias and vmmc supply]
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 10/14] dt-bindings: spi: sunxi: document F1C100 controllers

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> The Allwinner F1C100 series contains two SPI controllers, which are
> compatible to the IP block used in the Allwinner H3 as well.
> The only difference in the integration is the missing mod clock in the
> F1C100, but that does not affect the SPI controller binding, as we can
> still supply the correct clock (AHB parent) easily.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 11/14] ARM: dts: suniv: F1C100: add SPI support

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> The F1C100 series contains two SPI controllers, and many boards use SPI0
> for a SPI flash, as the BROM is able to boot from that.
> 
> Describe the two controllers in the SoC .dtsi, and also add the PortC
> pins for SPI0, since this is where BROM looks at when trying to boot
> from the commonly used SPI flash.
> 
> The SPI controller seems to be the same as in the H3 chips, but it lacks
> a separate mod clock. The manual says it's connected to AHB directly.
> We don't export that AHB clock directly, but can use the AHB *gate* clock
> as a clock source, since the MMC driver is not supposed to change the AHB

Do you mean the SPI driver here?

> frequency anyway.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm/boot/dts/suniv-f1c100s.dtsi | 33 ++++++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> index 6f2f97458fe0..f8ec1c7a2ca9 100644
> --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> @@ -105,6 +105,34 @@ mmc1: mmc@1c10000 {
>  			#size-cells = <0>;
>  		};
>  
> +		spi0: spi@1c05000 {
> +			compatible = "allwinner,suniv-f1c100s-spi",
> +				     "allwinner,sun8i-h3-spi";
> +			reg = <0x01c05000 0x1000>;
> +			interrupts = <10>;
> +			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
> +			clock-names = "ahb", "mod";
> +			resets = <&ccu RST_BUS_SPI0>;
> +			status = "disabled";
> +			num-cs = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
> +		spi1: spi@1c06000 {
> +			compatible = "allwinner,suniv-f1c100s-spi",
> +				     "allwinner,sun8i-h3-spi";
> +			reg = <0x01c06000 0x1000>;
> +			interrupts = <11>;
> +			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
> +			clock-names = "ahb", "mod";
> +			resets = <&ccu RST_BUS_SPI1>;
> +			status = "disabled";
> +			num-cs = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +

Please keep the nodes sorted by address. These should come before the MMC
controllers.

>  		ccu: clock@1c20000 {
>  			compatible = "allwinner,suniv-f1c100s-ccu";
>  			reg = <0x01c20000 0x400>;
> @@ -138,6 +166,11 @@ mmc0_pins: mmc0-pins {
>  				drive-strength = <30>;
>  			};
>  
> +			spi0_pc_pins: spi0-pc-pins {
> +				pins = "PC0", "PC1", "PC2", "PC3";
> +				function = "spi0";
> +			};
> +
>  			uart0_pe_pins: uart0-pe-pins {
>  				pins = "PE0", "PE1";
>  				function = "uart0";
> 


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Re: [PATCH 12/14] ARM: dts: suniv: licheepi-nano: add SPI flash

[Samuel Holland]

On 3/7/22 8:34 AM, Andre Przywara wrote:
> Most LicheePi Nano boards come with soldered SPI flash, so enable SPI0
> in the .dts and describe the flash chip. There is evidence of different
> flash chips used, also of boards with no flash chip soldered, but the
> Winbond 16MiB model is the most common, so use that for the compatible
> string.  The actual flash chip model will be auto-detected at runtime
> anyway.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>

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Re: [PATCH 11/14] ARM: dts: suniv: F1C100: add SPI support

[Andre Przywara]

On Thu, 10 Mar 2022 20:19:57 -0600
Samuel Holland <samuel@sholland.org> wrote:

Hi Samuel,

many thanks for having a look!

> On 3/7/22 8:34 AM, Andre Przywara wrote:
> > The F1C100 series contains two SPI controllers, and many boards use SPI0
> > for a SPI flash, as the BROM is able to boot from that.
> > 
> > Describe the two controllers in the SoC .dtsi, and also add the PortC
> > pins for SPI0, since this is where BROM looks at when trying to boot
> > from the commonly used SPI flash.
> > 
> > The SPI controller seems to be the same as in the H3 chips, but it lacks
> > a separate mod clock. The manual says it's connected to AHB directly.
> > We don't export that AHB clock directly, but can use the AHB *gate* clock
> > as a clock source, since the MMC driver is not supposed to change the AHB  
> 
> Do you mean the SPI driver here?

Yes, indeed.

> 
> > frequency anyway.
> > 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  arch/arm/boot/dts/suniv-f1c100s.dtsi | 33 ++++++++++++++++++++++++++++
> >  1 file changed, 33 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > index 6f2f97458fe0..f8ec1c7a2ca9 100644
> > --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
> > @@ -105,6 +105,34 @@ mmc1: mmc@1c10000 {
> >  			#size-cells = <0>;
> >  		};
> >  
> > +		spi0: spi@1c05000 {
> > +			compatible = "allwinner,suniv-f1c100s-spi",
> > +				     "allwinner,sun8i-h3-spi";
> > +			reg = <0x01c05000 0x1000>;
> > +			interrupts = <10>;
> > +			clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_BUS_SPI0>;
> > +			clock-names = "ahb", "mod";
> > +			resets = <&ccu RST_BUS_SPI0>;
> > +			status = "disabled";
> > +			num-cs = <1>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +		};
> > +
> > +		spi1: spi@1c06000 {
> > +			compatible = "allwinner,suniv-f1c100s-spi",
> > +				     "allwinner,sun8i-h3-spi";
> > +			reg = <0x01c06000 0x1000>;
> > +			interrupts = <11>;
> > +			clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_BUS_SPI1>;
> > +			clock-names = "ahb", "mod";
> > +			resets = <&ccu RST_BUS_SPI1>;
> > +			status = "disabled";
> > +			num-cs = <1>;
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +		};
> > +  
> 
> Please keep the nodes sorted by address. These should come before the MMC
> controllers.

Argh, sorry, I thought I fixed that up, but it must have messed that
up after a rebase.

Will send a fixed version.

Cheers,
Andre

> 
> >  		ccu: clock@1c20000 {
> >  			compatible = "allwinner,suniv-f1c100s-ccu";
> >  			reg = <0x01c20000 0x400>;
> > @@ -138,6 +166,11 @@ mmc0_pins: mmc0-pins {
> >  				drive-strength = <30>;
> >  			};
> >  
> > +			spi0_pc_pins: spi0-pc-pins {
> > +				pins = "PC0", "PC1", "PC2", "PC3";
> > +				function = "spi0";
> > +			};
> > +
> >  			uart0_pe_pins: uart0-pe-pins {
> >  				pins = "PE0", "PE1";
> >  				function = "uart0";
> >   
> 


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Re: [PATCH 07/14] dt-bindings: mmc: sunxi: add Allwinner F1c100s compatible

[Ulf Hansson]

On Mon, 7 Mar 2022 at 15:34, Andre Przywara <andre.przywara@arm.com> wrote:
>
> From: Jesse Taube <mr.bossman075@gmail.com>
>
> The Allwinner F1C100 series contains two MMC controller blocks. From
> comparing the data sheets, they seem to be compatible with the one used
> in the Allwinner A20: the register layout is the same, and they use the
> same separate sample and output clocks design.
> The only difference is the missing reset line in the A20 version, but
> both the binding and the Linux driver make this optional, so it's still
> a fit.
>
> Add the new SoC specific name and require it to be paired with the A20
> fallback name, as this is all the driver needs to care about.
>
> Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  .../devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml       | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
> index 4f62ad6ce50c..76137132500d 100644
> --- a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml
> @@ -55,6 +55,9 @@ properties:
>        - items:
>            - const: allwinner,sun50i-h616-mmc
>            - const: allwinner,sun50i-a100-mmc
> +      - items:
> +          - const: allwinner,suniv-f1c100s-mmc
> +          - const: allwinner,sun7i-a20-mmc
>
>    reg:
>      maxItems: 1
> --
> 2.25.1
>

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Re: [PATCH 01/14] dt-bindings: watchdog: sunxi: fix F1C100s compatible

[Andre Przywara]

On Wed, 9 Mar 2022 18:46:46 -0600
Samuel Holland <samuel@sholland.org> wrote:

> Hi Andre,
> 
> On 3/7/22 8:34 AM, Andre Przywara wrote:
> > The F1C100 series actually features a newer generation watchdog IP, so
> > the compatible string was wrong.  
> 
> The F1C100s watchdog seems to be unique in that it uses LOSC/osc32k as its only
> clock source instead of HOSC/osc24M. The current binding requires that the first
> clock is "hosc", so it seems that the binding needs to be relaxed to allow for
> this case.
> 
> As long as there's only one clock source available, we don't really care where
> it comes from. They are both divided to be approximately 32 kHz. So I don't
> think this difference prevents using A31 as a fallback compatible.

Right, these were roughly my findings as well, but I should have
written them down, at least in the commit message.

So shall the binding be explicit:
1) Most SoCs required exactly one clock, the 24 MHz HOSC.
2) The F1C100s requires exactly one clock, the 32KHz LOSC.
3) R329/D1 require two clocks with clock-names?

Or do you want to collapse 1) and 2) into one relaxed case? Still not
entirely sure what "LOSC / 32 KHz" means for the F1C100 (32768 or 32000
Hz), or where it really comes from, but it does not seem to matter.

FreeBSD, Xen and U-Boot don't care about clocks at all, and Linux
always uses the first clock and just enables it, so we should be good
either way.

> 
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> >  .../devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml   | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> > index 43afa24513b9..d90655418d0e 100644
> > --- a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> > +++ b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
> > @@ -29,7 +29,7 @@ properties:
> >            - const: allwinner,sun6i-a31-wdt
> >        - items:
> >            - const: allwinner,suniv-f1c100s-wdt
> > -          - const: allwinner,sun4i-a10-wdt
> > +          - const: allwinner,sun6i-a31-wdt  
> 
> This can be combined with the enum of other compatibles that fall back to
> allwinner,sun6i-a31-wdt (earlier in the file).

Oh, right, I missed that.

Cheers,
Andre

> 
> Regards,
> Samuel
> 
> >        - const: allwinner,sun20i-d1-wdt
> >        - items:
> >            - const: allwinner,sun20i-d1-wdt-reset
> >   
> 
> 


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