From: Vignesh R <vigneshr@ti.com>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
tudor.ambarus@microchip.com,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
nsekhar@ti.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 5/5] mtd: hyperbus: Add driver for TI's Hyperbus memory controller
Date: Tue, 26 Feb 2019 15:48:00 +0530 [thread overview]
Message-ID: <24b7c553-44c9-4800-a455-31b9b2c1f8c5@ti.com> (raw)
In-Reply-To: <907041d1-8412-22ca-3716-109a56251850@cogentembedded.com>
On 25/02/19 9:59 PM, Sergei Shtylyov wrote:
> Hello!
>
> On 02/19/2019 09:36 AM, Vignesh R (by way of Boris Brezillon <bbrezillon@kernel.org>) wrote:
>
>> Add driver for Hyperbus memory controller on TI's AM654 SoC. Programming
>> IP is pretty simple and provides direct memory mapped access to
>> connected Flash devices.
>
> Are you sure you posted the _complete_ driver?
>
Yes, it is... You can find controller doc here[1]. Default values in the
MCR/MTR registers are good enough to simple Hyperflash access.
More perf optimization and timing optimizations will come incrementally
[1] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf 12.3.3 Hyperbus Interface
>> Add basic support for the IP without DMA. Second ChipSelect is not
>> supported for now.
>>
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>> ---
>> drivers/mtd/hyperbus/hbmc_am654.c | 105 ++++++++++++++++++++++++++++++
>> 1 file changed, 105 insertions(+)
>> create mode 100644 drivers/mtd/hyperbus/hbmc_am654.c
>>
>> diff --git a/drivers/mtd/hyperbus/hbmc_am654.c b/drivers/mtd/hyperbus/hbmc_am654.c
>> new file mode 100644
>> index 000000000000..1f0d2dc52f9f
>> --- /dev/null
>> +++ b/drivers/mtd/hyperbus/hbmc_am654.c
>> @@ -0,0 +1,105 @@
> [...]
>> +static int am654_hbmc_probe(struct platform_device *pdev)
>> +{
>> + struct device *dev = &pdev->dev;
>> + struct am654_hbmc_priv *priv;
>> + struct resource *res;
>> + int err;
>> +
>> + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>> + if (!priv)
>> + return -ENOMEM;
>> +
>> + platform_set_drvdata(pdev, priv);
>> +
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + if (IS_ERR(res)) {
>> + dev_err(&pdev->dev, "failed to get memory resource\n");
>> + return -ENOENT;
>> + }
>> +
>> + priv->regbase = devm_ioremap_resource(dev, res);
>> + if (IS_ERR(priv->regbase)) {
>> + dev_err(dev, "Cannot remap controller address.\n");
>> + return PTR_ERR(priv->regbase);
>> + }
>> +
>> + pm_runtime_enable(&pdev->dev);
>> + err = pm_runtime_get_sync(&pdev->dev);
>
> That's all nice but where's the code that accesses the actual registers?
Interface and functional clk needs to be enabled even to access MMIO
space to read/write data to flash (done by the map framework). So driver
currently just enables everything during probe and disables on remove
>
>> + if (err < 0) {
>> + pm_runtime_put_noidle(&pdev->dev);
>
> Calling "put" with previously failed "get" sees strange...
>
Basically pm_runtime_get_sync() increments usage_count even in case of
failure and pm_runtime_put_noidle() puts it back. You can find many
examples of above piece of code in kernel.
>> + return err;
>> + }
>> +
>> + priv->hbdev.needs_calib = true;
>> + priv->hbdev.dev = &pdev->dev;
>> + priv->hbdev.np = of_get_next_child(dev->of_node, NULL);
>> + err = hb_register_device(&priv->hbdev);
>> + if (err) {
>> + dev_err(&pdev->dev, "failed to register controller\n");
>> + goto err_destroy;
>> + }
>> +
>> + return 0;
>> +
>> +err_destroy:
>> + hb_unregister_device(&priv->hbdev);
>
> Calling "unregister" with "register" previously failed also looks strange...
>
Agree, this is unneeded as hb_register_device() takes care of all
cleanups in err path.
>> + pm_runtime_put_sync(&pdev->dev);
>
> Why the sync() version?
>
Why not? Since the device is going away, I think its safer to ensure
device has definitely been put to idle state. I see its a common
practice in driver code.
>> + return err;
>> +}
> [...]
>
> MBR, Sergei
>
--
Regards
Vignesh
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next prev parent reply other threads:[~2019-02-26 10:17 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 6:36 [RFC PATCH 0/5] MTD: Add Initial Hyperbus support Vignesh R
2019-02-19 6:36 ` [RFC PATCH 1/5] mtd: cfi_cmdset_0002: Add support for polling status register Vignesh R
2019-02-23 18:41 ` Sergei Shtylyov
2019-02-23 18:44 ` Sergei Shtylyov
2019-02-19 6:36 ` [RFC PATCH 2/5] dt-bindings: mtd: Add binding documentation for Hyperbus memory devices Vignesh R
2019-02-19 6:36 ` [RFC PATCH 3/5] mtd: Add support " Vignesh R
2019-02-23 20:19 ` Sergei Shtylyov
2019-02-25 18:21 ` Vignesh R
2019-02-25 19:33 ` Sergei Shtylyov
2019-02-26 10:26 ` Vignesh R
2019-02-26 11:08 ` Sergei Shtylyov
2019-02-26 11:00 ` Vignesh R
2019-02-25 18:26 ` Sergei Shtylyov
2019-02-26 18:16 ` Sergei Shtylyov
2019-02-27 9:52 ` Vignesh Raghavendra
2019-02-27 9:59 ` Boris Brezillon
2019-02-27 10:12 ` Vignesh Raghavendra
2019-02-19 6:36 ` [RFC PATCH 4/5] dt-bindings: mtd: Add bindings for TI's AM654 Hyperbus memory controller Vignesh R
2019-02-19 6:36 ` [RFC PATCH 5/5] mtd: hyperbus: Add driver for TI's " Vignesh R
2019-02-24 14:06 ` Sergei Shtylyov
2019-02-25 16:29 ` Sergei Shtylyov
2019-02-26 10:18 ` Vignesh R [this message]
2019-02-26 18:28 ` Sergei Shtylyov
2019-02-19 7:24 ` [RFC PATCH 0/5] MTD: Add Initial Hyperbus support Vignesh R
2019-02-19 7:52 ` Boris Brezillon
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