From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: "Vignesh R (by way of Boris Brezillon <bbrezillon@kernel.org>)"
<vigneshr@ti.com>, David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <bbrezillon@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
tudor.ambarus@microchip.com,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
nsekhar@ti.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 1/5] mtd: cfi_cmdset_0002: Add support for polling status register
Date: Sat, 23 Feb 2019 21:41:06 +0300 [thread overview]
Message-ID: <4fb5aac2-d421-c7df-ab1c-9a9290f068e3@cogentembedded.com> (raw)
In-Reply-To: <20190219063607.29949-2-vigneshr@ti.com>
Hello!
On 02/19/2019 09:36 AM, Vignesh R (by way of Boris Brezillon <bbrezillon@kernel.org>) wrote:
> HyperFlash devices are compliant with CFI AMD/Fujitsu Extended Command
> Set(0x0002) for flash operations, therefore drivers/mtd/chips/cfi_cmdset_0002.c
> can be use as is. But these devices do not support DQ polling method of
> determining chip ready/good status. These flashes provide Status
> Register whose bits can be polled to know status of flash operation.
>
> Cypress HyperFlash datasheet here[1], talks about CFI Amd/Fujitsu
> Extended Query version 1.5. Bit 0 of "Software Features supported" field
> of CFI Primary Vendor-Specific Extended Query table indicates
> presence/absence of status register and Bit 1 indicates whether or not
> DQ polling is supported. Using these bits, its possible to determine
> whether flash supports DQ polling or need to use Status Register.
>
> Add support for polling status register to know device ready/status of
> erase/write operations when DQ polling is not supported.
>
> [1] https://www.cypress.com/file/213346/download
>
> Signed-off-by: Vignesh R <vigneshr@ti.com>
> ---
>
> Note: PRI extended query table size is bigger on 1.5 than on older
> revision. Not sure if this causes problems on older rev. because of
> reading beyond current size.
>
> drivers/mtd/chips/cfi_cmdset_0002.c | 50 +++++++++++++++++++++++++++++
> include/linux/mtd/cfi.h | 5 +++
> 2 files changed, 55 insertions(+)
>
> diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c
> index 72428b6bfc47..7a4ef0237750 100644
> --- a/drivers/mtd/chips/cfi_cmdset_0002.c
> +++ b/drivers/mtd/chips/cfi_cmdset_0002.c
[...]
> @@ -97,6 +105,18 @@ static struct mtd_chip_driver cfi_amdstd_chipdrv = {
> .module = THIS_MODULE
> };
>
> +/*
> + * Use status register to poll for Erase/write completion when DQ is not
> + * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in
> + * CFI Primary Vendor-Specific Extended Query table 1.5
> + */
> +static int cfi_use_status_reg(struct cfi_private *cfi)
> +{
> + struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
> +
> + return (extp->MinorVersion >= '5') &&
> + ((extp->SoftwareFeatures & 0x11) == 1);
Parens not necessary here.
[...]
> @@ -744,8 +764,21 @@ static struct mtd_info *cfi_amdstd_setup(struct mtd_info *mtd)
> */
> static int __xipram chip_ready(struct map_info *map, unsigned long addr)
> {
> + struct cfi_private *cfi = map->fldrv_priv;
> map_word d, t;
>
> + if (cfi_use_status_reg(cfi)) {
> + /*
> + * For chips that support status register, check device
> + * ready bit
> + */
> + cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
> + cfi->device_type, NULL);
> + d = map_read(map, addr);
> +
> + return (d.x[0] & CFI_SR_DRB);
Again, parens not needed.
[...]
Other than that, looks good.
MBR, Sergei
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next prev parent reply other threads:[~2019-02-23 18:41 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 6:36 [RFC PATCH 0/5] MTD: Add Initial Hyperbus support Vignesh R
2019-02-19 6:36 ` [RFC PATCH 1/5] mtd: cfi_cmdset_0002: Add support for polling status register Vignesh R
2019-02-23 18:41 ` Sergei Shtylyov [this message]
2019-02-23 18:44 ` Sergei Shtylyov
2019-02-19 6:36 ` [RFC PATCH 2/5] dt-bindings: mtd: Add binding documentation for Hyperbus memory devices Vignesh R
2019-02-19 6:36 ` [RFC PATCH 3/5] mtd: Add support " Vignesh R
2019-02-23 20:19 ` Sergei Shtylyov
2019-02-25 18:21 ` Vignesh R
2019-02-25 19:33 ` Sergei Shtylyov
2019-02-26 10:26 ` Vignesh R
2019-02-26 11:08 ` Sergei Shtylyov
2019-02-26 11:00 ` Vignesh R
2019-02-25 18:26 ` Sergei Shtylyov
2019-02-26 18:16 ` Sergei Shtylyov
2019-02-27 9:52 ` Vignesh Raghavendra
2019-02-27 9:59 ` Boris Brezillon
2019-02-27 10:12 ` Vignesh Raghavendra
2019-02-19 6:36 ` [RFC PATCH 4/5] dt-bindings: mtd: Add bindings for TI's AM654 Hyperbus memory controller Vignesh R
2019-02-19 6:36 ` [RFC PATCH 5/5] mtd: hyperbus: Add driver for TI's " Vignesh R
2019-02-24 14:06 ` Sergei Shtylyov
2019-02-25 16:29 ` Sergei Shtylyov
2019-02-26 10:18 ` Vignesh R
2019-02-26 18:28 ` Sergei Shtylyov
2019-02-19 7:24 ` [RFC PATCH 0/5] MTD: Add Initial Hyperbus support Vignesh R
2019-02-19 7:52 ` Boris Brezillon
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