* [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func
2022-09-22 12:44 [PATCH v8,0/3] Add dpi output format control for MT8186 xinlei.lee
@ 2022-09-22 12:45 ` xinlei.lee
2022-09-23 9:13 ` AngeloGioacchino Del Regno
2022-09-22 12:45 ` [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186 xinlei.lee
2022-09-22 12:45 ` [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data xinlei.lee
2 siblings, 1 reply; 10+ messages in thread
From: xinlei.lee @ 2022-09-22 12:45 UTC (permalink / raw)
To: matthias.bgg, jason-jh.lin, angelogioacchino.delregno,
rex-bc.chen, ck.hu, p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
The difference between MT8186 and other ICs is that when modifying the
output format, we need to modify the mmsys_base+0x400 register to take
effect.
So when setting the dpi output format, we need to call mmsys_func to set
it to MT8186 synchronously.
Adding mmsys all the settings that need to be modified with dpi are for mt8186.
Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186")
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
drivers/soc/mediatek/mt8186-mmsys.h | 8 +++++---
drivers/soc/mediatek/mtk-mmsys.c | 27 ++++++++++++++++++++------
include/linux/soc/mediatek/mtk-mmsys.h | 7 +++++++
3 files changed, 33 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/mediatek/mt8186-mmsys.h b/drivers/soc/mediatek/mt8186-mmsys.h
index 09b1ccbc0093..035aec1eb616 100644
--- a/drivers/soc/mediatek/mt8186-mmsys.h
+++ b/drivers/soc/mediatek/mt8186-mmsys.h
@@ -5,9 +5,11 @@
/* Values for DPI configuration in MMSYS address space */
#define MT8186_MMSYS_DPI_OUTPUT_FORMAT 0x400
-#define DPI_FORMAT_MASK 0x1
-#define DPI_RGB888_DDR_CON BIT(0)
-#define DPI_RGB565_SDR_CON BIT(1)
+#define DPI_FORMAT_MASK GENMASK(1, 0)
+#define DPI_RGB888_SDR_CON 0
+#define DPI_RGB888_DDR_CON 1
+#define DPI_RGB565_SDR_CON 2
+#define DPI_RGB565_DDR_CON 3
#define MT8186_MMSYS_OVL_CON 0xF04
#define MT8186_MMSYS_OVL0_CON_MASK 0x3
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 2e20b24da363..952e636b282e 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -238,12 +238,27 @@ static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask,
void mtk_mmsys_ddp_dpi_fmt_config(struct device *dev, u32 val)
{
- if (val)
- mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT,
- DPI_RGB888_DDR_CON, DPI_FORMAT_MASK);
- else
- mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8186_MMSYS_DPI_OUTPUT_FORMAT,
- DPI_RGB565_SDR_CON, DPI_FORMAT_MASK);
+ struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
+
+ switch (val) {
+ case MTK_DPI_RGB888_SDR_CON:
+ mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,
+ DPI_FORMAT_MASK, DPI_RGB888_SDR_CON);
+ break;
+ case MTK_DPI_RGB565_SDR_CON:
+ mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,
+ DPI_FORMAT_MASK, DPI_RGB565_SDR_CON);
+ break;
+ case MTK_DPI_RGB565_DDR_CON:
+ mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,
+ DPI_FORMAT_MASK, DPI_RGB565_DDR_CON);
+ break;
+ case MTK_DPI_RGB888_DDR_CON:
+ default:
+ mtk_mmsys_update_bits(mmsys, MT8186_MMSYS_DPI_OUTPUT_FORMAT,
+ DPI_FORMAT_MASK, DPI_RGB888_DDR_CON);
+ break;
+ }
}
EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_dpi_fmt_config);
diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
index d2b02bb43768..b85f66db33e1 100644
--- a/include/linux/soc/mediatek/mtk-mmsys.h
+++ b/include/linux/soc/mediatek/mtk-mmsys.h
@@ -9,6 +9,13 @@
enum mtk_ddp_comp_id;
struct device;
+enum mtk_dpi_out_format_con {
+ MTK_DPI_RGB888_SDR_CON,
+ MTK_DPI_RGB888_DDR_CON,
+ MTK_DPI_RGB565_SDR_CON,
+ MTK_DPI_RGB565_DDR_CON
+};
+
enum mtk_ddp_comp_id {
DDP_COMPONENT_AAL0,
DDP_COMPONENT_AAL1,
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func
2022-09-22 12:45 ` [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func xinlei.lee
@ 2022-09-23 9:13 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-09-23 9:13 UTC (permalink / raw)
To: xinlei.lee, matthias.bgg, jason-jh.lin, rex-bc.chen, ck.hu,
p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi
Il 22/09/22 14:45, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> The difference between MT8186 and other ICs is that when modifying the
> output format, we need to modify the mmsys_base+0x400 register to take
> effect.
> So when setting the dpi output format, we need to call mmsys_func to set
> it to MT8186 synchronously.
> Adding mmsys all the settings that need to be modified with dpi are for mt8186.
>
> Fixes: a071e52f75d1 ("soc: mediatek: Add mmsys func to adapt to dpi output for MT8186")
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186
2022-09-22 12:44 [PATCH v8,0/3] Add dpi output format control for MT8186 xinlei.lee
2022-09-22 12:45 ` [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func xinlei.lee
@ 2022-09-22 12:45 ` xinlei.lee
2022-09-23 5:59 ` CK Hu (胡俊光)
2022-09-23 9:16 ` AngeloGioacchino Del Regno
2022-09-22 12:45 ` [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data xinlei.lee
2 siblings, 2 replies; 10+ messages in thread
From: xinlei.lee @ 2022-09-22 12:45 UTC (permalink / raw)
To: matthias.bgg, jason-jh.lin, angelogioacchino.delregno,
rex-bc.chen, ck.hu, p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
Due to the mt8186 hardware changes, we need to modify the dpi output
format corresponding to the mmsys register(mmsys_base+0x400).
Because different sink ICs may support other output formats.
The current DRM architecture supports retrieving the output format of
all bridges (eg dpi is implemented via DRM's .atomic_check and
.atomic_get_output_bus_fmts and .atomic_get_input_bus_fmts).
If no unified output format is found, the default soc format
(MEDIA_BUS_FMT_RGB888_2X12_LE in mt8186) is used.
Therefore, if there are other format sink ICs (RGB888_DDR/RGB888_SDR) in
the future, the sink IC needs to add the func implementation mentioned
above needs to be added.
And the drm architecture will select the appropriate format to change
the dpi output.
Co-developed-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index 630a4e301ef6..bd1870a8504a 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -15,6 +15,7 @@
#include <linux/of_graph.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
+#include <linux/soc/mediatek/mtk-mmsys.h>
#include <linux/types.h>
#include <video/videomode.h>
@@ -30,6 +31,7 @@
#include "mtk_disp_drv.h"
#include "mtk_dpi_regs.h"
#include "mtk_drm_ddp_comp.h"
+#include "mtk_drm_drv.h"
enum mtk_dpi_out_bit_num {
MTK_DPI_OUT_BIT_NUM_8BITS,
@@ -82,6 +84,7 @@ struct mtk_dpi {
struct pinctrl_state *pins_dpi;
u32 output_fmt;
int refcount;
+ struct device *mmsys_dev;
};
static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
@@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit {
* @yuv422_en_bit: Enable bit of yuv422.
* @csc_enable_bit: Enable bit of CSC.
* @pixels_per_iter: Quantity of transferred pixels per iteration.
+ * @edge_cfg_in_mmsys: If the edge configuration for DPI's output needs to be set in MMSYS.
*/
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
@@ -153,6 +157,7 @@ struct mtk_dpi_conf {
u32 yuv422_en_bit;
u32 csc_enable_bit;
u32 pixels_per_iter;
+ bool edge_cfg_in_mmsys;
};
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE ?
EDGE_SEL : 0, EDGE_SEL);
+ if (dpi->conf->edge_cfg_in_mmsys)
+ mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_DDR_CON);
} else {
mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);
+ if (dpi->conf->edge_cfg_in_mmsys)
+ mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev, MTK_DPI_RGB888_SDR_CON);
}
}
@@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
{
struct mtk_dpi *dpi = dev_get_drvdata(dev);
struct drm_device *drm_dev = data;
+ struct mtk_drm_private *priv = drm_dev->dev_private;
int ret;
+ dpi->mmsys_dev = priv->mmsys_dev;
ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
DRM_MODE_ENCODER_TMDS);
if (ret) {
--
2.18.0
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186
2022-09-22 12:45 ` [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186 xinlei.lee
@ 2022-09-23 5:59 ` CK Hu (胡俊光)
2022-09-23 6:57 ` xinlei.lee
2022-09-23 9:16 ` AngeloGioacchino Del Regno
1 sibling, 1 reply; 10+ messages in thread
From: CK Hu (胡俊光) @ 2022-09-23 5:59 UTC (permalink / raw)
To: Jason-JH Lin (林睿祥),
Xinlei Lee (李昕磊),
p.zabel, daniel, matthias.bgg, airlied,
Rex-BC Chen (陳柏辰),
angelogioacchino.delregno
Cc: dri-devel, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group,
Jitao Shi (石记涛)
Hi, Xinlei:
From the code you modify, I do not understand why the title is "Adjust
the dpi output format to MT8186". You just call mmsys driver function
to set single edge or dual edge, but single edge or dual edge already
exist in other SoC and is not special in MT8186. So I think you should
change the title to 'Set dpi format in mmsys'
On Thu, 2022-09-22 at 20:45 +0800, xinlei.lee@mediatek.com wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Due to the mt8186 hardware changes, we need to modify the dpi
> output
> format corresponding to the mmsys register(mmsys_base+0x400).
>
The below description is not related to this patch and it's common with
mt8183, so I think we don't need below description.
> Because different sink ICs may support other output formats.
> The current DRM architecture supports retrieving the output format of
> all bridges (eg dpi is implemented via DRM's .atomic_check and
> .atomic_get_output_bus_fmts and .atomic_get_input_bus_fmts).
> If no unified output format is found, the default soc format
> (MEDIA_BUS_FMT_RGB888_2X12_LE in mt8186) is used.
>
> Therefore, if there are other format sink ICs (RGB888_DDR/RGB888_SDR)
> in
> the future, the sink IC needs to add the func implementation
> mentioned
> above needs to be added.
> And the drm architecture will select the appropriate format to change
> the dpi output.
>
> Co-developed-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 630a4e301ef6..bd1870a8504a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -15,6 +15,7 @@
> #include <linux/of_graph.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/platform_device.h>
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> #include <linux/types.h>
>
> #include <video/videomode.h>
> @@ -30,6 +31,7 @@
> #include "mtk_disp_drv.h"
> #include "mtk_dpi_regs.h"
> #include "mtk_drm_ddp_comp.h"
> +#include "mtk_drm_drv.h"
>
> enum mtk_dpi_out_bit_num {
> MTK_DPI_OUT_BIT_NUM_8BITS,
> @@ -82,6 +84,7 @@ struct mtk_dpi {
> struct pinctrl_state *pins_dpi;
> u32 output_fmt;
> int refcount;
> + struct device *mmsys_dev;
> };
>
> static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
> @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit {
> * @yuv422_en_bit: Enable bit of yuv422.
> * @csc_enable_bit: Enable bit of CSC.
> * @pixels_per_iter: Quantity of transferred pixels per iteration.
> + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output
> needs to be set in MMSYS.
> */
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> @@ -153,6 +157,7 @@ struct mtk_dpi_conf {
> u32 yuv422_en_bit;
> u32 csc_enable_bit;
> u32 pixels_per_iter;
> + bool edge_cfg_in_mmsys;
> };
>
> static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val,
> u32 mask)
> @@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi
> *dpi)
> mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> dpi->output_fmt ==
> MEDIA_BUS_FMT_RGB888_2X12_LE ?
> EDGE_SEL : 0, EDGE_SEL);
> + if (dpi->conf->edge_cfg_in_mmsys)
> + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> MTK_DPI_RGB888_DDR_CON);
> } else {
> mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
> 0);
> + if (dpi->conf->edge_cfg_in_mmsys)
> + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> MTK_DPI_RGB888_SDR_CON);
> }
> }
>
> @@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev,
> struct device *master, void *data)
> {
> struct mtk_dpi *dpi = dev_get_drvdata(dev);
> struct drm_device *drm_dev = data;
> + struct mtk_drm_private *priv = drm_dev->dev_private;
> int ret;
>
> + dpi->mmsys_dev = priv->mmsys_dev;
> ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
> DRM_MODE_ENCODER_TMDS);
> if (ret) {
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186
2022-09-23 5:59 ` CK Hu (胡俊光)
@ 2022-09-23 6:57 ` xinlei.lee
0 siblings, 0 replies; 10+ messages in thread
From: xinlei.lee @ 2022-09-23 6:57 UTC (permalink / raw)
To: CK Hu (胡俊光),
Jason-JH Lin (林睿祥),
p.zabel, daniel, matthias.bgg, airlied,
Rex-BC Chen (陳柏辰),
angelogioacchino.delregno
Cc: dri-devel, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group,
Jitao Shi (石记涛)
On Fri, 2022-09-23 at 13:59 +0800, CK Hu (胡俊光) wrote:
> Hi, Xinlei:
>
> From the code you modify, I do not understand why the title is
> "Adjust
> the dpi output format to MT8186". You just call mmsys driver function
> to set single edge or dual edge, but single edge or dual edge already
> exist in other SoC and is not special in MT8186. So I think you
> should
> change the title to 'Set dpi format in mmsys'
>
>
> On Thu, 2022-09-22 at 20:45 +0800, xinlei.lee@mediatek.com wrote:
> > From: Xinlei Lee <xinlei.lee@mediatek.com>
> >
> > Due to the mt8186 hardware changes, we need to modify the dpi
> > output
> > format corresponding to the mmsys register(mmsys_base+0x400).
> >
>
> The below description is not related to this patch and it's common
> with
> mt8183, so I think we don't need below description.
>
> > Because different sink ICs may support other output formats.
> > The current DRM architecture supports retrieving the output format
> > of
> > all bridges (eg dpi is implemented via DRM's .atomic_check and
> > .atomic_get_output_bus_fmts and .atomic_get_input_bus_fmts).
> > If no unified output format is found, the default soc format
> > (MEDIA_BUS_FMT_RGB888_2X12_LE in mt8186) is used.
> >
> > Therefore, if there are other format sink ICs
> > (RGB888_DDR/RGB888_SDR)
> > in
> > the future, the sink IC needs to add the func implementation
> > mentioned
> > above needs to be added.
> > And the drm architecture will select the appropriate format to
> > change
> > the dpi output.
> >
> > Co-developed-by: Jitao Shi <jitao.shi@mediatek.com>
> > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> > Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 630a4e301ef6..bd1870a8504a 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -15,6 +15,7 @@
> > #include <linux/of_graph.h>
> > #include <linux/pinctrl/consumer.h>
> > #include <linux/platform_device.h>
> > +#include <linux/soc/mediatek/mtk-mmsys.h>
> > #include <linux/types.h>
> >
> > #include <video/videomode.h>
> > @@ -30,6 +31,7 @@
> > #include "mtk_disp_drv.h"
> > #include "mtk_dpi_regs.h"
> > #include "mtk_drm_ddp_comp.h"
> > +#include "mtk_drm_drv.h"
> >
> > enum mtk_dpi_out_bit_num {
> > MTK_DPI_OUT_BIT_NUM_8BITS,
> > @@ -82,6 +84,7 @@ struct mtk_dpi {
> > struct pinctrl_state *pins_dpi;
> > u32 output_fmt;
> > int refcount;
> > + struct device *mmsys_dev;
> > };
> >
> > static inline struct mtk_dpi *bridge_to_dpi(struct drm_bridge *b)
> > @@ -135,6 +138,7 @@ struct mtk_dpi_yc_limit {
> > * @yuv422_en_bit: Enable bit of yuv422.
> > * @csc_enable_bit: Enable bit of CSC.
> > * @pixels_per_iter: Quantity of transferred pixels per iteration.
> > + * @edge_cfg_in_mmsys: If the edge configuration for DPI's output
> > needs to be set in MMSYS.
> > */
> > struct mtk_dpi_conf {
> > unsigned int (*cal_factor)(int clock);
> > @@ -153,6 +157,7 @@ struct mtk_dpi_conf {
> > u32 yuv422_en_bit;
> > u32 csc_enable_bit;
> > u32 pixels_per_iter;
> > + bool edge_cfg_in_mmsys;
> > };
> >
> > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val,
> > u32 mask)
> > @@ -449,8 +454,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi
> > *dpi)
> > mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> > dpi->output_fmt ==
> > MEDIA_BUS_FMT_RGB888_2X12_LE ?
> > EDGE_SEL : 0, EDGE_SEL);
> > + if (dpi->conf->edge_cfg_in_mmsys)
> > + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> > MTK_DPI_RGB888_DDR_CON);
> > } else {
> > mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
> > 0);
> > + if (dpi->conf->edge_cfg_in_mmsys)
> > + mtk_mmsys_ddp_dpi_fmt_config(dpi->mmsys_dev,
> > MTK_DPI_RGB888_SDR_CON);
> > }
> > }
> >
> > @@ -778,8 +787,10 @@ static int mtk_dpi_bind(struct device *dev,
> > struct device *master, void *data)
> > {
> > struct mtk_dpi *dpi = dev_get_drvdata(dev);
> > struct drm_device *drm_dev = data;
> > + struct mtk_drm_private *priv = drm_dev->dev_private;
> > int ret;
> >
> > + dpi->mmsys_dev = priv->mmsys_dev;
> > ret = drm_simple_encoder_init(drm_dev, &dpi->encoder,
> > DRM_MODE_ENCODER_TMDS);
> > if (ret) {
Hi CK:
Thanks for your suggestion.
I will revise the next edition as you suggested.
Best Regards!
xinlei
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186
2022-09-22 12:45 ` [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186 xinlei.lee
2022-09-23 5:59 ` CK Hu (胡俊光)
@ 2022-09-23 9:16 ` AngeloGioacchino Del Regno
1 sibling, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-09-23 9:16 UTC (permalink / raw)
To: xinlei.lee, matthias.bgg, jason-jh.lin, rex-bc.chen, ck.hu,
p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi
Il 22/09/22 14:45, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Due to the mt8186 hardware changes, we need to modify the dpi output
> format corresponding to the mmsys register(mmsys_base+0x400).
>
> Because different sink ICs may support other output formats.
> The current DRM architecture supports retrieving the output format of
> all bridges (eg dpi is implemented via DRM's .atomic_check and
> .atomic_get_output_bus_fmts and .atomic_get_input_bus_fmts).
> If no unified output format is found, the default soc format
> (MEDIA_BUS_FMT_RGB888_2X12_LE in mt8186) is used.
>
> Therefore, if there are other format sink ICs (RGB888_DDR/RGB888_SDR) in
> the future, the sink IC needs to add the func implementation mentioned
> above needs to be added.
> And the drm architecture will select the appropriate format to change
> the dpi output.
>
> Co-developed-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index 630a4e301ef6..bd1870a8504a 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -15,6 +15,7 @@
> #include <linux/of_graph.h>
> #include <linux/pinctrl/consumer.h>
> #include <linux/platform_device.h>
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> #include <linux/types.h>
>
> #include <video/videomode.h>
> @@ -30,6 +31,7 @@
> #include "mtk_disp_drv.h"
> #include "mtk_dpi_regs.h"
> #include "mtk_drm_ddp_comp.h"
> +#include "mtk_drm_drv.h"
>
> enum mtk_dpi_out_bit_num {
> MTK_DPI_OUT_BIT_NUM_8BITS,
> @@ -82,6 +84,7 @@ struct mtk_dpi {
> struct pinctrl_state *pins_dpi;
> u32 output_fmt;
> int refcount;
> + struct device *mmsys_dev;
Please place this after `struct device *dev;` and not here at the end.
Thanks,
Angelo
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data
2022-09-22 12:44 [PATCH v8,0/3] Add dpi output format control for MT8186 xinlei.lee
2022-09-22 12:45 ` [PATCH v8,1/3] soc: mediatek: Add all settings to mtk_mmsys_ddp_dpi_fmt_config func xinlei.lee
2022-09-22 12:45 ` [PATCH v8,2/3]drm: mediatek: Adjust the dpi output format to MT8186 xinlei.lee
@ 2022-09-22 12:45 ` xinlei.lee
2022-09-23 6:05 ` CK Hu (胡俊光)
2022-09-23 9:13 ` AngeloGioacchino Del Regno
2 siblings, 2 replies; 10+ messages in thread
From: xinlei.lee @ 2022-09-22 12:45 UTC (permalink / raw)
To: matthias.bgg, jason-jh.lin, angelogioacchino.delregno,
rex-bc.chen, ck.hu, p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
Add the compatible because use edge_cfg_in_mmsys in mt8186.
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 21 +++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index bd1870a8504a..2fcf7a61c340 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -941,6 +941,24 @@ static const struct mtk_dpi_conf mt8183_conf = {
.csc_enable_bit = CSC_ENABLE,
};
+static const struct mtk_dpi_conf mt8186_conf = {
+ .cal_factor = mt8183_calculate_factor,
+ .reg_h_fre_con = 0xe0,
+ .max_clock_khz = 150000,
+ .output_fmts = mt8183_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
+ .edge_cfg_in_mmsys = true,
+ .pixels_per_iter = 1,
+ .is_ck_de_pol = true,
+ .swap_input_support = true,
+ .support_direct_pin = true,
+ .dimension_mask = HPW_MASK,
+ .hvsize_mask = HSIZE_MASK,
+ .channel_swap_shift = CH_SWAP,
+ .yuv422_en_bit = YUV422_EN,
+ .csc_enable_bit = CSC_ENABLE,
+};
+
static const struct mtk_dpi_conf mt8192_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
@@ -1091,6 +1109,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
{ .compatible = "mediatek,mt8183-dpi",
.data = &mt8183_conf,
},
+ { .compatible = "mediatek,mt8186-dpi",
+ .data = &mt8186_conf,
+ },
{ .compatible = "mediatek,mt8192-dpi",
.data = &mt8192_conf,
},
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 546b79412815..3d32fbc66ac1 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -646,6 +646,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8183-dpi",
.data = (void *)MTK_DPI },
+ { .compatible = "mediatek,mt8186-dpi",
+ .data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8192-dpi",
.data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt8195-dp-intf",
--
2.18.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data
2022-09-22 12:45 ` [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data xinlei.lee
@ 2022-09-23 6:05 ` CK Hu (胡俊光)
2022-09-23 9:13 ` AngeloGioacchino Del Regno
1 sibling, 0 replies; 10+ messages in thread
From: CK Hu (胡俊光) @ 2022-09-23 6:05 UTC (permalink / raw)
To: Jason-JH Lin (林睿祥),
Xinlei Lee (李昕磊),
p.zabel, daniel, matthias.bgg, airlied,
Rex-BC Chen (陳柏辰),
angelogioacchino.delregno
Cc: dri-devel, linux-arm-kernel, linux-mediatek, linux-kernel,
Project_Global_Chrome_Upstream_Group,
Jitao Shi (石记涛)
Hi, Xinlei:
On Thu, 2022-09-22 at 20:45 +0800, xinlei.lee@mediatek.com wrote:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add the compatible because use edge_cfg_in_mmsys in mt8186.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 21 +++++++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
> 2 files changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index bd1870a8504a..2fcf7a61c340 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -941,6 +941,24 @@ static const struct mtk_dpi_conf mt8183_conf = {
> .csc_enable_bit = CSC_ENABLE,
> };
>
> +static const struct mtk_dpi_conf mt8186_conf = {
> + .cal_factor = mt8183_calculate_factor,
> + .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 150000,
> + .output_fmts = mt8183_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
> + .edge_cfg_in_mmsys = true,
> + .pixels_per_iter = 1,
> + .is_ck_de_pol = true,
> + .swap_input_support = true,
> + .support_direct_pin = true,
> + .dimension_mask = HPW_MASK,
> + .hvsize_mask = HSIZE_MASK,
> + .channel_swap_shift = CH_SWAP,
> + .yuv422_en_bit = YUV422_EN,
> + .csc_enable_bit = CSC_ENABLE,
> +};
> +
> static const struct mtk_dpi_conf mt8192_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> @@ -1091,6 +1109,9 @@ static const struct of_device_id
> mtk_dpi_of_ids[] = {
> { .compatible = "mediatek,mt8183-dpi",
> .data = &mt8183_conf,
> },
> + { .compatible = "mediatek,mt8186-dpi",
> + .data = &mt8186_conf,
> + },
> { .compatible = "mediatek,mt8192-dpi",
> .data = &mt8192_conf,
> },
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 546b79412815..3d32fbc66ac1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -646,6 +646,8 @@ static const struct of_device_id
> mtk_ddp_comp_dt_ids[] = {
> .data = (void *)MTK_DPI },
> { .compatible = "mediatek,mt8183-dpi",
> .data = (void *)MTK_DPI },
> + { .compatible = "mediatek,mt8186-dpi",
> + .data = (void *)MTK_DPI },
> { .compatible = "mediatek,mt8192-dpi",
> .data = (void *)MTK_DPI },
> { .compatible = "mediatek,mt8195-dp-intf",
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data
2022-09-22 12:45 ` [PATCH v8,3/3] drm: mediatek: Add mt8186 dpi compatibles and platform data xinlei.lee
2022-09-23 6:05 ` CK Hu (胡俊光)
@ 2022-09-23 9:13 ` AngeloGioacchino Del Regno
1 sibling, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-09-23 9:13 UTC (permalink / raw)
To: xinlei.lee, matthias.bgg, jason-jh.lin, rex-bc.chen, ck.hu,
p.zabel, airlied, daniel
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi
Il 22/09/22 14:45, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add the compatible because use edge_cfg_in_mmsys in mt8186.
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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^ permalink raw reply [flat|nested] 10+ messages in thread