From: Zhenyu Ye <yezhenyu2@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
<suzuki.poulose@arm.com>, <maz@kernel.org>,
<steven.price@arm.com>, <guohanjun@huawei.com>, <olof@lixom.net>
Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
xiexiangyou@huawei.com, zhangshaokun@hisilicon.com,
linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com,
kuhn.chenqun@huawei.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 2/2] arm64: tlb: Use the TLBI RANGE feature in arm64
Date: Thu, 9 Jul 2020 17:14:28 +0800 [thread overview]
Message-ID: <362990d2-3948-9820-e2d9-aa1ff1c8b068@huawei.com> (raw)
In-Reply-To: <20200709091054.1698-3-yezhenyu2@huawei.com>
On 2020/7/9 17:10, Zhenyu Ye wrote:
> + /*
> + * When cpu does not support TLBI RANGE feature, we flush the tlb
> + * entries one by one at the granularity of 'stride'.
> + * When cpu supports the TLBI RANGE feature, then:
> + * 1. If pages is odd, flush the first page through non-RANGE
> + * instruction;
> + * 2. For remaining pages: The minimum range granularity is decided
> + * by 'scale', so we can not flush all pages by one instruction
> + * in some cases.
> + *
> + * For example, when the pages = 0xe81a, let's start 'scale' from
> + * maximum, and find right 'num' for each 'scale':
> + *
> + * When scale = 3, we can flush no pages because the minumum
> + * range is 2^(5*3 + 1) = 0x10000.
> + * When scale = 2, the minimum range is 2^(5*2 + 1) = 0x800, we can
> + * flush 0xe800 pages this time, the num = 0xe800/0x800 - 1 = 0x1c.
> + * Remain pages is 0x1a;
> + * When scale = 1, the minimum range is 2^(5*1 + 1) = 0x40, no page
> + * can be flushed.
> + * When scale = 0, we flush the remaining 0x1a pages, the num =
> + * 0x1a/0x2 - 1 = 0xd.
> + *
> + * However, in most scenarios, the pages = 1 when flush_tlb_range() is
> + * called. Start from scale = 3 or other proper value (such as scale =
> + * ilog2(pages)), will incur extra overhead.
> + * So increase 'scale' from 0 to maximum, the flush order is exactly
> + * opposite to the example.
> + */
The comments may be too long, probably should be moved to commit messages.
Thanks,
Zhenyu
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next prev parent reply other threads:[~2020-07-09 9:16 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-09 9:10 [PATCH v1 0/2] arm64: tlb: add support for TLBI RANGE instructions Zhenyu Ye
2020-07-09 9:10 ` [PATCH v1 1/2] arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature Zhenyu Ye
2020-07-09 9:10 ` [PATCH v1 2/2] arm64: tlb: Use the TLBI RANGE feature in arm64 Zhenyu Ye
2020-07-09 9:14 ` Zhenyu Ye [this message]
2020-07-09 17:36 ` Catalin Marinas
2020-07-10 6:07 ` Zhenyu Ye
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