From: <Claudiu.Beznea@microchip.com>
To: <Nicolas.Ferre@microchip.com>, <sre@kernel.org>,
<alexandre.belloni@bootlin.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org
Subject: Re: [PATCH v2 0/2] at91-sama5d2_shdwc shutdown controller
Date: Tue, 14 Jan 2020 10:34:55 +0000 [thread overview]
Message-ID: <3d0c5a04-25fb-5ae6-fd3a-4049e293eab1@microchip.com> (raw)
In-Reply-To: <1576855878-13213-1-git-send-email-claudiu.beznea@microchip.com>
Hi Sebastien,
I know you may busy, I just want to be sure that you didn't forgot this series.
Thank you,
Claudiu Beznea
On 20.12.2019 17:31, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> PMC master clock register offset is different b/w sam9x60 and
> other SoCs. Since there is a need of this register offset in
> shutdown procedure we need to have it per SoC. This is what
> this series does.
>
> Changes in v2:
> - do not use r5 as intermediary registers in at91_poweroff
>
> Claudiu Beznea (2):
> power: reset: at91-poweroff: introduce struct shdwc_reg_config
> power: reset: at91-poweroff: use proper master clock register offset
>
> drivers/power/reset/at91-sama5d2_shdwc.c | 72 +++++++++++++++++++++-----------
> 1 file changed, 47 insertions(+), 25 deletions(-)
>
> --
> 2.7.4
>
>
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next prev parent reply other threads:[~2020-01-14 10:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-20 15:31 [PATCH v2 0/2] at91-sama5d2_shdwc shutdown controller Claudiu Beznea
2019-12-20 15:31 ` [PATCH v2 1/2] power: reset: at91-poweroff: introduce struct shdwc_reg_config Claudiu Beznea
2019-12-20 15:42 ` Nicolas.Ferre
2019-12-20 15:31 ` [PATCH v2 2/2] power: reset: at91-poweroff: use proper master clock register offset Claudiu Beznea
2019-12-20 15:42 ` Nicolas.Ferre
2020-01-14 10:34 ` Claudiu.Beznea [this message]
2020-01-15 20:52 ` [PATCH v2 0/2] at91-sama5d2_shdwc shutdown controller Sebastian Reichel
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