From: Asutosh Das <quic_asutoshd@quicinc.com>
To: <mani@kernel.org>, <quic_nguyenb@quicinc.com>,
<quic_xiaosenh@quicinc.com>, <quic_cang@quicinc.com>,
<quic_nitirawa@quicinc.com>, <quic_rampraka@quicinc.com>,
<quic_richardp@quicinc.com>, <stanley.chu@mediatek.com>,
<adrian.hunter@intel.com>, <bvanassche@acm.org>,
<avri.altman@wdc.com>, <beanhuo@micron.com>,
<martin.petersen@oracle.com>
Cc: <linux-scsi@vger.kernel.org>,
Asutosh Das <quic_asutoshd@quicinc.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
"James E.J. Bottomley" <jejb@linux.ibm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
open list <linux-kernel@vger.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-arm-kernel@lists.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>
Subject: [PATCH v1 05/16] ufs: core: mcq: Configure resource regions
Date: Thu, 22 Sep 2022 18:05:12 -0700 [thread overview]
Message-ID: <4d4df6ad6353b93253fb22deefb772dc59f5c84e.1663894792.git.quic_asutoshd@quicinc.com> (raw)
In-Reply-To: <cover.1663894792.git.quic_asutoshd@quicinc.com>
Define the mcq resources and add support to ioremap
the resource regions.
Co-developed-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
---
drivers/ufs/core/ufs-mcq.c | 100 ++++++++++++++++++++++++++++++++++++++++++++-
include/ufs/ufshcd.h | 28 +++++++++++++
2 files changed, 127 insertions(+), 1 deletion(-)
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index 934556f..e5cc7ab 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -17,6 +17,12 @@
#define UFS_MCQ_MIN_READ_QUEUES 0
#define UFS_MCQ_MIN_POLL_QUEUES 0
+#define MCQ_QCFGPTR_MASK GENMASK(7, 0)
+#define MCQ_QCFGPTR_UNIT 0x200
+#define MCQ_SQATTR_OFFSET(c) \
+ ((((c) >> 16) & MCQ_QCFGPTR_MASK) * MCQ_QCFGPTR_UNIT)
+#define MCQ_QCFG_SIZE 0x40
+
static unsigned int dev_cmd_queue = 1;
static int rw_queue_count_set(const char *val, const struct kernel_param *kp)
@@ -85,6 +91,96 @@ module_param_cb(poll_queues, &poll_queue_count_ops, &poll_queues, 0644);
MODULE_PARM_DESC(poll_queues,
"Number of poll queues used for r/w. Default value is 1");
+/* Resources */
+static const struct ufshcd_res_info_t ufshcd_res_info[RES_MAX] = {
+ {.name = "ufs_mem", .resource = NULL, .base = NULL},
+ {.name = "mcq", .resource = NULL, .base = NULL},
+ /* Submission Queue DAO */
+ {.name = "mcq_sqd", .resource = NULL, .base = NULL},
+ /* Submission Queue Interrupt Status */
+ {.name = "mcq_sqis", .resource = NULL, .base = NULL},
+ /* Completion Queue DAO */
+ {.name = "mcq_cqd", .resource = NULL, .base = NULL},
+ /* Completion Queue Interrupt Status */
+ {.name = "mcq_cqis", .resource = NULL, .base = NULL},
+ /* MCQ vendor specific */
+ {.name = "mcq_vs", .resource = NULL, .base = NULL},
+};
+
+static int ufshcd_mcq_config_resource(struct ufs_hba *hba)
+{
+ struct platform_device *pdev = to_platform_device(hba->dev);
+ struct ufshcd_res_info_t *res;
+ struct resource *res_mem, *res_mcq;
+ int i, ret = 0;
+
+ memcpy(hba->res, ufshcd_res_info, sizeof(ufshcd_res_info));
+
+ for (i = 0; i < RES_MAX; i++) {
+ res = &hba->res[i];
+ res->resource = platform_get_resource_byname(pdev,
+ IORESOURCE_MEM,
+ res->name);
+ if (!res->resource) {
+ dev_info(hba->dev, "Resource %s not provided\n", res->name);
+ if (i == RES_MEM)
+ return -ENOMEM;
+ continue;
+ } else if (i == RES_MEM) {
+ res_mem = res->resource;
+ res->base = hba->mmio_base;
+ continue;
+ }
+
+ res->base = devm_ioremap_resource(hba->dev, res->resource);
+ if (IS_ERR(res->base)) {
+ dev_err(hba->dev, "Failed to map res %s, err=%d\n",
+ res->name, (int)PTR_ERR(res->base));
+ res->base = NULL;
+ ret = PTR_ERR(res->base);
+ return ret;
+ }
+ }
+
+ res = &hba->res[RES_MCQ];
+ /* MCQ resource provided in DT */
+ if (res->base)
+ goto out;
+
+ /* Manually allocate MCQ resource */
+ res_mcq = res->resource;
+ res_mcq = devm_kzalloc(hba->dev, sizeof(*res_mcq), GFP_KERNEL);
+ if (!res_mcq) {
+ dev_err(hba->dev, "Failed to alloate MCQ resource\n");
+ return ret;
+ }
+
+ res_mcq->start = res_mem->start +
+ MCQ_SQATTR_OFFSET(hba->mcq_capabilities);
+ res_mcq->end = res_mcq->start + hba->nr_hw_queues * MCQ_QCFG_SIZE - 1;
+ res_mcq->flags = res_mem->flags;
+ res_mcq->name = "mcq";
+
+ ret = insert_resource(&iomem_resource, res_mcq);
+ if (ret) {
+ dev_err(hba->dev, "Failed to insert MCQ resource %d\n", ret);
+ return ret;
+ }
+
+ res->base = devm_ioremap_resource(hba->dev, res_mcq);
+ if (IS_ERR(res->base)) {
+ dev_err(hba->dev, "Map MCQ registers failed, err=%d\n",
+ (int)PTR_ERR(res->base));
+ ret = PTR_ERR(res->base);
+ res->base = NULL;
+ return ret;
+ }
+
+out:
+ hba->mcq_base = res->base;
+ return 0;
+}
+
static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba)
{
int i, rem;
@@ -126,7 +222,9 @@ int ufshcd_mcq_init(struct ufs_hba *hba)
int ret;
ret = ufshcd_mcq_config_nr_queues(hba);
-
+ if (ret)
+ return ret;
+ ret = ufshcd_mcq_config_resource(hba);
return ret;
}
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 298e103..54d742a 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -720,6 +720,30 @@ struct ufs_hba_monitor {
};
/**
+ * struct ufshcd_res_info_t - MCQ related resource regions
+ *
+ * @name: resource name
+ * @resource: pointer to resource region
+ * @base: register base address
+ */
+struct ufshcd_res_info_t {
+ const char *name;
+ struct resource *resource;
+ void __iomem *base;
+};
+
+enum ufshcd_res {
+ RES_MEM,
+ RES_MCQ,
+ RES_MCQ_SQD,
+ RES_MCQ_SQIS,
+ RES_MCQ_CQD,
+ RES_MCQ_CQIS,
+ RES_MCQ_VS,
+ RES_MAX,
+};
+
+/**
* struct ufs_hba - per adapter private structure
* @mmio_base: UFSHCI base register address
* @ucdl_base_addr: UFS Command Descriptor base address
@@ -829,6 +853,8 @@ struct ufs_hba_monitor {
* @mcq_sup: is mcq supported by UFSHC
* @nr_hw_queues: number of hardware queues configured
* @nr_queues: number of Queues of different queue types
+ * @res: array of resource info of MCQ registers
+ * @mcq_base: Multi circular queue registers base address
*/
struct ufs_hba {
void __iomem *mmio_base;
@@ -981,6 +1007,8 @@ struct ufs_hba {
bool mcq_sup;
unsigned int nr_hw_queues;
unsigned int nr_queues[HCTX_MAX_TYPES];
+ struct ufshcd_res_info_t res[RES_MAX];
+ void __iomem *mcq_base;
};
static inline bool is_mcq_supported(struct ufs_hba *hba)
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-23 1:11 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 1:05 [PATCH v1 00/16] Add Multi Circular Queue Support Asutosh Das
2022-09-23 1:05 ` [PATCH v1 01/16] ufs: core: Probe for ext_iid support Asutosh Das
2022-09-26 14:08 ` Manivannan Sadhasivam
2022-09-30 18:23 ` Bart Van Assche
2022-10-04 22:09 ` Asutosh Das
2022-09-23 1:05 ` [PATCH v1 02/16] ufs: core: Introduce Multi-circular queue capability Asutosh Das
2022-09-24 8:13 ` Avri Altman
2022-09-26 21:34 ` Asutosh Das
2022-09-26 14:27 ` Manivannan Sadhasivam
2022-09-23 1:05 ` [PATCH v1 03/16] ufs: core: Defer adding host to scsi if mcq is supported Asutosh Das
2022-09-30 18:32 ` Bart Van Assche
2022-10-04 18:51 ` Asutosh Das
2022-09-23 1:05 ` [PATCH v1 04/16] ufs: core: mcq: Introduce Multi Circular Queue Asutosh Das
2022-09-26 14:49 ` Manivannan Sadhasivam
2022-09-26 21:32 ` Asutosh Das
2022-09-30 18:37 ` Bart Van Assche
2022-09-23 1:05 ` Asutosh Das [this message]
2022-09-26 15:07 ` [PATCH v1 05/16] ufs: core: mcq: Configure resource regions Manivannan Sadhasivam
2022-09-30 18:42 ` Bart Van Assche
2022-09-23 1:05 ` [PATCH v1 06/16] ufs: core: mcq: Calculate queue depth Asutosh Das
2022-09-26 15:22 ` Manivannan Sadhasivam
2022-09-26 21:23 ` Asutosh Das
2022-09-23 1:05 ` [PATCH v1 07/16] ufs: core: mcq: Allocate memory for mcq mode Asutosh Das
2022-09-26 15:45 ` Manivannan Sadhasivam
2022-10-03 20:25 ` Asutosh Das
2022-09-23 1:05 ` [PATCH v1 08/16] ufs: core: mcq: Configure operation and runtime interface Asutosh Das
2022-09-23 1:05 ` [PATCH v1 09/16] ufs: core: mcq: Use shared tags for MCQ mode Asutosh Das
2022-09-23 1:05 ` [PATCH v1 10/16] ufs: core: Prepare ufshcd_send_command for mcq Asutosh Das
2022-09-23 1:05 ` [PATCH v1 11/16] ufs: core: mcq: Find hardware queue to queue request Asutosh Das
2022-09-23 1:05 ` [PATCH v1 12/16] ufs: core: Prepare for completion in mcq Asutosh Das
2022-09-30 20:43 ` Bart Van Assche
2022-09-23 1:05 ` [PATCH v1 13/16] ufs: mcq: Add completion support of a cqe Asutosh Das
2022-09-30 20:41 ` Bart Van Assche
2022-09-23 1:05 ` [PATCH v1 14/16] ufs: core: mcq: Add completion support in poll Asutosh Das
2022-09-23 1:05 ` [PATCH v1 15/16] ufs: core: mcq: Enable Multi Circular Queue Asutosh Das
2022-09-30 20:32 ` Bart Van Assche
2022-09-23 1:05 ` [PATCH v1 16/16] ufs: qcom-host: Enable multi circular queue capability Asutosh Das
2022-09-26 13:49 ` [PATCH v1 00/16] Add Multi Circular Queue Support Manivannan Sadhasivam
2022-09-26 18:55 ` Asutosh Das
2022-09-30 20:44 ` Bart Van Assche
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4d4df6ad6353b93253fb22deefb772dc59f5c84e.1663894792.git.quic_asutoshd@quicinc.com \
--to=quic_asutoshd@quicinc.com \
--cc=adrian.hunter@intel.com \
--cc=alim.akhtar@samsung.com \
--cc=avri.altman@wdc.com \
--cc=beanhuo@micron.com \
--cc=bvanassche@acm.org \
--cc=jejb@linux.ibm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-scsi@vger.kernel.org \
--cc=mani@kernel.org \
--cc=martin.petersen@oracle.com \
--cc=matthias.bgg@gmail.com \
--cc=quic_cang@quicinc.com \
--cc=quic_nguyenb@quicinc.com \
--cc=quic_nitirawa@quicinc.com \
--cc=quic_rampraka@quicinc.com \
--cc=quic_richardp@quicinc.com \
--cc=quic_xiaosenh@quicinc.com \
--cc=stanley.chu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).