[PATCH v7 0/8] imx25 adc and touchscreen driver

[PATCH v7 0/8] imx25 adc and touchscreen driver

[Markus Pargmann]

Hi,

This series adds a driver for the Freescale i.MX25 SoC internal ADC unit which
is used for touchscreen and ADC. The driver consists of three parts, the MFD
driver which handles interrupts and some central configuration registers, the
ADC driver and the touchscreen driver.

v7 has some modifications in the probe functions to use devres irq requests.
irq checks were fixed to check for irqs <= 0. The header was cleaned up to have
a more uniform presentation of the bit fields. Detailed changelogs are attached
to the according mails.

Best Regards,

Markus


Denis Carikli (2):
  ARM: dts: imx25: Add TSC and ADC support
  ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC
    support.

Markus Pargmann (6):
  ARM: dt: Binding documentation for imx25 ADC/TSC
  ARM: dt: Binding documentation for imx25 GCQ
  ARM: dt: Binding documentation for imx25 touchscreen controller
  mfd: fsl imx25 Touchscreen ADC driver
  iio: adc: fsl,imx25-gcq driver
  input: touchscreen: imx25 tcq driver

 .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt  |  54 ++
 .../bindings/input/touchscreen/fsl-mx25-tcq.txt    |  29 +
 .../devicetree/bindings/mfd/fsl-imx25-tsadc.txt    |  46 ++
 arch/arm/boot/dts/imx25.dtsi                       |  30 +-
 arch/arm/configs/imx_v4_v5_defconfig               |   4 +
 drivers/iio/adc/Kconfig                            |   7 +
 drivers/iio/adc/Makefile                           |   1 +
 drivers/iio/adc/fsl-imx25-gcq.c                    | 356 +++++++++++++
 drivers/input/touchscreen/Kconfig                  |   6 +
 drivers/input/touchscreen/Makefile                 |   1 +
 drivers/input/touchscreen/fsl-imx25-tcq.c          | 593 +++++++++++++++++++++
 drivers/mfd/Kconfig                                |  10 +
 drivers/mfd/Makefile                               |   2 +
 drivers/mfd/fsl-imx25-tsadc.c                      | 164 ++++++
 include/dt-bindings/iio/adc/fsl-imx25-gcq.h        |  18 +
 include/linux/mfd/imx25-tsadc.h                    | 141 +++++
 16 files changed, 1459 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
 create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
 create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
 create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
 create mode 100644 drivers/input/touchscreen/fsl-imx25-tcq.c
 create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
 create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h
 create mode 100644 include/linux/mfd/imx25-tsadc.h

-- 
2.1.4

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Markus Pargmann]

This documentation describes the devicetree bindings for the
ADC/Touchscreen unit of the i.MX25 SoC.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---

Notes:
    Changes in v6:
     - Removed adc-ref property and replaced it with refp and refn for positive and
       negative references. The properties are optional now as the default
       behaviour is a positive internal reference voltage and ADC GND as negative
       reference.

 .../devicetree/bindings/mfd/fsl-imx25-tsadc.txt    | 46 ++++++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt

diff --git a/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
new file mode 100644
index 000000000000..a857af0eb68c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
@@ -0,0 +1,46 @@
+Freescale mx25 ADC/TSC multifunction device
+
+This device combines two general purpose conversion queues one used for general
+ADC and the other used for touchscreens.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-tsadc".
+ - reg: Memory range of the device.
+ - interrupts: Interrupt for this device as described in
+   interrupts/interrupts.txt
+ - clocks: An 'ipg' clock defined as described in clocks/clock.txt
+ - interrupt-controller: This device is an interrupt controller. It controls
+   the interrupts of both conversion queues.
+ - #interrupt-cells: Should be '<1>'.
+ - #address-cells: Should be '<1>'.
+ - #size-cells: Should be '<1>'.
+ - ranges
+
+This device includes two conversion queues which can be added as subnodes.
+The first queue is for the touchscreen, the second for general purpose ADC.
+
+Example:
+	tscadc: tscadc at 50030000 {
+		compatible = "fsl,imx25-tsadc";
+		reg = <0x50030000 0xc>;
+		interrupts = <46>;
+		clocks = <&clks 119>;
+		clock-names = "ipg";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		tsc: tcq at 50030400 {
+			compatible = "fsl,imx25-tcq";
+			reg = <0x50030400 0x60>;
+			...
+		};
+
+		adc: gcq at 50030800 {
+			compatible = "fsl,imx25-gcq";
+			reg = <0x50030800 0x60>;
+			...
+		};
+	};
-- 
2.1.4

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Arnd Bergmann]

On Tuesday 03 March 2015 08:58:11 Markus Pargmann wrote:
> +Example:
> +       tscadc: tscadc at 50030000 {
> +               compatible = "fsl,imx25-tsadc";
> +               reg = <0x50030000 0xc>;
> +               interrupts = <46>;
> +               clocks = <&clks 119>;
> +               clock-names = "ipg";
> +               interrupt-controller;
> +               #interrupt-cells = <1>;
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges;
> +
> +               tsc: tcq at 50030400 {
> +                       compatible = "fsl,imx25-tcq";
> +                       reg = <0x50030400 0x60>;
> +                       ...
> +               };
> +
> +               adc: gcq at 50030800 {
> +                       compatible = "fsl,imx25-gcq";
> +                       reg = <0x50030800 0x60>;
> +                       ...
> +               };
> +       };
> 

I wonder if we should just treat this MFD as a single IIO device
that also registers to the input layer.

Are there any other registers in the 0x50030000-0x50031000
range, or could the fsl,imx25-tcq and fsl,imx25-gcq devices
be reused outside of a fsl,imx25-tsadc device?

	Arnd

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Markus Pargmann]

Hi,

On Tue, Mar 03, 2015 at 10:02:12AM +0100, Arnd Bergmann wrote:
> On Tuesday 03 March 2015 08:58:11 Markus Pargmann wrote:
> > +Example:
> > +       tscadc: tscadc at 50030000 {
> > +               compatible = "fsl,imx25-tsadc";
> > +               reg = <0x50030000 0xc>;
> > +               interrupts = <46>;
> > +               clocks = <&clks 119>;
> > +               clock-names = "ipg";
> > +               interrupt-controller;
> > +               #interrupt-cells = <1>;
> > +               #address-cells = <1>;
> > +               #size-cells = <1>;
> > +               ranges;
> > +
> > +               tsc: tcq at 50030400 {
> > +                       compatible = "fsl,imx25-tcq";
> > +                       reg = <0x50030400 0x60>;
> > +                       ...
> > +               };
> > +
> > +               adc: gcq at 50030800 {
> > +                       compatible = "fsl,imx25-gcq";
> > +                       reg = <0x50030800 0x60>;
> > +                       ...
> > +               };
> > +       };
> > 
> 
> I wonder if we should just treat this MFD as a single IIO device
> that also registers to the input layer.
> 
> Are there any other registers in the 0x50030000-0x50031000
> range, or could the fsl,imx25-tcq and fsl,imx25-gcq devices
> be reused outside of a fsl,imx25-tsadc device?

There are no other registers in this range. The tcq and gcq devices can
not be used outside of the tsadc. gcq and tcq are identical units so it
may work to use both of them as gcq for example but nothing else.

It may work to have this as single IIO device. However this would be a
major rework of this series. There are a lot less users of imx25 than
imx6 for example. And of these users barely anyone uses this unit at
all. I really would like to get these drivers mainline so others can use
it. But after 1 year and 7 versions of this series I don't want to put
a lot of work into these drivers. I think there are other components in
the kernel where the time is better used.

Best Regards,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150305/95f068cb/attachment.sig>

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Fabio Estevam]

On Thu, Mar 5, 2015 at 4:12 AM, Markus Pargmann <mpa@pengutronix.de> wrote:

> There are no other registers in this range. The tcq and gcq devices can
> not be used outside of the tsadc. gcq and tcq are identical units so it
> may work to use both of them as gcq for example but nothing else.
>
> It may work to have this as single IIO device. However this would be a
> major rework of this series. There are a lot less users of imx25 than
> imx6 for example. And of these users barely anyone uses this unit at
> all. I really would like to get these drivers mainline so others can use
> it. But after 1 year and 7 versions of this series I don't want to put
> a lot of work into these drivers. I think there are other components in
> the kernel where the time is better used.

I agree with Markus here. It would be really nice to have touchscreen
support running in mainline kernel on mx25.

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Jonathan Cameron]

On 05/03/15 07:12, Markus Pargmann wrote:
> Hi,
> 
> On Tue, Mar 03, 2015 at 10:02:12AM +0100, Arnd Bergmann wrote:
>> On Tuesday 03 March 2015 08:58:11 Markus Pargmann wrote:
>>> +Example:
>>> +       tscadc: tscadc at 50030000 {
>>> +               compatible = "fsl,imx25-tsadc";
>>> +               reg = <0x50030000 0xc>;
>>> +               interrupts = <46>;
>>> +               clocks = <&clks 119>;
>>> +               clock-names = "ipg";
>>> +               interrupt-controller;
>>> +               #interrupt-cells = <1>;
>>> +               #address-cells = <1>;
>>> +               #size-cells = <1>;
>>> +               ranges;
>>> +
>>> +               tsc: tcq at 50030400 {
>>> +                       compatible = "fsl,imx25-tcq";
>>> +                       reg = <0x50030400 0x60>;
>>> +                       ...
>>> +               };
>>> +
>>> +               adc: gcq at 50030800 {
>>> +                       compatible = "fsl,imx25-gcq";
>>> +                       reg = <0x50030800 0x60>;
>>> +                       ...
>>> +               };
>>> +       };
>>>
>>
>> I wonder if we should just treat this MFD as a single IIO device
>> that also registers to the input layer.
>>
>> Are there any other registers in the 0x50030000-0x50031000
>> range, or could the fsl,imx25-tcq and fsl,imx25-gcq devices
>> be reused outside of a fsl,imx25-tsadc device?
> 
> There are no other registers in this range. The tcq and gcq devices can
> not be used outside of the tsadc. gcq and tcq are identical units so it
> may work to use both of them as gcq for example but nothing else.
> 
> It may work to have this as single IIO device. However this would be a
> major rework of this series. There are a lot less users of imx25 than
> imx6 for example. And of these users barely anyone uses this unit at
> all. I really would like to get these drivers mainline so others can use
> it. But after 1 year and 7 versions of this series I don't want to put
> a lot of work into these drivers. I think there are other components in
> the kernel where the time is better used.
> 
> Best Regards,
> 
> Markus
> 
I was pretty much against the IIO driver registering with input at least
where it was vaguely separable.  Pushed a few drivers in this direction.
Slightly more code, but often these devices are pretty separable (even
if like here it's two identical hardware blocks) and we normally get
a whole chunk of touch screen specific magic hardware that isn't of
general use.

It would be lovely to try and generalize some of this stuff and have
the touchscreen driver act as a client of IIO, but the
hardware is too fiddly for it to be obvious how to do it so far.

Jonathan

[PATCH v7 1/8] ARM: dt: Binding documentation for imx25 ADC/TSC

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> This documentation describes the devicetree bindings for the
> ADC/Touchscreen unit of the i.MX25 SoC.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Straight forward and sensible.

Acked-by: Jonathan Cameron <jic23@kernel.org>

> ---
> 
> Notes:
>     Changes in v6:
>      - Removed adc-ref property and replaced it with refp and refn for positive and
>        negative references. The properties are optional now as the default
>        behaviour is a positive internal reference voltage and ADC GND as negative
>        reference.
> 
>  .../devicetree/bindings/mfd/fsl-imx25-tsadc.txt    | 46 ++++++++++++++++++++++
>  1 file changed, 46 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
> 
> diff --git a/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
> new file mode 100644
> index 000000000000..a857af0eb68c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
> @@ -0,0 +1,46 @@
> +Freescale mx25 ADC/TSC multifunction device
> +
> +This device combines two general purpose conversion queues one used for general
> +ADC and the other used for touchscreens.
> +
> +Required properties:
> + - compatible: Should be "fsl,imx25-tsadc".
> + - reg: Memory range of the device.
> + - interrupts: Interrupt for this device as described in
> +   interrupts/interrupts.txt
> + - clocks: An 'ipg' clock defined as described in clocks/clock.txt
> + - interrupt-controller: This device is an interrupt controller. It controls
> +   the interrupts of both conversion queues.
> + - #interrupt-cells: Should be '<1>'.
> + - #address-cells: Should be '<1>'.
> + - #size-cells: Should be '<1>'.
> + - ranges
> +
> +This device includes two conversion queues which can be added as subnodes.
> +The first queue is for the touchscreen, the second for general purpose ADC.
> +
> +Example:
> +	tscadc: tscadc at 50030000 {
> +		compatible = "fsl,imx25-tsadc";
> +		reg = <0x50030000 0xc>;
> +		interrupts = <46>;
> +		clocks = <&clks 119>;
> +		clock-names = "ipg";
> +		interrupt-controller;
> +		#interrupt-cells = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		tsc: tcq at 50030400 {
> +			compatible = "fsl,imx25-tcq";
> +			reg = <0x50030400 0x60>;
> +			...
> +		};
> +
> +		adc: gcq at 50030800 {
> +			compatible = "fsl,imx25-gcq";
> +			reg = <0x50030800 0x60>;
> +			...
> +		};
> +	};
> 

[PATCH v7 2/8] ARM: dt: Binding documentation for imx25 GCQ

[Markus Pargmann]

The documentation describes the bindings for the imx25 GCQ unit which is
essentially a generic conversion queue using the imx25 ADC.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---

Notes:
    Changes in v6:
     - Changed bindings to use adc-refp and adc-refn. Also a bit of cleanup in the
       setup routine.
    
    Changes in v5:
     - Fixed locking
     - Removed module owner

 .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt  | 54 ++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt

diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
new file mode 100644
index 000000000000..9f7c08990034
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
@@ -0,0 +1,54 @@
+Freescale i.MX25 ADC GCQ device
+
+This is a generic conversion queue device that can convert any of the
+analog inputs using the ADC unit of the i.MX25.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-gcq".
+ - reg: Should be the register range of the module.
+ - interrupts: Should be the interrupt number of the module.
+   Typically this is <1>.
+ - interrupt-parent: phandle to the tsadc module of the i.MX25.
+ - #address-cells: Should be <1> (setting for the subnodes)
+ - #size-cells: Should be <0> (setting for the subnodes)
+
+Optional properties:
+ - vref-supply: The regulator supplying the ADC reference voltage.
+   Required when at least one subnode uses the external reference.
+
+Sub-nodes:
+Optionally you can define subnodes which define the reference voltage
+for the analog inputs.
+
+Required properties for subnodes:
+ - reg: Should be the number of the analog input.
+     0: xp
+     1: yp
+     2: xn
+     3: yn
+     4: wiper
+     5: inaux0
+     6: inaux1
+     7: inaux2
+Optional properties for subnodes:
+ - fsl,adc-refp: specifies the positive reference input as defined in
+     <dt-bindings/iio/adc/fsl-imx25-gcq.h>
+ - fsl,adc-refn: specifies the negative reference input as defined in
+     <dt-bindings/iio/adc/fsl-imx25-gcq.h>
+
+Example:
+
+	adc: adc at 50030800 {
+		compatible = "fsl,imx25-gcq";
+		reg = <0x50030800 0x60>;
+		interrupt-parent = <&tscadc>;
+		interrupts = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		inaux at 5 {
+			reg = <5>;
+			fsl,adc-refp = <MX25_ADC_REF_INT>;
+			fsl,adc-refn = <MX25_ADC_REF_NGND>;
+		};
+	};
-- 
2.1.4

[PATCH v7 2/8] ARM: dt: Binding documentation for imx25 GCQ

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> The documentation describes the bindings for the imx25 GCQ unit which is
> essentially a generic conversion queue using the imx25 ADC.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Looks good to me, though ideally these would get a devicetree maintainer
ack.

Acked-by: Jonathan Cameron <jic23@kernel.org>
> ---
> 
> Notes:
>     Changes in v6:
>      - Changed bindings to use adc-refp and adc-refn. Also a bit of cleanup in the
>        setup routine.
>     
>     Changes in v5:
>      - Fixed locking
>      - Removed module owner
> 
>  .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt  | 54 ++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> 
> diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> new file mode 100644
> index 000000000000..9f7c08990034
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
> @@ -0,0 +1,54 @@
> +Freescale i.MX25 ADC GCQ device
> +
> +This is a generic conversion queue device that can convert any of the
> +analog inputs using the ADC unit of the i.MX25.
> +
> +Required properties:
> + - compatible: Should be "fsl,imx25-gcq".
> + - reg: Should be the register range of the module.
> + - interrupts: Should be the interrupt number of the module.
> +   Typically this is <1>.
> + - interrupt-parent: phandle to the tsadc module of the i.MX25.
> + - #address-cells: Should be <1> (setting for the subnodes)
> + - #size-cells: Should be <0> (setting for the subnodes)
> +
> +Optional properties:
> + - vref-supply: The regulator supplying the ADC reference voltage.
> +   Required when at least one subnode uses the external reference.
> +
> +Sub-nodes:
> +Optionally you can define subnodes which define the reference voltage
> +for the analog inputs.
> +
> +Required properties for subnodes:
> + - reg: Should be the number of the analog input.
> +     0: xp
> +     1: yp
> +     2: xn
> +     3: yn
> +     4: wiper
> +     5: inaux0
> +     6: inaux1
> +     7: inaux2
> +Optional properties for subnodes:
> + - fsl,adc-refp: specifies the positive reference input as defined in
> +     <dt-bindings/iio/adc/fsl-imx25-gcq.h>
> + - fsl,adc-refn: specifies the negative reference input as defined in
> +     <dt-bindings/iio/adc/fsl-imx25-gcq.h>
> +
> +Example:
> +
> +	adc: adc at 50030800 {
> +		compatible = "fsl,imx25-gcq";
> +		reg = <0x50030800 0x60>;
> +		interrupt-parent = <&tscadc>;
> +		interrupts = <1>;
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		inaux at 5 {
> +			reg = <5>;
> +			fsl,adc-refp = <MX25_ADC_REF_INT>;
> +			fsl,adc-refn = <MX25_ADC_REF_NGND>;
> +		};
> +	};
> 

[PATCH v7 3/8] ARM: dt: Binding documentation for imx25 touchscreen controller

[Markus Pargmann]

This is the touchscreen conversion queue binding documentation. It uses
the shared imx25 ADC.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---

Notes:
    Changes in v5:
     - Fix signed/unsigned comparison
     - Fix unused variable settling_time by putting it in the correct argument list
     - Use continous conversion queue with the repeat feature and a proper
       repeat-wait. Previously the touchscreen caused massive number of interrupts.

 .../bindings/input/touchscreen/fsl-mx25-tcq.txt    | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt

diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
new file mode 100644
index 000000000000..4214a99d197a
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
@@ -0,0 +1,29 @@
+Freescale mx25 TS conversion queue module
+
+mx25 touchscreen conversion queue module which controls the ADC unit of the
+mx25 for attached touchscreens.
+
+Required properties:
+ - compatible: Should be "fsl,imx25-tcq".
+ - reg: Memory range of the device.
+ - interrupts: Should be the interrupt number associated with this module within
+   the tscadc unit (<0>).
+ - interrupt-parent: Should be a phandle to the tscadc unit.
+ - fsl,wires: Should be '<4>' or '<5>'
+
+Optional properties:
+ - fsl,pen-debounce: Pen debounce time.
+ - fsl,pen-threshold: Pen-down threshold for the touchscreen.
+ - fsl,settling-time: Settling time in nanoseconds.
+
+This device includes two conversion queues which can be added as subnodes.
+The first queue is for the touchscreen, the second for general purpose ADC.
+
+Example:
+	tsc: tcq at 50030400 {
+		compatible = "fsl,imx25-tcq";
+		reg = <0x50030400 0x60>;
+		interrupt-parent = <&tscadc>;
+		interrupts = <0>;
+		fsl,wires = <4>;
+	};
-- 
2.1.4

[PATCH v7 3/8] ARM: dt: Binding documentation for imx25 touchscreen controller

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> This is the touchscreen conversion queue binding documentation. It uses
> the shared imx25 ADC.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Looks fine, one more general binding approach comment though.
A lot of the vendor specific elements in here are awfully generic.
Does it not make sense to have them as standard attributes for
touch screen drivers?
> ---
> 
> Notes:
>     Changes in v5:
>      - Fix signed/unsigned comparison
>      - Fix unused variable settling_time by putting it in the correct argument list
>      - Use continous conversion queue with the repeat feature and a proper
>        repeat-wait. Previously the touchscreen caused massive number of interrupts.
> 
>  .../bindings/input/touchscreen/fsl-mx25-tcq.txt    | 29 ++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> 
> diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> new file mode 100644
> index 000000000000..4214a99d197a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> @@ -0,0 +1,29 @@
> +Freescale mx25 TS conversion queue module
> +
> +mx25 touchscreen conversion queue module which controls the ADC unit of the
> +mx25 for attached touchscreens.
> +
> +Required properties:
> + - compatible: Should be "fsl,imx25-tcq".
> + - reg: Memory range of the device.
> + - interrupts: Should be the interrupt number associated with this module within
> +   the tscadc unit (<0>).
> + - interrupt-parent: Should be a phandle to the tscadc unit.
> + - fsl,wires: Should be '<4>' or '<5>'
> +
> +Optional properties:
> + - fsl,pen-debounce: Pen debounce time.
> + - fsl,pen-threshold: Pen-down threshold for the touchscreen.
> + - fsl,settling-time: Settling time in nanoseconds.
Obviously it's up to Dmitry etc, but are these not standard enough attributes to
not be vendor specific?  I'd expect say touch-pen-debouce and touch-pen-threshold
etc to be standard binding elements for touch screens.

> +
> +This device includes two conversion queues which can be added as subnodes.
> +The first queue is for the touchscreen, the second for general purpose ADC.
> +
> +Example:
> +	tsc: tcq at 50030400 {
> +		compatible = "fsl,imx25-tcq";
> +		reg = <0x50030400 0x60>;
> +		interrupt-parent = <&tscadc>;
> +		interrupts = <0>;
> +		fsl,wires = <4>;
> +	};
> 

[PATCH v7 3/8] ARM: dt: Binding documentation for imx25 touchscreen controller

[Markus Pargmann]

On Sat, Mar 07, 2015 at 05:37:04PM +0000, Jonathan Cameron wrote:
> On 03/03/15 07:58, Markus Pargmann wrote:
> > This is the touchscreen conversion queue binding documentation. It uses
> > the shared imx25 ADC.
> > 
> > Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Looks fine, one more general binding approach comment though.
> A lot of the vendor specific elements in here are awfully generic.
> Does it not make sense to have them as standard attributes for
> touch screen drivers?
> > ---
> > 
> > Notes:
> >     Changes in v5:
> >      - Fix signed/unsigned comparison
> >      - Fix unused variable settling_time by putting it in the correct argument list
> >      - Use continous conversion queue with the repeat feature and a proper
> >        repeat-wait. Previously the touchscreen caused massive number of interrupts.
> > 
> >  .../bindings/input/touchscreen/fsl-mx25-tcq.txt    | 29 ++++++++++++++++++++++
> >  1 file changed, 29 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> > new file mode 100644
> > index 000000000000..4214a99d197a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
> > @@ -0,0 +1,29 @@
> > +Freescale mx25 TS conversion queue module
> > +
> > +mx25 touchscreen conversion queue module which controls the ADC unit of the
> > +mx25 for attached touchscreens.
> > +
> > +Required properties:
> > + - compatible: Should be "fsl,imx25-tcq".
> > + - reg: Memory range of the device.
> > + - interrupts: Should be the interrupt number associated with this module within
> > +   the tscadc unit (<0>).
> > + - interrupt-parent: Should be a phandle to the tscadc unit.
> > + - fsl,wires: Should be '<4>' or '<5>'
> > +
> > +Optional properties:
> > + - fsl,pen-debounce: Pen debounce time.
> > + - fsl,pen-threshold: Pen-down threshold for the touchscreen.
> > + - fsl,settling-time: Settling time in nanoseconds.
> Obviously it's up to Dmitry etc, but are these not standard enough attributes to
> not be vendor specific?  I'd expect say touch-pen-debouce and touch-pen-threshold
> etc to be standard binding elements for touch screens.

Seems like a good idea. I just discovered that there is a 'touchscreen-fuzz-pressure'
which seems to be the same as fsl,pen-threshold. So this should be
replaced in my patches. The other properties do not exist.

Dmitry, what do you think about some standard properties for the
remaining?

Best Regards,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150324/2d48dd22/attachment.sig>

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Markus Pargmann]

This is the core driver for imx25 touchscreen/adc driver. The module
has one shared ADC and two different conversion queues which use the
ADC. The two queues are identical. Both can be used for general purpose
ADC but one is meant to be used for touchscreens.

This driver is the core which manages the central components and
registers of the TSC/ADC unit. It manages the IRQs and forwards them to
the correct components.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
---

Notes:
    Changes in v7:
     - Cleanup bit defines in header files to be more readable
     - Fix irq check to return with an error for irq <= 0
     - Add COMPILE_TEST in Kconfig file
    
    Changes in v5:
     - Remove ifdef CONFIG_OF as this driver is only for DT usage
     - Remove module owner
     - Add Kconfig dependencies ARCH_MX25 and OF
    
    @Jonathan Cameron:
    I left your acked-by on the patch as these were small changes. If it should be
    removed, please say so. Thanks

 drivers/mfd/Kconfig             |  10 +++
 drivers/mfd/Makefile            |   2 +
 drivers/mfd/fsl-imx25-tsadc.c   | 164 ++++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/imx25-tsadc.h | 141 ++++++++++++++++++++++++++++++++++
 4 files changed, 317 insertions(+)
 create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
 create mode 100644 include/linux/mfd/imx25-tsadc.h

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 38356e39adba..c0036aef61d7 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -244,6 +244,16 @@ config MFD_MC13XXX_I2C
 	help
 	  Select this if your MC13xxx is connected via an I2C bus.
 
+config MFD_MX25_TSADC
+	tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
+	select REGMAP_MMIO
+	depends on SOC_IMX25 || COMPILE_TEST
+	depends on OF
+	help
+	  Enable support for the integrated Touchscreen and ADC unit of the
+	  i.MX25 processors. They consist of a conversion queue for general
+	  purpose ADC and a queue for Touchscreens.
+
 config MFD_HI6421_PMIC
 	tristate "HiSilicon Hi6421 PMU/Codec IC"
 	depends on OF
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 19f3d744e3bd..acfe639e147c 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
 obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
 obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
 
+obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
+
 obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
 obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
 obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
new file mode 100644
index 000000000000..c4a3e15001ea
--- /dev/null
+++ b/drivers/mfd/fsl-imx25-tsadc.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/irqchip/chained_irq.h>
+#include <linux/irqdesc.h>
+#include <linux/irqdomain.h>
+#include <linux/irq.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+static struct regmap_config mx25_tsadc_regmap_config = {
+	.fast_io = true,
+	.max_register = 8,
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
+{
+	struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
+	struct irq_chip *chip = irq_get_chip(irq);
+	u32 status;
+
+	chained_irq_enter(chip, desc);
+
+	regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
+
+	if (status & MX25_TGSR_GCQ_INT)
+		generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
+
+	if (status & MX25_TGSR_TCQ_INT)
+		generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
+
+	chained_irq_exit(chip, desc);
+}
+
+static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
+				 irq_hw_number_t hwirq)
+{
+	struct mx25_tsadc *tsadc = d->host_data;
+
+	irq_set_chip_data(irq, tsadc);
+	irq_set_chip_and_handler(irq, &dummy_irq_chip,
+				 handle_level_irq);
+	set_irq_flags(irq, IRQF_VALID);
+
+	return 0;
+}
+
+static struct irq_domain_ops mx25_tsadc_domain_ops = {
+	.map = mx25_tsadc_domain_map,
+	.xlate = irq_domain_xlate_onecell,
+};
+
+static int mx25_tsadc_setup_irq(struct platform_device *pdev,
+				struct mx25_tsadc *tsadc)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	int irq;
+
+	irq = platform_get_irq(pdev, 0);
+	if (irq <= 0) {
+		dev_err(dev, "Failed to get irq\n");
+		return irq;
+	}
+
+	tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
+					      tsadc);
+	if (!tsadc->domain) {
+		dev_err(dev, "Failed to add irq domain\n");
+		return -ENOMEM;
+	}
+
+	irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
+	irq_set_handler_data(irq, tsadc);
+
+	return 0;
+}
+
+static int mx25_tsadc_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	struct mx25_tsadc *tsadc;
+	struct resource *res;
+	int ret;
+	void __iomem *iomem;
+
+	tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
+	if (!tsadc)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	iomem = devm_ioremap_resource(dev, res);
+	if (IS_ERR(iomem))
+		return PTR_ERR(iomem);
+
+	tsadc->regs = devm_regmap_init_mmio(dev, iomem,
+					    &mx25_tsadc_regmap_config);
+	if (IS_ERR(tsadc->regs)) {
+		dev_err(dev, "Failed to initialize regmap\n");
+		return PTR_ERR(tsadc->regs);
+	}
+
+	tsadc->clk = devm_clk_get(dev, "ipg");
+	if (IS_ERR(tsadc->clk)) {
+		dev_err(dev, "Failed to get ipg clock\n");
+		return PTR_ERR(tsadc->clk);
+	}
+
+	/* Enable clock and reset the component */
+	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
+			   MX25_TGCR_CLK_EN);
+	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
+			   MX25_TGCR_TSC_RST);
+
+	/* Setup powersaving mode, but enable internal reference voltage */
+	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
+			   MX25_TGCR_POWERMODE_SAVE);
+	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
+			   MX25_TGCR_INTREFEN);
+
+	ret = mx25_tsadc_setup_irq(pdev, tsadc);
+	if (ret)
+		return ret;
+
+	platform_set_drvdata(pdev, tsadc);
+
+	of_platform_populate(np, NULL, NULL, dev);
+
+	return 0;
+}
+
+static const struct of_device_id mx25_tsadc_ids[] = {
+	{ .compatible = "fsl,imx25-tsadc" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver mx25_tsadc_driver = {
+	.driver = {
+		.name = "mx25-tsadc",
+		.of_match_table = of_match_ptr(mx25_tsadc_ids),
+	},
+	.probe = mx25_tsadc_probe,
+};
+module_platform_driver(mx25_tsadc_driver);
+
+MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:mx25-tsadc");
diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
new file mode 100644
index 000000000000..da348ac34a41
--- /dev/null
+++ b/include/linux/mfd/imx25-tsadc.h
@@ -0,0 +1,141 @@
+#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
+#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
+
+struct regmap;
+struct device;
+struct clk;
+
+struct mx25_tsadc {
+	struct regmap *regs;
+	struct irq_domain *domain;
+	struct clk *clk;
+};
+
+#define MX25_TSC_TGCR			0x00
+#define MX25_TSC_TGSR			0x04
+#define MX25_TSC_TICR			0x08
+
+/* The same register layout for TC and GC queue */
+#define MX25_ADCQ_FIFO			0x00
+#define MX25_ADCQ_CR			0x04
+#define MX25_ADCQ_SR			0x08
+#define MX25_ADCQ_MR			0x0c
+#define MX25_ADCQ_ITEM_7_0		0x20
+#define MX25_ADCQ_ITEM_15_8		0x24
+#define MX25_ADCQ_CFG(n)		(0x40 + ((n) * 0x4))
+
+#define MX25_ADCQ_MR_MASK		0xffffffff
+
+/* TGCR */
+#define MX25_TGCR_PDBTIME(x)		((x) << 25)
+#define MX25_TGCR_PDBTIME_MASK		MX25_TGCR_PDBTIME(0x7f)
+#define MX25_TGCR_PDBEN			BIT(24)
+#define MX25_TGCR_PDEN			BIT(23)
+#define MX25_TGCR_ADCCLKCFG(x)		((x) << 16)
+#define MX25_TGCR_GET_ADCCLK(x)		(((x) >> 16) & 0x1f)
+#define MX25_TGCR_INTREFEN		BIT(10)
+#define MX25_TGCR_POWERMODE_MASK	(3 << 8)
+#define MX25_TGCR_POWERMODE_SAVE	(1 << 8)
+#define MX25_TGCR_POWERMODE_ON		(2 << 8)
+#define MX25_TGCR_STLC			BIT(5)
+#define MX25_TGCR_SLPC			BIT(4)
+#define MX25_TGCR_FUNC_RST		BIT(2)
+#define MX25_TGCR_TSC_RST		BIT(1)
+#define MX25_TGCR_CLK_EN		BIT(0)
+
+/* TGSR */
+#define MX25_TGSR_SLP_INT		BIT(2)
+#define MX25_TGSR_GCQ_INT		BIT(1)
+#define MX25_TGSR_TCQ_INT		BIT(0)
+
+/* ADCQ_ITEM_* */
+#define _MX25_ADCQ_ITEM(item, x)	((x) << ((item) * 4))
+#define MX25_ADCQ_ITEM(item, x)		((item) >= 8 ? \
+		_MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
+
+/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
+#define MX25_ADCQ_FIFO_DATA(x)		(((x) >> 4) & 0xfff)
+#define MX25_ADCQ_FIFO_ID(x)		((x) & 0xf)
+
+/* ADCQ_CR (TCQR and GCQR) */
+#define MX25_ADCQ_CR_PDCFG_LEVEL	BIT(19)
+#define MX25_ADCQ_CR_PDMSK		BIT(18)
+#define MX25_ADCQ_CR_FRST		BIT(17)
+#define MX25_ADCQ_CR_QRST		BIT(16)
+#define MX25_ADCQ_CR_RWAIT_MASK		(0xf << 12)
+#define MX25_ADCQ_CR_RWAIT(x)		((x) << 12)
+#define MX25_ADCQ_CR_WMRK_MASK		(0xf << 8)
+#define MX25_ADCQ_CR_WMRK(x)		((x) << 8)
+#define MX25_ADCQ_CR_LITEMID_MASK	(0xf << 4)
+#define MX25_ADCQ_CR_LITEMID(x)		((x) << 4)
+#define MX25_ADCQ_CR_RPT		BIT(3)
+#define MX25_ADCQ_CR_FQS		BIT(2)
+#define MX25_ADCQ_CR_QSM_MASK		0x3
+#define MX25_ADCQ_CR_QSM_PD		0x1
+#define MX25_ADCQ_CR_QSM_FQS		0x2
+#define MX25_ADCQ_CR_QSM_FQS_PD		0x3
+
+/* ADCQ_SR (TCQSR and GCQSR) */
+#define MX25_ADCQ_SR_FDRY		BIT(15)
+#define MX25_ADCQ_SR_FULL		BIT(14)
+#define MX25_ADCQ_SR_EMPT		BIT(13)
+#define MX25_ADCQ_SR_FDN(x)		(((x) >> 8) & 0x1f)
+#define MX25_ADCQ_SR_FRR		BIT(6)
+#define MX25_ADCQ_SR_FUR		BIT(5)
+#define MX25_ADCQ_SR_FOR		BIT(4)
+#define MX25_ADCQ_SR_EOQ		BIT(1)
+#define MX25_ADCQ_SR_PD			BIT(0)
+
+/* ADCQ_MR (TCQMR and GCQMR) */
+#define MX25_ADCQ_MR_FDRY_DMA		BIT(31)
+#define MX25_ADCQ_MR_FER_DMA		BIT(22)
+#define MX25_ADCQ_MR_FUR_DMA		BIT(21)
+#define MX25_ADCQ_MR_FOR_DMA		BIT(20)
+#define MX25_ADCQ_MR_EOQ_DMA		BIT(17)
+#define MX25_ADCQ_MR_PD_DMA		BIT(16)
+#define MX25_ADCQ_MR_FDRY_IRQ		BIT(15)
+#define MX25_ADCQ_MR_FER_IRQ		BIT(6)
+#define MX25_ADCQ_MR_FUR_IRQ		BIT(5)
+#define MX25_ADCQ_MR_FOR_IRQ		BIT(4)
+#define MX25_ADCQ_MR_EOQ_IRQ		BIT(1)
+#define MX25_ADCQ_MR_PD_IRQ		BIT(0)
+
+/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
+#define MX25_ADCQ_CFG_SETTLING_TIME(x)	((x) << 24)
+#define MX25_ADCQ_CFG_IGS		(1 << 20)
+#define MX25_ADCQ_CFG_NOS_MASK		(0xf << 16)
+#define MX25_ADCQ_CFG_NOS(x)		(((x) - 1) << 16)
+#define MX25_ADCQ_CFG_WIPER		(1 << 15)
+#define MX25_ADCQ_CFG_YNLR		(1 << 14)
+#define MX25_ADCQ_CFG_YPLL_HIGH		(0 << 12)
+#define MX25_ADCQ_CFG_YPLL_OFF		(1 << 12)
+#define MX25_ADCQ_CFG_YPLL_LOW		(3 << 12)
+#define MX25_ADCQ_CFG_XNUR_HIGH		(0 << 10)
+#define MX25_ADCQ_CFG_XNUR_OFF		(1 << 10)
+#define MX25_ADCQ_CFG_XNUR_LOW		(3 << 10)
+#define MX25_ADCQ_CFG_XPUL_HIGH		(0 << 9)
+#define MX25_ADCQ_CFG_XPUL_OFF		(1 << 9)
+#define MX25_ADCQ_CFG_REFP(sel)		((sel) << 7)
+#define MX25_ADCQ_CFG_REFP_YP		(0 << 7)
+#define MX25_ADCQ_CFG_REFP_XP		(1 << 7)
+#define MX25_ADCQ_CFG_REFP_EXT		(2 << 7)
+#define MX25_ADCQ_CFG_REFP_INT		(3 << 7)
+#define MX25_ADCQ_CFG_REFP_MASK		(3 << 7)
+#define MX25_ADCQ_CFG_IN(sel)		((sel) << 4)
+#define MX25_ADCQ_CFG_IN_XP		(0 << 4)
+#define MX25_ADCQ_CFG_IN_YP		(1 << 4)
+#define MX25_ADCQ_CFG_IN_XN		(2 << 4)
+#define MX25_ADCQ_CFG_IN_YN		(3 << 4)
+#define MX25_ADCQ_CFG_IN_WIPER		(4 << 4)
+#define MX25_ADCQ_CFG_IN_AUX0		(5 << 4)
+#define MX25_ADCQ_CFG_IN_AUX1		(6 << 4)
+#define MX25_ADCQ_CFG_IN_AUX2		(7 << 4)
+#define MX25_ADCQ_CFG_REFN(sel)		((sel) << 2)
+#define MX25_ADCQ_CFG_REFN_XN		(0 << 2)
+#define MX25_ADCQ_CFG_REFN_YN		(1 << 2)
+#define MX25_ADCQ_CFG_REFN_NGND		(2 << 2)
+#define MX25_ADCQ_CFG_REFN_NGND2	(3 << 2)
+#define MX25_ADCQ_CFG_REFN_MASK		(3 << 2)
+#define MX25_ADCQ_CFG_PENIACK		(1 << 1)
+
+#endif  /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */
-- 
2.1.4

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> This is the core driver for imx25 touchscreen/adc driver. The module
> has one shared ADC and two different conversion queues which use the
> ADC. The two queues are identical. Both can be used for general purpose
> ADC but one is meant to be used for touchscreens.
> 
> This driver is the core which manages the central components and
> registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> the correct components.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> Acked-by: Jonathan Cameron <jic23@kernel.org>
hehe. Read it again (backwards so only just found my Ack).

Anyhow, one really minor comment inline.  Feel free
to ignore it. Ack still stands.

> ---
> 
> Notes:
>     Changes in v7:
>      - Cleanup bit defines in header files to be more readable
>      - Fix irq check to return with an error for irq <= 0
>      - Add COMPILE_TEST in Kconfig file
>     
>     Changes in v5:
>      - Remove ifdef CONFIG_OF as this driver is only for DT usage
>      - Remove module owner
>      - Add Kconfig dependencies ARCH_MX25 and OF
>     
>     @Jonathan Cameron:
>     I left your acked-by on the patch as these were small changes. If it should be
>     removed, please say so. Thanks
> 
>  drivers/mfd/Kconfig             |  10 +++
>  drivers/mfd/Makefile            |   2 +
>  drivers/mfd/fsl-imx25-tsadc.c   | 164 ++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/imx25-tsadc.h | 141 ++++++++++++++++++++++++++++++++++
>  4 files changed, 317 insertions(+)
>  create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
>  create mode 100644 include/linux/mfd/imx25-tsadc.h
> 
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 38356e39adba..c0036aef61d7 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -244,6 +244,16 @@ config MFD_MC13XXX_I2C
>  	help
>  	  Select this if your MC13xxx is connected via an I2C bus.
>  
> +config MFD_MX25_TSADC
> +	tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
> +	select REGMAP_MMIO
> +	depends on SOC_IMX25 || COMPILE_TEST
> +	depends on OF
> +	help
> +	  Enable support for the integrated Touchscreen and ADC unit of the
> +	  i.MX25 processors. They consist of a conversion queue for general
> +	  purpose ADC and a queue for Touchscreens.
> +
>  config MFD_HI6421_PMIC
>  	tristate "HiSilicon Hi6421 PMU/Codec IC"
>  	depends on OF
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 19f3d744e3bd..acfe639e147c 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
>  obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
>  obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
>  
> +obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
> +
>  obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
>  obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
>  obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
> diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
> new file mode 100644
> index 000000000000..c4a3e15001ea
> --- /dev/null
> +++ b/drivers/mfd/fsl-imx25-tsadc.c
> @@ -0,0 +1,164 @@
> +/*
> + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/interrupt.h>
> +#include <linux/irqchip/chained_irq.h>
> +#include <linux/irqdesc.h>
> +#include <linux/irqdomain.h>
> +#include <linux/irq.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +static struct regmap_config mx25_tsadc_regmap_config = {
> +	.fast_io = true,
> +	.max_register = 8,
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,
> +};
> +
> +static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
> +{
> +	struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
> +	struct irq_chip *chip = irq_get_chip(irq);
> +	u32 status;
> +
> +	chained_irq_enter(chip, desc);
> +
> +	regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
> +
> +	if (status & MX25_TGSR_GCQ_INT)
> +		generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
> +
> +	if (status & MX25_TGSR_TCQ_INT)
> +		generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
> +
> +	chained_irq_exit(chip, desc);
> +}
> +
> +static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
> +				 irq_hw_number_t hwirq)
> +{
> +	struct mx25_tsadc *tsadc = d->host_data;
> +
> +	irq_set_chip_data(irq, tsadc);
> +	irq_set_chip_and_handler(irq, &dummy_irq_chip,
> +				 handle_level_irq);
> +	set_irq_flags(irq, IRQF_VALID);
> +
> +	return 0;
> +}
> +
> +static struct irq_domain_ops mx25_tsadc_domain_ops = {
> +	.map = mx25_tsadc_domain_map,
> +	.xlate = irq_domain_xlate_onecell,
> +};
> +
> +static int mx25_tsadc_setup_irq(struct platform_device *pdev,
> +				struct mx25_tsadc *tsadc)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	int irq;
> +
> +	irq = platform_get_irq(pdev, 0);
> +	if (irq <= 0) {
> +		dev_err(dev, "Failed to get irq\n");
> +		return irq;
> +	}
> +
> +	tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
> +					      tsadc);
> +	if (!tsadc->domain) {
> +		dev_err(dev, "Failed to add irq domain\n");
> +		return -ENOMEM;
> +	}
> +
> +	irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
> +	irq_set_handler_data(irq, tsadc);
> +
> +	return 0;
> +}
> +
> +static int mx25_tsadc_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	struct mx25_tsadc *tsadc;
> +	struct resource *res;
> +	int ret;
> +	void __iomem *iomem;
> +
> +	tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
> +	if (!tsadc)
> +		return -ENOMEM;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	iomem = devm_ioremap_resource(dev, res);
> +	if (IS_ERR(iomem))
> +		return PTR_ERR(iomem);
> +
> +	tsadc->regs = devm_regmap_init_mmio(dev, iomem,
> +					    &mx25_tsadc_regmap_config);
> +	if (IS_ERR(tsadc->regs)) {
> +		dev_err(dev, "Failed to initialize regmap\n");
> +		return PTR_ERR(tsadc->regs);
> +	}
> +
> +	tsadc->clk = devm_clk_get(dev, "ipg");
> +	if (IS_ERR(tsadc->clk)) {
> +		dev_err(dev, "Failed to get ipg clock\n");
> +		return PTR_ERR(tsadc->clk);
> +	}
> +
> +	/* Enable clock and reset the component */
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
> +			   MX25_TGCR_CLK_EN);
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
> +			   MX25_TGCR_TSC_RST);
> +
> +	/* Setup powersaving mode, but enable internal reference voltage */
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
> +			   MX25_TGCR_POWERMODE_SAVE);
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
> +			   MX25_TGCR_INTREFEN);
> +
> +	ret = mx25_tsadc_setup_irq(pdev, tsadc);
> +	if (ret)
> +		return ret;
> +
> +	platform_set_drvdata(pdev, tsadc);
> +
> +	of_platform_populate(np, NULL, NULL, dev);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id mx25_tsadc_ids[] = {
> +	{ .compatible = "fsl,imx25-tsadc" },
> +	{ /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_tsadc_driver = {
> +	.driver = {
> +		.name = "mx25-tsadc",
> +		.of_match_table = of_match_ptr(mx25_tsadc_ids),
> +	},
> +	.probe = mx25_tsadc_probe,
> +};
> +module_platform_driver(mx25_tsadc_driver);
> +
> +MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:mx25-tsadc");
> diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> new file mode 100644
> index 000000000000..da348ac34a41
> --- /dev/null
> +++ b/include/linux/mfd/imx25-tsadc.h
> @@ -0,0 +1,141 @@
> +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +
> +struct regmap;
> +struct device;
> +struct clk;
> +
> +struct mx25_tsadc {
> +	struct regmap *regs;
> +	struct irq_domain *domain;
> +	struct clk *clk;
> +};
> +
> +#define MX25_TSC_TGCR			0x00
> +#define MX25_TSC_TGSR			0x04
> +#define MX25_TSC_TICR			0x08
> +
> +/* The same register layout for TC and GC queue */
> +#define MX25_ADCQ_FIFO			0x00
> +#define MX25_ADCQ_CR			0x04
> +#define MX25_ADCQ_SR			0x08
> +#define MX25_ADCQ_MR			0x0c
> +#define MX25_ADCQ_ITEM_7_0		0x20
> +#define MX25_ADCQ_ITEM_15_8		0x24
> +#define MX25_ADCQ_CFG(n)		(0x40 + ((n) * 0x4))
> +
> +#define MX25_ADCQ_MR_MASK		0xffffffff
> +
> +/* TGCR */
> +#define MX25_TGCR_PDBTIME(x)		((x) << 25)
> +#define MX25_TGCR_PDBTIME_MASK		MX25_TGCR_PDBTIME(0x7f)
> +#define MX25_TGCR_PDBEN			BIT(24)
> +#define MX25_TGCR_PDEN			BIT(23)
> +#define MX25_TGCR_ADCCLKCFG(x)		((x) << 16)
> +#define MX25_TGCR_GET_ADCCLK(x)		(((x) >> 16) & 0x1f)
> +#define MX25_TGCR_INTREFEN		BIT(10)
> +#define MX25_TGCR_POWERMODE_MASK	(3 << 8)
> +#define MX25_TGCR_POWERMODE_SAVE	(1 << 8)
> +#define MX25_TGCR_POWERMODE_ON		(2 << 8)
> +#define MX25_TGCR_STLC			BIT(5)
> +#define MX25_TGCR_SLPC			BIT(4)
> +#define MX25_TGCR_FUNC_RST		BIT(2)
> +#define MX25_TGCR_TSC_RST		BIT(1)
> +#define MX25_TGCR_CLK_EN		BIT(0)
> +
> +/* TGSR */
> +#define MX25_TGSR_SLP_INT		BIT(2)
> +#define MX25_TGSR_GCQ_INT		BIT(1)
> +#define MX25_TGSR_TCQ_INT		BIT(0)
> +
> +/* ADCQ_ITEM_* */
> +#define _MX25_ADCQ_ITEM(item, x)	((x) << ((item) * 4))
> +#define MX25_ADCQ_ITEM(item, x)		((item) >= 8 ? \
> +		_MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
> +
> +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
> +#define MX25_ADCQ_FIFO_DATA(x)		(((x) >> 4) & 0xfff)
> +#define MX25_ADCQ_FIFO_ID(x)		((x) & 0xf)
> +
> +/* ADCQ_CR (TCQR and GCQR) */
> +#define MX25_ADCQ_CR_PDCFG_LEVEL	BIT(19)
> +#define MX25_ADCQ_CR_PDMSK		BIT(18)
> +#define MX25_ADCQ_CR_FRST		BIT(17)
> +#define MX25_ADCQ_CR_QRST		BIT(16)
> +#define MX25_ADCQ_CR_RWAIT_MASK		(0xf << 12)
> +#define MX25_ADCQ_CR_RWAIT(x)		((x) << 12)
> +#define MX25_ADCQ_CR_WMRK_MASK		(0xf << 8)
> +#define MX25_ADCQ_CR_WMRK(x)		((x) << 8)
> +#define MX25_ADCQ_CR_LITEMID_MASK	(0xf << 4)
> +#define MX25_ADCQ_CR_LITEMID(x)		((x) << 4)
> +#define MX25_ADCQ_CR_RPT		BIT(3)
> +#define MX25_ADCQ_CR_FQS		BIT(2)
> +#define MX25_ADCQ_CR_QSM_MASK		0x3
> +#define MX25_ADCQ_CR_QSM_PD		0x1
> +#define MX25_ADCQ_CR_QSM_FQS		0x2
> +#define MX25_ADCQ_CR_QSM_FQS_PD		0x3
> +
> +/* ADCQ_SR (TCQSR and GCQSR) */
> +#define MX25_ADCQ_SR_FDRY		BIT(15)
> +#define MX25_ADCQ_SR_FULL		BIT(14)
> +#define MX25_ADCQ_SR_EMPT		BIT(13)
> +#define MX25_ADCQ_SR_FDN(x)		(((x) >> 8) & 0x1f)
> +#define MX25_ADCQ_SR_FRR		BIT(6)
> +#define MX25_ADCQ_SR_FUR		BIT(5)
> +#define MX25_ADCQ_SR_FOR		BIT(4)
> +#define MX25_ADCQ_SR_EOQ		BIT(1)
> +#define MX25_ADCQ_SR_PD			BIT(0)
> +
> +/* ADCQ_MR (TCQMR and GCQMR) */
> +#define MX25_ADCQ_MR_FDRY_DMA		BIT(31)
> +#define MX25_ADCQ_MR_FER_DMA		BIT(22)
> +#define MX25_ADCQ_MR_FUR_DMA		BIT(21)
> +#define MX25_ADCQ_MR_FOR_DMA		BIT(20)
> +#define MX25_ADCQ_MR_EOQ_DMA		BIT(17)
> +#define MX25_ADCQ_MR_PD_DMA		BIT(16)
> +#define MX25_ADCQ_MR_FDRY_IRQ		BIT(15)
> +#define MX25_ADCQ_MR_FER_IRQ		BIT(6)
> +#define MX25_ADCQ_MR_FUR_IRQ		BIT(5)
> +#define MX25_ADCQ_MR_FOR_IRQ		BIT(4)
> +#define MX25_ADCQ_MR_EOQ_IRQ		BIT(1)
> +#define MX25_ADCQ_MR_PD_IRQ		BIT(0)
> +
> +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
> +#define MX25_ADCQ_CFG_SETTLING_TIME(x)	((x) << 24)
> +#define MX25_ADCQ_CFG_IGS		(1 << 20)
> +#define MX25_ADCQ_CFG_NOS_MASK		(0xf << 16)
> +#define MX25_ADCQ_CFG_NOS(x)		(((x) - 1) << 16)
> +#define MX25_ADCQ_CFG_WIPER		(1 << 15)
> +#define MX25_ADCQ_CFG_YNLR		(1 << 14)
> +#define MX25_ADCQ_CFG_YPLL_HIGH		(0 << 12)
> +#define MX25_ADCQ_CFG_YPLL_OFF		(1 << 12)
> +#define MX25_ADCQ_CFG_YPLL_LOW		(3 << 12)
> +#define MX25_ADCQ_CFG_XNUR_HIGH		(0 << 10)
> +#define MX25_ADCQ_CFG_XNUR_OFF		(1 << 10)
> +#define MX25_ADCQ_CFG_XNUR_LOW		(3 << 10)
> +#define MX25_ADCQ_CFG_XPUL_HIGH		(0 << 9)
> +#define MX25_ADCQ_CFG_XPUL_OFF		(1 << 9)
> +#define MX25_ADCQ_CFG_REFP(sel)		((sel) << 7)
> +#define MX25_ADCQ_CFG_REFP_YP		(0 << 7)
> +#define MX25_ADCQ_CFG_REFP_XP		(1 << 7)
> +#define MX25_ADCQ_CFG_REFP_EXT		(2 << 7)
> +#define MX25_ADCQ_CFG_REFP_INT		(3 << 7)
> +#define MX25_ADCQ_CFG_REFP_MASK		(3 << 7)
> +#define MX25_ADCQ_CFG_IN(sel)		((sel) << 4)
> +#define MX25_ADCQ_CFG_IN_XP		(0 << 4)
> +#define MX25_ADCQ_CFG_IN_YP		(1 << 4)
> +#define MX25_ADCQ_CFG_IN_XN		(2 << 4)
> +#define MX25_ADCQ_CFG_IN_YN		(3 << 4)
> +#define MX25_ADCQ_CFG_IN_WIPER		(4 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX0		(5 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX1		(6 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX2		(7 << 4)
> +#define MX25_ADCQ_CFG_REFN(sel)		((sel) << 2)
Given you have this macro, would the next lot
not be cleaner if they were defined using it?
#define MX25_ADCQ_CFG_REFN_XN	MX25_ADC_CFG_REFN(0)
(very minor point, though it would apply in quite a few places
in these definitions).
> +#define MX25_ADCQ_CFG_REFN_XN		(0 << 2)
> +#define MX25_ADCQ_CFG_REFN_YN		(1 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND		(2 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND2	(3 << 2)
> +#define MX25_ADCQ_CFG_REFN_MASK		(3 << 2)
> +#define MX25_ADCQ_CFG_PENIACK		(1 << 1)
> +
> +#endif  /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */
> 

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Markus Pargmann]

On Sat, Mar 07, 2015 at 05:52:26PM +0000, Jonathan Cameron wrote:
> On 03/03/15 07:58, Markus Pargmann wrote:
> > This is the core driver for imx25 touchscreen/adc driver. The module
> > has one shared ADC and two different conversion queues which use the
> > ADC. The two queues are identical. Both can be used for general purpose
> > ADC but one is meant to be used for touchscreens.
> > 
> > This driver is the core which manages the central components and
> > registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> > the correct components.
> > 
> > Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> > Signed-off-by: Denis Carikli <denis@eukrea.com>
> > Acked-by: Jonathan Cameron <jic23@kernel.org>
> hehe. Read it again (backwards so only just found my Ack).
> 
> Anyhow, one really minor comment inline.  Feel free
> to ignore it. Ack still stands.
> 
> > ---
> > 
> > Notes:
> >     Changes in v7:
> >      - Cleanup bit defines in header files to be more readable
> >      - Fix irq check to return with an error for irq <= 0
> >      - Add COMPILE_TEST in Kconfig file
> >     
> >     Changes in v5:
> >      - Remove ifdef CONFIG_OF as this driver is only for DT usage
> >      - Remove module owner
> >      - Add Kconfig dependencies ARCH_MX25 and OF
> >     
> >     @Jonathan Cameron:
> >     I left your acked-by on the patch as these were small changes. If it should be
> >     removed, please say so. Thanks
> > 
> >  drivers/mfd/Kconfig             |  10 +++
> >  drivers/mfd/Makefile            |   2 +
> >  drivers/mfd/fsl-imx25-tsadc.c   | 164 ++++++++++++++++++++++++++++++++++++++++
> >  include/linux/mfd/imx25-tsadc.h | 141 ++++++++++++++++++++++++++++++++++
> >  4 files changed, 317 insertions(+)
> >  create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
> >  create mode 100644 include/linux/mfd/imx25-tsadc.h
> > 
> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> > index 38356e39adba..c0036aef61d7 100644
> > --- a/drivers/mfd/Kconfig
> > +++ b/drivers/mfd/Kconfig
> > @@ -244,6 +244,16 @@ config MFD_MC13XXX_I2C
> >  	help
> >  	  Select this if your MC13xxx is connected via an I2C bus.
> >  
> > +config MFD_MX25_TSADC
> > +	tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
> > +	select REGMAP_MMIO
> > +	depends on SOC_IMX25 || COMPILE_TEST
> > +	depends on OF
> > +	help
> > +	  Enable support for the integrated Touchscreen and ADC unit of the
> > +	  i.MX25 processors. They consist of a conversion queue for general
> > +	  purpose ADC and a queue for Touchscreens.
> > +
> >  config MFD_HI6421_PMIC
> >  	tristate "HiSilicon Hi6421 PMU/Codec IC"
> >  	depends on OF
> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> > index 19f3d744e3bd..acfe639e147c 100644
> > --- a/drivers/mfd/Makefile
> > +++ b/drivers/mfd/Makefile
> > @@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
> >  obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
> >  obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
> >  
> > +obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
> > +
> >  obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
> >  obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
> >  obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
> > diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
> > new file mode 100644
> > index 000000000000..c4a3e15001ea
> > --- /dev/null
> > +++ b/drivers/mfd/fsl-imx25-tsadc.c
> > @@ -0,0 +1,164 @@
> > +/*
> > + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> > + *
> > + * This program is free software; you can redistribute it and/or modify it under
> > + * the terms of the GNU General Public License version 2 as published by the
> > + * Free Software Foundation.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/irqchip/chained_irq.h>
> > +#include <linux/irqdesc.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/irq.h>
> > +#include <linux/mfd/imx25-tsadc.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +
> > +static struct regmap_config mx25_tsadc_regmap_config = {
> > +	.fast_io = true,
> > +	.max_register = 8,
> > +	.reg_bits = 32,
> > +	.val_bits = 32,
> > +	.reg_stride = 4,
> > +};
> > +
> > +static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
> > +{
> > +	struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
> > +	struct irq_chip *chip = irq_get_chip(irq);
> > +	u32 status;
> > +
> > +	chained_irq_enter(chip, desc);
> > +
> > +	regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
> > +
> > +	if (status & MX25_TGSR_GCQ_INT)
> > +		generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
> > +
> > +	if (status & MX25_TGSR_TCQ_INT)
> > +		generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
> > +
> > +	chained_irq_exit(chip, desc);
> > +}
> > +
> > +static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
> > +				 irq_hw_number_t hwirq)
> > +{
> > +	struct mx25_tsadc *tsadc = d->host_data;
> > +
> > +	irq_set_chip_data(irq, tsadc);
> > +	irq_set_chip_and_handler(irq, &dummy_irq_chip,
> > +				 handle_level_irq);
> > +	set_irq_flags(irq, IRQF_VALID);
> > +
> > +	return 0;
> > +}
> > +
> > +static struct irq_domain_ops mx25_tsadc_domain_ops = {
> > +	.map = mx25_tsadc_domain_map,
> > +	.xlate = irq_domain_xlate_onecell,
> > +};
> > +
> > +static int mx25_tsadc_setup_irq(struct platform_device *pdev,
> > +				struct mx25_tsadc *tsadc)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	int irq;
> > +
> > +	irq = platform_get_irq(pdev, 0);
> > +	if (irq <= 0) {
> > +		dev_err(dev, "Failed to get irq\n");
> > +		return irq;
> > +	}
> > +
> > +	tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
> > +					      tsadc);
> > +	if (!tsadc->domain) {
> > +		dev_err(dev, "Failed to add irq domain\n");
> > +		return -ENOMEM;
> > +	}
> > +
> > +	irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
> > +	irq_set_handler_data(irq, tsadc);
> > +
> > +	return 0;
> > +}
> > +
> > +static int mx25_tsadc_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	struct mx25_tsadc *tsadc;
> > +	struct resource *res;
> > +	int ret;
> > +	void __iomem *iomem;
> > +
> > +	tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
> > +	if (!tsadc)
> > +		return -ENOMEM;
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	iomem = devm_ioremap_resource(dev, res);
> > +	if (IS_ERR(iomem))
> > +		return PTR_ERR(iomem);
> > +
> > +	tsadc->regs = devm_regmap_init_mmio(dev, iomem,
> > +					    &mx25_tsadc_regmap_config);
> > +	if (IS_ERR(tsadc->regs)) {
> > +		dev_err(dev, "Failed to initialize regmap\n");
> > +		return PTR_ERR(tsadc->regs);
> > +	}
> > +
> > +	tsadc->clk = devm_clk_get(dev, "ipg");
> > +	if (IS_ERR(tsadc->clk)) {
> > +		dev_err(dev, "Failed to get ipg clock\n");
> > +		return PTR_ERR(tsadc->clk);
> > +	}
> > +
> > +	/* Enable clock and reset the component */
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
> > +			   MX25_TGCR_CLK_EN);
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
> > +			   MX25_TGCR_TSC_RST);
> > +
> > +	/* Setup powersaving mode, but enable internal reference voltage */
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
> > +			   MX25_TGCR_POWERMODE_SAVE);
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
> > +			   MX25_TGCR_INTREFEN);
> > +
> > +	ret = mx25_tsadc_setup_irq(pdev, tsadc);
> > +	if (ret)
> > +		return ret;
> > +
> > +	platform_set_drvdata(pdev, tsadc);
> > +
> > +	of_platform_populate(np, NULL, NULL, dev);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct of_device_id mx25_tsadc_ids[] = {
> > +	{ .compatible = "fsl,imx25-tsadc" },
> > +	{ /* Sentinel */ }
> > +};
> > +
> > +static struct platform_driver mx25_tsadc_driver = {
> > +	.driver = {
> > +		.name = "mx25-tsadc",
> > +		.of_match_table = of_match_ptr(mx25_tsadc_ids),
> > +	},
> > +	.probe = mx25_tsadc_probe,
> > +};
> > +module_platform_driver(mx25_tsadc_driver);
> > +
> > +MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
> > +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> > +MODULE_LICENSE("GPL v2");
> > +MODULE_ALIAS("platform:mx25-tsadc");
> > diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> > new file mode 100644
> > index 000000000000..da348ac34a41
> > --- /dev/null
> > +++ b/include/linux/mfd/imx25-tsadc.h
> > @@ -0,0 +1,141 @@
> > +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> > +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> > +
> > +struct regmap;
> > +struct device;
> > +struct clk;
> > +
> > +struct mx25_tsadc {
> > +	struct regmap *regs;
> > +	struct irq_domain *domain;
> > +	struct clk *clk;
> > +};
> > +
> > +#define MX25_TSC_TGCR			0x00
> > +#define MX25_TSC_TGSR			0x04
> > +#define MX25_TSC_TICR			0x08
> > +
> > +/* The same register layout for TC and GC queue */
> > +#define MX25_ADCQ_FIFO			0x00
> > +#define MX25_ADCQ_CR			0x04
> > +#define MX25_ADCQ_SR			0x08
> > +#define MX25_ADCQ_MR			0x0c
> > +#define MX25_ADCQ_ITEM_7_0		0x20
> > +#define MX25_ADCQ_ITEM_15_8		0x24
> > +#define MX25_ADCQ_CFG(n)		(0x40 + ((n) * 0x4))
> > +
> > +#define MX25_ADCQ_MR_MASK		0xffffffff
> > +
> > +/* TGCR */
> > +#define MX25_TGCR_PDBTIME(x)		((x) << 25)
> > +#define MX25_TGCR_PDBTIME_MASK		MX25_TGCR_PDBTIME(0x7f)
> > +#define MX25_TGCR_PDBEN			BIT(24)
> > +#define MX25_TGCR_PDEN			BIT(23)
> > +#define MX25_TGCR_ADCCLKCFG(x)		((x) << 16)
> > +#define MX25_TGCR_GET_ADCCLK(x)		(((x) >> 16) & 0x1f)
> > +#define MX25_TGCR_INTREFEN		BIT(10)
> > +#define MX25_TGCR_POWERMODE_MASK	(3 << 8)
> > +#define MX25_TGCR_POWERMODE_SAVE	(1 << 8)
> > +#define MX25_TGCR_POWERMODE_ON		(2 << 8)
> > +#define MX25_TGCR_STLC			BIT(5)
> > +#define MX25_TGCR_SLPC			BIT(4)
> > +#define MX25_TGCR_FUNC_RST		BIT(2)
> > +#define MX25_TGCR_TSC_RST		BIT(1)
> > +#define MX25_TGCR_CLK_EN		BIT(0)
> > +
> > +/* TGSR */
> > +#define MX25_TGSR_SLP_INT		BIT(2)
> > +#define MX25_TGSR_GCQ_INT		BIT(1)
> > +#define MX25_TGSR_TCQ_INT		BIT(0)
> > +
> > +/* ADCQ_ITEM_* */
> > +#define _MX25_ADCQ_ITEM(item, x)	((x) << ((item) * 4))
> > +#define MX25_ADCQ_ITEM(item, x)		((item) >= 8 ? \
> > +		_MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
> > +
> > +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
> > +#define MX25_ADCQ_FIFO_DATA(x)		(((x) >> 4) & 0xfff)
> > +#define MX25_ADCQ_FIFO_ID(x)		((x) & 0xf)
> > +
> > +/* ADCQ_CR (TCQR and GCQR) */
> > +#define MX25_ADCQ_CR_PDCFG_LEVEL	BIT(19)
> > +#define MX25_ADCQ_CR_PDMSK		BIT(18)
> > +#define MX25_ADCQ_CR_FRST		BIT(17)
> > +#define MX25_ADCQ_CR_QRST		BIT(16)
> > +#define MX25_ADCQ_CR_RWAIT_MASK		(0xf << 12)
> > +#define MX25_ADCQ_CR_RWAIT(x)		((x) << 12)
> > +#define MX25_ADCQ_CR_WMRK_MASK		(0xf << 8)
> > +#define MX25_ADCQ_CR_WMRK(x)		((x) << 8)
> > +#define MX25_ADCQ_CR_LITEMID_MASK	(0xf << 4)
> > +#define MX25_ADCQ_CR_LITEMID(x)		((x) << 4)
> > +#define MX25_ADCQ_CR_RPT		BIT(3)
> > +#define MX25_ADCQ_CR_FQS		BIT(2)
> > +#define MX25_ADCQ_CR_QSM_MASK		0x3
> > +#define MX25_ADCQ_CR_QSM_PD		0x1
> > +#define MX25_ADCQ_CR_QSM_FQS		0x2
> > +#define MX25_ADCQ_CR_QSM_FQS_PD		0x3
> > +
> > +/* ADCQ_SR (TCQSR and GCQSR) */
> > +#define MX25_ADCQ_SR_FDRY		BIT(15)
> > +#define MX25_ADCQ_SR_FULL		BIT(14)
> > +#define MX25_ADCQ_SR_EMPT		BIT(13)
> > +#define MX25_ADCQ_SR_FDN(x)		(((x) >> 8) & 0x1f)
> > +#define MX25_ADCQ_SR_FRR		BIT(6)
> > +#define MX25_ADCQ_SR_FUR		BIT(5)
> > +#define MX25_ADCQ_SR_FOR		BIT(4)
> > +#define MX25_ADCQ_SR_EOQ		BIT(1)
> > +#define MX25_ADCQ_SR_PD			BIT(0)
> > +
> > +/* ADCQ_MR (TCQMR and GCQMR) */
> > +#define MX25_ADCQ_MR_FDRY_DMA		BIT(31)
> > +#define MX25_ADCQ_MR_FER_DMA		BIT(22)
> > +#define MX25_ADCQ_MR_FUR_DMA		BIT(21)
> > +#define MX25_ADCQ_MR_FOR_DMA		BIT(20)
> > +#define MX25_ADCQ_MR_EOQ_DMA		BIT(17)
> > +#define MX25_ADCQ_MR_PD_DMA		BIT(16)
> > +#define MX25_ADCQ_MR_FDRY_IRQ		BIT(15)
> > +#define MX25_ADCQ_MR_FER_IRQ		BIT(6)
> > +#define MX25_ADCQ_MR_FUR_IRQ		BIT(5)
> > +#define MX25_ADCQ_MR_FOR_IRQ		BIT(4)
> > +#define MX25_ADCQ_MR_EOQ_IRQ		BIT(1)
> > +#define MX25_ADCQ_MR_PD_IRQ		BIT(0)
> > +
> > +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
> > +#define MX25_ADCQ_CFG_SETTLING_TIME(x)	((x) << 24)
> > +#define MX25_ADCQ_CFG_IGS		(1 << 20)
> > +#define MX25_ADCQ_CFG_NOS_MASK		(0xf << 16)
> > +#define MX25_ADCQ_CFG_NOS(x)		(((x) - 1) << 16)
> > +#define MX25_ADCQ_CFG_WIPER		(1 << 15)
> > +#define MX25_ADCQ_CFG_YNLR		(1 << 14)
> > +#define MX25_ADCQ_CFG_YPLL_HIGH		(0 << 12)
> > +#define MX25_ADCQ_CFG_YPLL_OFF		(1 << 12)
> > +#define MX25_ADCQ_CFG_YPLL_LOW		(3 << 12)
> > +#define MX25_ADCQ_CFG_XNUR_HIGH		(0 << 10)
> > +#define MX25_ADCQ_CFG_XNUR_OFF		(1 << 10)
> > +#define MX25_ADCQ_CFG_XNUR_LOW		(3 << 10)
> > +#define MX25_ADCQ_CFG_XPUL_HIGH		(0 << 9)
> > +#define MX25_ADCQ_CFG_XPUL_OFF		(1 << 9)
> > +#define MX25_ADCQ_CFG_REFP(sel)		((sel) << 7)
> > +#define MX25_ADCQ_CFG_REFP_YP		(0 << 7)
> > +#define MX25_ADCQ_CFG_REFP_XP		(1 << 7)
> > +#define MX25_ADCQ_CFG_REFP_EXT		(2 << 7)
> > +#define MX25_ADCQ_CFG_REFP_INT		(3 << 7)
> > +#define MX25_ADCQ_CFG_REFP_MASK		(3 << 7)
> > +#define MX25_ADCQ_CFG_IN(sel)		((sel) << 4)
> > +#define MX25_ADCQ_CFG_IN_XP		(0 << 4)
> > +#define MX25_ADCQ_CFG_IN_YP		(1 << 4)
> > +#define MX25_ADCQ_CFG_IN_XN		(2 << 4)
> > +#define MX25_ADCQ_CFG_IN_YN		(3 << 4)
> > +#define MX25_ADCQ_CFG_IN_WIPER		(4 << 4)
> > +#define MX25_ADCQ_CFG_IN_AUX0		(5 << 4)
> > +#define MX25_ADCQ_CFG_IN_AUX1		(6 << 4)
> > +#define MX25_ADCQ_CFG_IN_AUX2		(7 << 4)
> > +#define MX25_ADCQ_CFG_REFN(sel)		((sel) << 2)
> Given you have this macro, would the next lot
> not be cleaner if they were defined using it?
> #define MX25_ADCQ_CFG_REFN_XN	MX25_ADC_CFG_REFN(0)
> (very minor point, though it would apply in quite a few places
> in these definitions).

Yes this may be a bit cleaner. I will replace them.

Thanks,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150309/36d73cf5/attachment-0001.sig>

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Lee Jones]

On Tue, 03 Mar 2015, Markus Pargmann wrote:

> This is the core driver for imx25 touchscreen/adc driver. The module
> has one shared ADC and two different conversion queues which use the
> ADC. The two queues are identical. Both can be used for general purpose
> ADC but one is meant to be used for touchscreens.
> 
> This driver is the core which manages the central components and
> registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> the correct components.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> Acked-by: Jonathan Cameron <jic23@kernel.org>
> ---
> 
> Notes:
>     Changes in v7:
>      - Cleanup bit defines in header files to be more readable
>      - Fix irq check to return with an error for irq <= 0
>      - Add COMPILE_TEST in Kconfig file
>     
>     Changes in v5:
>      - Remove ifdef CONFIG_OF as this driver is only for DT usage
>      - Remove module owner
>      - Add Kconfig dependencies ARCH_MX25 and OF
>     
>     @Jonathan Cameron:
>     I left your acked-by on the patch as these were small changes. If it should be
>     removed, please say so. Thanks
> 
>  drivers/mfd/Kconfig             |  10 +++
>  drivers/mfd/Makefile            |   2 +
>  drivers/mfd/fsl-imx25-tsadc.c   | 164 ++++++++++++++++++++++++++++++++++++++++
>  include/linux/mfd/imx25-tsadc.h | 141 ++++++++++++++++++++++++++++++++++
>  4 files changed, 317 insertions(+)
>  create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
>  create mode 100644 include/linux/mfd/imx25-tsadc.h
> 
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 38356e39adba..c0036aef61d7 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -244,6 +244,16 @@ config MFD_MC13XXX_I2C
>  	help
>  	  Select this if your MC13xxx is connected via an I2C bus.
>  
> +config MFD_MX25_TSADC
> +	tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
> +	select REGMAP_MMIO
> +	depends on SOC_IMX25 || COMPILE_TEST
> +	depends on OF

Are you sure you can't compile test with OF disabled?

	depends on (SOC_IMX25 && OF) || COMPILE_TEST

> +	help
> +	  Enable support for the integrated Touchscreen and ADC unit of the
> +	  i.MX25 processors. They consist of a conversion queue for general
> +	  purpose ADC and a queue for Touchscreens.
> +
>  config MFD_HI6421_PMIC
>  	tristate "HiSilicon Hi6421 PMU/Codec IC"
>  	depends on OF
> diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> index 19f3d744e3bd..acfe639e147c 100644
> --- a/drivers/mfd/Makefile
> +++ b/drivers/mfd/Makefile
> @@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
>  obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
>  obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
>  
> +obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
> +
>  obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
>  obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
>  obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
> diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
> new file mode 100644
> index 000000000000..c4a3e15001ea
> --- /dev/null
> +++ b/drivers/mfd/fsl-imx25-tsadc.c
> @@ -0,0 +1,164 @@
> +/*
> + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/interrupt.h>
> +#include <linux/irqchip/chained_irq.h>
> +#include <linux/irqdesc.h>
> +#include <linux/irqdomain.h>
> +#include <linux/irq.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +static struct regmap_config mx25_tsadc_regmap_config = {
> +	.fast_io = true,
> +	.max_register = 8,
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,
> +};
> +
> +static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
> +{
> +	struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
> +	struct irq_chip *chip = irq_get_chip(irq);
> +	u32 status;
> +
> +	chained_irq_enter(chip, desc);
> +
> +	regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
> +
> +	if (status & MX25_TGSR_GCQ_INT)
> +		generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
> +
> +	if (status & MX25_TGSR_TCQ_INT)
> +		generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
> +
> +	chained_irq_exit(chip, desc);
> +}
> +
> +static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
> +				 irq_hw_number_t hwirq)
> +{
> +	struct mx25_tsadc *tsadc = d->host_data;
> +
> +	irq_set_chip_data(irq, tsadc);
> +	irq_set_chip_and_handler(irq, &dummy_irq_chip,
> +				 handle_level_irq);
> +	set_irq_flags(irq, IRQF_VALID);

I think you need to protect this with CONFIG_ARM.

> +	return 0;
> +}
> +
> +static struct irq_domain_ops mx25_tsadc_domain_ops = {
> +	.map = mx25_tsadc_domain_map,
> +	.xlate = irq_domain_xlate_onecell,
> +};
> +
> +static int mx25_tsadc_setup_irq(struct platform_device *pdev,
> +				struct mx25_tsadc *tsadc)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	int irq;
> +
> +	irq = platform_get_irq(pdev, 0);
> +	if (irq <= 0) {
> +		dev_err(dev, "Failed to get irq\n");
> +		return irq;
> +	}
> +
> +	tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
> +					      tsadc);
> +	if (!tsadc->domain) {
> +		dev_err(dev, "Failed to add irq domain\n");
> +		return -ENOMEM;
> +	}
> +
> +	irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
> +	irq_set_handler_data(irq, tsadc);
> +
> +	return 0;
> +}
> +
> +static int mx25_tsadc_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	struct mx25_tsadc *tsadc;
> +	struct resource *res;
> +	int ret;
> +	void __iomem *iomem;
> +
> +	tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
> +	if (!tsadc)
> +		return -ENOMEM;
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	iomem = devm_ioremap_resource(dev, res);
> +	if (IS_ERR(iomem))
> +		return PTR_ERR(iomem);
> +
> +	tsadc->regs = devm_regmap_init_mmio(dev, iomem,
> +					    &mx25_tsadc_regmap_config);
> +	if (IS_ERR(tsadc->regs)) {
> +		dev_err(dev, "Failed to initialize regmap\n");
> +		return PTR_ERR(tsadc->regs);
> +	}
> +
> +	tsadc->clk = devm_clk_get(dev, "ipg");
> +	if (IS_ERR(tsadc->clk)) {
> +		dev_err(dev, "Failed to get ipg clock\n");
> +		return PTR_ERR(tsadc->clk);
> +	}
> +
> +	/* Enable clock and reset the component */
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
> +			   MX25_TGCR_CLK_EN);
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
> +			   MX25_TGCR_TSC_RST);
> +
> +	/* Setup powersaving mode, but enable internal reference voltage */
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
> +			   MX25_TGCR_POWERMODE_SAVE);
> +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
> +			   MX25_TGCR_INTREFEN);
> +
> +	ret = mx25_tsadc_setup_irq(pdev, tsadc);
> +	if (ret)
> +		return ret;
> +
> +	platform_set_drvdata(pdev, tsadc);
> +
> +	of_platform_populate(np, NULL, NULL, dev);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id mx25_tsadc_ids[] = {
> +	{ .compatible = "fsl,imx25-tsadc" },
> +	{ /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_tsadc_driver = {
> +	.driver = {
> +		.name = "mx25-tsadc",
> +		.of_match_table = of_match_ptr(mx25_tsadc_ids),
> +	},
> +	.probe = mx25_tsadc_probe,

No remove()?  Nothing to clean-up?  Clocks off?  Reset?

> +};
> +module_platform_driver(mx25_tsadc_driver);
> +
> +MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:mx25-tsadc");
> diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> new file mode 100644
> index 000000000000..da348ac34a41
> --- /dev/null
> +++ b/include/linux/mfd/imx25-tsadc.h
> @@ -0,0 +1,141 @@
> +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_

s/INPUT/MFD/

> +struct regmap;
> +struct device;

What's this for?

> +struct clk;
> +
> +struct mx25_tsadc {
> +	struct regmap *regs;
> +	struct irq_domain *domain;
> +	struct clk *clk;
> +};
> +
> +#define MX25_TSC_TGCR			0x00
> +#define MX25_TSC_TGSR			0x04
> +#define MX25_TSC_TICR			0x08
> +
> +/* The same register layout for TC and GC queue */
> +#define MX25_ADCQ_FIFO			0x00
> +#define MX25_ADCQ_CR			0x04
> +#define MX25_ADCQ_SR			0x08
> +#define MX25_ADCQ_MR			0x0c
> +#define MX25_ADCQ_ITEM_7_0		0x20
> +#define MX25_ADCQ_ITEM_15_8		0x24
> +#define MX25_ADCQ_CFG(n)		(0x40 + ((n) * 0x4))
> +
> +#define MX25_ADCQ_MR_MASK		0xffffffff
> +
> +/* TGCR */
> +#define MX25_TGCR_PDBTIME(x)		((x) << 25)
> +#define MX25_TGCR_PDBTIME_MASK		MX25_TGCR_PDBTIME(0x7f)
> +#define MX25_TGCR_PDBEN			BIT(24)
> +#define MX25_TGCR_PDEN			BIT(23)
> +#define MX25_TGCR_ADCCLKCFG(x)		((x) << 16)
> +#define MX25_TGCR_GET_ADCCLK(x)		(((x) >> 16) & 0x1f)
> +#define MX25_TGCR_INTREFEN		BIT(10)
> +#define MX25_TGCR_POWERMODE_MASK	(3 << 8)
> +#define MX25_TGCR_POWERMODE_SAVE	(1 << 8)
> +#define MX25_TGCR_POWERMODE_ON		(2 << 8)
> +#define MX25_TGCR_STLC			BIT(5)
> +#define MX25_TGCR_SLPC			BIT(4)
> +#define MX25_TGCR_FUNC_RST		BIT(2)
> +#define MX25_TGCR_TSC_RST		BIT(1)
> +#define MX25_TGCR_CLK_EN		BIT(0)
> +
> +/* TGSR */
> +#define MX25_TGSR_SLP_INT		BIT(2)
> +#define MX25_TGSR_GCQ_INT		BIT(1)
> +#define MX25_TGSR_TCQ_INT		BIT(0)
> +
> +/* ADCQ_ITEM_* */
> +#define _MX25_ADCQ_ITEM(item, x)	((x) << ((item) * 4))
> +#define MX25_ADCQ_ITEM(item, x)		((item) >= 8 ? \
> +		_MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
> +
> +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
> +#define MX25_ADCQ_FIFO_DATA(x)		(((x) >> 4) & 0xfff)
> +#define MX25_ADCQ_FIFO_ID(x)		((x) & 0xf)
> +
> +/* ADCQ_CR (TCQR and GCQR) */
> +#define MX25_ADCQ_CR_PDCFG_LEVEL	BIT(19)
> +#define MX25_ADCQ_CR_PDMSK		BIT(18)
> +#define MX25_ADCQ_CR_FRST		BIT(17)
> +#define MX25_ADCQ_CR_QRST		BIT(16)
> +#define MX25_ADCQ_CR_RWAIT_MASK		(0xf << 12)
> +#define MX25_ADCQ_CR_RWAIT(x)		((x) << 12)
> +#define MX25_ADCQ_CR_WMRK_MASK		(0xf << 8)
> +#define MX25_ADCQ_CR_WMRK(x)		((x) << 8)
> +#define MX25_ADCQ_CR_LITEMID_MASK	(0xf << 4)
> +#define MX25_ADCQ_CR_LITEMID(x)		((x) << 4)
> +#define MX25_ADCQ_CR_RPT		BIT(3)
> +#define MX25_ADCQ_CR_FQS		BIT(2)
> +#define MX25_ADCQ_CR_QSM_MASK		0x3
> +#define MX25_ADCQ_CR_QSM_PD		0x1
> +#define MX25_ADCQ_CR_QSM_FQS		0x2
> +#define MX25_ADCQ_CR_QSM_FQS_PD		0x3
> +
> +/* ADCQ_SR (TCQSR and GCQSR) */
> +#define MX25_ADCQ_SR_FDRY		BIT(15)
> +#define MX25_ADCQ_SR_FULL		BIT(14)
> +#define MX25_ADCQ_SR_EMPT		BIT(13)
> +#define MX25_ADCQ_SR_FDN(x)		(((x) >> 8) & 0x1f)
> +#define MX25_ADCQ_SR_FRR		BIT(6)
> +#define MX25_ADCQ_SR_FUR		BIT(5)
> +#define MX25_ADCQ_SR_FOR		BIT(4)
> +#define MX25_ADCQ_SR_EOQ		BIT(1)
> +#define MX25_ADCQ_SR_PD			BIT(0)
> +
> +/* ADCQ_MR (TCQMR and GCQMR) */
> +#define MX25_ADCQ_MR_FDRY_DMA		BIT(31)
> +#define MX25_ADCQ_MR_FER_DMA		BIT(22)
> +#define MX25_ADCQ_MR_FUR_DMA		BIT(21)
> +#define MX25_ADCQ_MR_FOR_DMA		BIT(20)
> +#define MX25_ADCQ_MR_EOQ_DMA		BIT(17)
> +#define MX25_ADCQ_MR_PD_DMA		BIT(16)
> +#define MX25_ADCQ_MR_FDRY_IRQ		BIT(15)
> +#define MX25_ADCQ_MR_FER_IRQ		BIT(6)
> +#define MX25_ADCQ_MR_FUR_IRQ		BIT(5)
> +#define MX25_ADCQ_MR_FOR_IRQ		BIT(4)
> +#define MX25_ADCQ_MR_EOQ_IRQ		BIT(1)
> +#define MX25_ADCQ_MR_PD_IRQ		BIT(0)
> +
> +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
> +#define MX25_ADCQ_CFG_SETTLING_TIME(x)	((x) << 24)
> +#define MX25_ADCQ_CFG_IGS		(1 << 20)
> +#define MX25_ADCQ_CFG_NOS_MASK		(0xf << 16)
> +#define MX25_ADCQ_CFG_NOS(x)		(((x) - 1) << 16)
> +#define MX25_ADCQ_CFG_WIPER		(1 << 15)
> +#define MX25_ADCQ_CFG_YNLR		(1 << 14)
> +#define MX25_ADCQ_CFG_YPLL_HIGH		(0 << 12)
> +#define MX25_ADCQ_CFG_YPLL_OFF		(1 << 12)
> +#define MX25_ADCQ_CFG_YPLL_LOW		(3 << 12)
> +#define MX25_ADCQ_CFG_XNUR_HIGH		(0 << 10)
> +#define MX25_ADCQ_CFG_XNUR_OFF		(1 << 10)
> +#define MX25_ADCQ_CFG_XNUR_LOW		(3 << 10)
> +#define MX25_ADCQ_CFG_XPUL_HIGH		(0 << 9)
> +#define MX25_ADCQ_CFG_XPUL_OFF		(1 << 9)
> +#define MX25_ADCQ_CFG_REFP(sel)		((sel) << 7)
> +#define MX25_ADCQ_CFG_REFP_YP		(0 << 7)
> +#define MX25_ADCQ_CFG_REFP_XP		(1 << 7)
> +#define MX25_ADCQ_CFG_REFP_EXT		(2 << 7)
> +#define MX25_ADCQ_CFG_REFP_INT		(3 << 7)
> +#define MX25_ADCQ_CFG_REFP_MASK		(3 << 7)
> +#define MX25_ADCQ_CFG_IN(sel)		((sel) << 4)
> +#define MX25_ADCQ_CFG_IN_XP		(0 << 4)
> +#define MX25_ADCQ_CFG_IN_YP		(1 << 4)
> +#define MX25_ADCQ_CFG_IN_XN		(2 << 4)
> +#define MX25_ADCQ_CFG_IN_YN		(3 << 4)
> +#define MX25_ADCQ_CFG_IN_WIPER		(4 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX0		(5 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX1		(6 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX2		(7 << 4)
> +#define MX25_ADCQ_CFG_REFN(sel)		((sel) << 2)
> +#define MX25_ADCQ_CFG_REFN_XN		(0 << 2)
> +#define MX25_ADCQ_CFG_REFN_YN		(1 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND		(2 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND2	(3 << 2)
> +#define MX25_ADCQ_CFG_REFN_MASK		(3 << 2)
> +#define MX25_ADCQ_CFG_PENIACK		(1 << 1)
> +
> +#endif  /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Markus Pargmann]

Hi,

Sorry for the late reply,

On Mon, Mar 09, 2015 at 09:27:10AM +0000, Lee Jones wrote:
> On Tue, 03 Mar 2015, Markus Pargmann wrote:
> 
> > This is the core driver for imx25 touchscreen/adc driver. The module
> > has one shared ADC and two different conversion queues which use the
> > ADC. The two queues are identical. Both can be used for general purpose
> > ADC but one is meant to be used for touchscreens.
> > 
> > This driver is the core which manages the central components and
> > registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> > the correct components.
> > 
> > Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> > Signed-off-by: Denis Carikli <denis@eukrea.com>
> > Acked-by: Jonathan Cameron <jic23@kernel.org>
> > ---
> > 
> > Notes:
> >     Changes in v7:
> >      - Cleanup bit defines in header files to be more readable
> >      - Fix irq check to return with an error for irq <= 0
> >      - Add COMPILE_TEST in Kconfig file
> >     
> >     Changes in v5:
> >      - Remove ifdef CONFIG_OF as this driver is only for DT usage
> >      - Remove module owner
> >      - Add Kconfig dependencies ARCH_MX25 and OF
> >     
> >     @Jonathan Cameron:
> >     I left your acked-by on the patch as these were small changes. If it should be
> >     removed, please say so. Thanks
> > 
> >  drivers/mfd/Kconfig             |  10 +++
> >  drivers/mfd/Makefile            |   2 +
> >  drivers/mfd/fsl-imx25-tsadc.c   | 164 ++++++++++++++++++++++++++++++++++++++++
> >  include/linux/mfd/imx25-tsadc.h | 141 ++++++++++++++++++++++++++++++++++
> >  4 files changed, 317 insertions(+)
> >  create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
> >  create mode 100644 include/linux/mfd/imx25-tsadc.h
> > 
> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> > index 38356e39adba..c0036aef61d7 100644
> > --- a/drivers/mfd/Kconfig
> > +++ b/drivers/mfd/Kconfig
> > @@ -244,6 +244,16 @@ config MFD_MC13XXX_I2C
> >  	help
> >  	  Select this if your MC13xxx is connected via an I2C bus.
> >  
> > +config MFD_MX25_TSADC
> > +	tristate "Freescale i.MX25 integrated Touchscreen and ADC unit"
> > +	select REGMAP_MMIO
> > +	depends on SOC_IMX25 || COMPILE_TEST
> > +	depends on OF
> 
> Are you sure you can't compile test with OF disabled?
> 
> 	depends on (SOC_IMX25 && OF) || COMPILE_TEST

Yes, should be possible without OF.

> 
> > +	help
> > +	  Enable support for the integrated Touchscreen and ADC unit of the
> > +	  i.MX25 processors. They consist of a conversion queue for general
> > +	  purpose ADC and a queue for Touchscreens.
> > +
> >  config MFD_HI6421_PMIC
> >  	tristate "HiSilicon Hi6421 PMU/Codec IC"
> >  	depends on OF
> > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
> > index 19f3d744e3bd..acfe639e147c 100644
> > --- a/drivers/mfd/Makefile
> > +++ b/drivers/mfd/Makefile
> > @@ -78,6 +78,8 @@ obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
> >  obj-$(CONFIG_MFD_TWL4030_AUDIO)	+= twl4030-audio.o
> >  obj-$(CONFIG_TWL6040_CORE)	+= twl6040.o
> >  
> > +obj-$(CONFIG_MFD_MX25_TSADC)	+= fsl-imx25-tsadc.o
> > +
> >  obj-$(CONFIG_MFD_MC13XXX)	+= mc13xxx-core.o
> >  obj-$(CONFIG_MFD_MC13XXX_SPI)	+= mc13xxx-spi.o
> >  obj-$(CONFIG_MFD_MC13XXX_I2C)	+= mc13xxx-i2c.o
> > diff --git a/drivers/mfd/fsl-imx25-tsadc.c b/drivers/mfd/fsl-imx25-tsadc.c
> > new file mode 100644
> > index 000000000000..c4a3e15001ea
> > --- /dev/null
> > +++ b/drivers/mfd/fsl-imx25-tsadc.c
> > @@ -0,0 +1,164 @@
> > +/*
> > + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> > + *
> > + * This program is free software; you can redistribute it and/or modify it under
> > + * the terms of the GNU General Public License version 2 as published by the
> > + * Free Software Foundation.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/irqchip/chained_irq.h>
> > +#include <linux/irqdesc.h>
> > +#include <linux/irqdomain.h>
> > +#include <linux/irq.h>
> > +#include <linux/mfd/imx25-tsadc.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +
> > +static struct regmap_config mx25_tsadc_regmap_config = {
> > +	.fast_io = true,
> > +	.max_register = 8,
> > +	.reg_bits = 32,
> > +	.val_bits = 32,
> > +	.reg_stride = 4,
> > +};
> > +
> > +static void mx25_tsadc_irq_handler(u32 irq, struct irq_desc *desc)
> > +{
> > +	struct mx25_tsadc *tsadc = irq_desc_get_handler_data(desc);
> > +	struct irq_chip *chip = irq_get_chip(irq);
> > +	u32 status;
> > +
> > +	chained_irq_enter(chip, desc);
> > +
> > +	regmap_read(tsadc->regs, MX25_TSC_TGSR, &status);
> > +
> > +	if (status & MX25_TGSR_GCQ_INT)
> > +		generic_handle_irq(irq_find_mapping(tsadc->domain, 1));
> > +
> > +	if (status & MX25_TGSR_TCQ_INT)
> > +		generic_handle_irq(irq_find_mapping(tsadc->domain, 0));
> > +
> > +	chained_irq_exit(chip, desc);
> > +}
> > +
> > +static int mx25_tsadc_domain_map(struct irq_domain *d, unsigned int irq,
> > +				 irq_hw_number_t hwirq)
> > +{
> > +	struct mx25_tsadc *tsadc = d->host_data;
> > +
> > +	irq_set_chip_data(irq, tsadc);
> > +	irq_set_chip_and_handler(irq, &dummy_irq_chip,
> > +				 handle_level_irq);
> > +	set_irq_flags(irq, IRQF_VALID);
> 
> I think you need to protect this with CONFIG_ARM.

Yes, added ifdef around set_irq_flags for IRQF_VALID.

> 
> > +	return 0;
> > +}
> > +
> > +static struct irq_domain_ops mx25_tsadc_domain_ops = {
> > +	.map = mx25_tsadc_domain_map,
> > +	.xlate = irq_domain_xlate_onecell,
> > +};
> > +
> > +static int mx25_tsadc_setup_irq(struct platform_device *pdev,
> > +				struct mx25_tsadc *tsadc)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	int irq;
> > +
> > +	irq = platform_get_irq(pdev, 0);
> > +	if (irq <= 0) {
> > +		dev_err(dev, "Failed to get irq\n");
> > +		return irq;
> > +	}
> > +
> > +	tsadc->domain = irq_domain_add_simple(np, 2, 0, &mx25_tsadc_domain_ops,
> > +					      tsadc);
> > +	if (!tsadc->domain) {
> > +		dev_err(dev, "Failed to add irq domain\n");
> > +		return -ENOMEM;
> > +	}
> > +
> > +	irq_set_chained_handler(irq, mx25_tsadc_irq_handler);
> > +	irq_set_handler_data(irq, tsadc);
> > +
> > +	return 0;
> > +}
> > +
> > +static int mx25_tsadc_probe(struct platform_device *pdev)
> > +{
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	struct mx25_tsadc *tsadc;
> > +	struct resource *res;
> > +	int ret;
> > +	void __iomem *iomem;
> > +
> > +	tsadc = devm_kzalloc(dev, sizeof(*tsadc), GFP_KERNEL);
> > +	if (!tsadc)
> > +		return -ENOMEM;
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	iomem = devm_ioremap_resource(dev, res);
> > +	if (IS_ERR(iomem))
> > +		return PTR_ERR(iomem);
> > +
> > +	tsadc->regs = devm_regmap_init_mmio(dev, iomem,
> > +					    &mx25_tsadc_regmap_config);
> > +	if (IS_ERR(tsadc->regs)) {
> > +		dev_err(dev, "Failed to initialize regmap\n");
> > +		return PTR_ERR(tsadc->regs);
> > +	}
> > +
> > +	tsadc->clk = devm_clk_get(dev, "ipg");
> > +	if (IS_ERR(tsadc->clk)) {
> > +		dev_err(dev, "Failed to get ipg clock\n");
> > +		return PTR_ERR(tsadc->clk);
> > +	}
> > +
> > +	/* Enable clock and reset the component */
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_CLK_EN,
> > +			   MX25_TGCR_CLK_EN);
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_TSC_RST,
> > +			   MX25_TGCR_TSC_RST);
> > +
> > +	/* Setup powersaving mode, but enable internal reference voltage */
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_POWERMODE_MASK,
> > +			   MX25_TGCR_POWERMODE_SAVE);
> > +	regmap_update_bits(tsadc->regs, MX25_TSC_TGCR, MX25_TGCR_INTREFEN,
> > +			   MX25_TGCR_INTREFEN);
> > +
> > +	ret = mx25_tsadc_setup_irq(pdev, tsadc);
> > +	if (ret)
> > +		return ret;
> > +
> > +	platform_set_drvdata(pdev, tsadc);
> > +
> > +	of_platform_populate(np, NULL, NULL, dev);
> > +
> > +	return 0;
> > +}
> > +
> > +static const struct of_device_id mx25_tsadc_ids[] = {
> > +	{ .compatible = "fsl,imx25-tsadc" },
> > +	{ /* Sentinel */ }
> > +};
> > +
> > +static struct platform_driver mx25_tsadc_driver = {
> > +	.driver = {
> > +		.name = "mx25-tsadc",
> > +		.of_match_table = of_match_ptr(mx25_tsadc_ids),
> > +	},
> > +	.probe = mx25_tsadc_probe,
> 
> No remove()?  Nothing to clean-up?  Clocks off?  Reset?

No, Everything should cleanup on its own. No clocks enabled. This driver
mainly sets up some configuration for the other drivers using this unit.

> 
> > +};
> > +module_platform_driver(mx25_tsadc_driver);
> > +
> > +MODULE_DESCRIPTION("MFD for ADC/TSC for Freescale mx25");
> > +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> > +MODULE_LICENSE("GPL v2");
> > +MODULE_ALIAS("platform:mx25-tsadc");
> > diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> > new file mode 100644
> > index 000000000000..da348ac34a41
> > --- /dev/null
> > +++ b/include/linux/mfd/imx25-tsadc.h
> > @@ -0,0 +1,141 @@
> > +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> > +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> 
> s/INPUT/MFD/

Fixed.

> 
> > +struct regmap;
> > +struct device;
> 
> What's this for?

Removed struct device. It was a leftover from a previous version.

Thanks,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150324/510e5387/attachment.sig>

[PATCH v7 4/8] mfd: fsl imx25 Touchscreen ADC driver

[Hartmut Knaack]

Markus Pargmann schrieb am 03.03.2015 um 08:58:
> This is the core driver for imx25 touchscreen/adc driver. The module
> has one shared ADC and two different conversion queues which use the
> ADC. The two queues are identical. Both can be used for general purpose
> ADC but one is meant to be used for touchscreens.
> 
> This driver is the core which manages the central components and
> registers of the TSC/ADC unit. It manages the IRQs and forwards them to
> the correct components.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> Acked-by: Jonathan Cameron <jic23@kernel.org>
> ---
> 

Hi Markus,
I would recommend to make use of GENMASK for many of the masks you define below.
That makes it better readable from which to which bitnumber that mask applies.
Thanks,

Hartmut

<...>
> diff --git a/include/linux/mfd/imx25-tsadc.h b/include/linux/mfd/imx25-tsadc.h
> new file mode 100644
> index 000000000000..da348ac34a41
> --- /dev/null
> +++ b/include/linux/mfd/imx25-tsadc.h
> @@ -0,0 +1,141 @@
> +#ifndef _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +#define _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_
> +
> +struct regmap;
> +struct device;
> +struct clk;
> +
> +struct mx25_tsadc {
> +	struct regmap *regs;
> +	struct irq_domain *domain;
> +	struct clk *clk;
> +};
> +
> +#define MX25_TSC_TGCR			0x00
> +#define MX25_TSC_TGSR			0x04
> +#define MX25_TSC_TICR			0x08
> +
> +/* The same register layout for TC and GC queue */
> +#define MX25_ADCQ_FIFO			0x00
> +#define MX25_ADCQ_CR			0x04
> +#define MX25_ADCQ_SR			0x08
> +#define MX25_ADCQ_MR			0x0c
> +#define MX25_ADCQ_ITEM_7_0		0x20
> +#define MX25_ADCQ_ITEM_15_8		0x24
> +#define MX25_ADCQ_CFG(n)		(0x40 + ((n) * 0x4))
> +
> +#define MX25_ADCQ_MR_MASK		0xffffffff
> +
> +/* TGCR */
> +#define MX25_TGCR_PDBTIME(x)		((x) << 25)
> +#define MX25_TGCR_PDBTIME_MASK		MX25_TGCR_PDBTIME(0x7f)
> +#define MX25_TGCR_PDBEN			BIT(24)
> +#define MX25_TGCR_PDEN			BIT(23)
> +#define MX25_TGCR_ADCCLKCFG(x)		((x) << 16)
> +#define MX25_TGCR_GET_ADCCLK(x)		(((x) >> 16) & 0x1f)
> +#define MX25_TGCR_INTREFEN		BIT(10)
> +#define MX25_TGCR_POWERMODE_MASK	(3 << 8)
> +#define MX25_TGCR_POWERMODE_SAVE	(1 << 8)
> +#define MX25_TGCR_POWERMODE_ON		(2 << 8)
> +#define MX25_TGCR_STLC			BIT(5)
> +#define MX25_TGCR_SLPC			BIT(4)
> +#define MX25_TGCR_FUNC_RST		BIT(2)
> +#define MX25_TGCR_TSC_RST		BIT(1)
> +#define MX25_TGCR_CLK_EN		BIT(0)
> +
> +/* TGSR */
> +#define MX25_TGSR_SLP_INT		BIT(2)
> +#define MX25_TGSR_GCQ_INT		BIT(1)
> +#define MX25_TGSR_TCQ_INT		BIT(0)
> +
> +/* ADCQ_ITEM_* */
> +#define _MX25_ADCQ_ITEM(item, x)	((x) << ((item) * 4))
> +#define MX25_ADCQ_ITEM(item, x)		((item) >= 8 ? \
> +		_MX25_ADCQ_ITEM((item) - 8, (x)) : _MX25_ADCQ_ITEM((item), (x)))
> +
> +/* ADCQ_FIFO (TCQFIFO and GCQFIFO) */
> +#define MX25_ADCQ_FIFO_DATA(x)		(((x) >> 4) & 0xfff)
> +#define MX25_ADCQ_FIFO_ID(x)		((x) & 0xf)
> +
> +/* ADCQ_CR (TCQR and GCQR) */
> +#define MX25_ADCQ_CR_PDCFG_LEVEL	BIT(19)
> +#define MX25_ADCQ_CR_PDMSK		BIT(18)
> +#define MX25_ADCQ_CR_FRST		BIT(17)
> +#define MX25_ADCQ_CR_QRST		BIT(16)
> +#define MX25_ADCQ_CR_RWAIT_MASK		(0xf << 12)
> +#define MX25_ADCQ_CR_RWAIT(x)		((x) << 12)
> +#define MX25_ADCQ_CR_WMRK_MASK		(0xf << 8)
> +#define MX25_ADCQ_CR_WMRK(x)		((x) << 8)
> +#define MX25_ADCQ_CR_LITEMID_MASK	(0xf << 4)
> +#define MX25_ADCQ_CR_LITEMID(x)		((x) << 4)
> +#define MX25_ADCQ_CR_RPT		BIT(3)
> +#define MX25_ADCQ_CR_FQS		BIT(2)
> +#define MX25_ADCQ_CR_QSM_MASK		0x3
> +#define MX25_ADCQ_CR_QSM_PD		0x1
> +#define MX25_ADCQ_CR_QSM_FQS		0x2
> +#define MX25_ADCQ_CR_QSM_FQS_PD		0x3
> +
> +/* ADCQ_SR (TCQSR and GCQSR) */
> +#define MX25_ADCQ_SR_FDRY		BIT(15)
> +#define MX25_ADCQ_SR_FULL		BIT(14)
> +#define MX25_ADCQ_SR_EMPT		BIT(13)
> +#define MX25_ADCQ_SR_FDN(x)		(((x) >> 8) & 0x1f)
> +#define MX25_ADCQ_SR_FRR		BIT(6)
> +#define MX25_ADCQ_SR_FUR		BIT(5)
> +#define MX25_ADCQ_SR_FOR		BIT(4)
> +#define MX25_ADCQ_SR_EOQ		BIT(1)
> +#define MX25_ADCQ_SR_PD			BIT(0)
> +
> +/* ADCQ_MR (TCQMR and GCQMR) */
> +#define MX25_ADCQ_MR_FDRY_DMA		BIT(31)
> +#define MX25_ADCQ_MR_FER_DMA		BIT(22)
> +#define MX25_ADCQ_MR_FUR_DMA		BIT(21)
> +#define MX25_ADCQ_MR_FOR_DMA		BIT(20)
> +#define MX25_ADCQ_MR_EOQ_DMA		BIT(17)
> +#define MX25_ADCQ_MR_PD_DMA		BIT(16)
> +#define MX25_ADCQ_MR_FDRY_IRQ		BIT(15)
> +#define MX25_ADCQ_MR_FER_IRQ		BIT(6)
> +#define MX25_ADCQ_MR_FUR_IRQ		BIT(5)
> +#define MX25_ADCQ_MR_FOR_IRQ		BIT(4)
> +#define MX25_ADCQ_MR_EOQ_IRQ		BIT(1)
> +#define MX25_ADCQ_MR_PD_IRQ		BIT(0)
> +
> +/* ADCQ_CFG (TICR, TCC0-7,GCC0-7) */
> +#define MX25_ADCQ_CFG_SETTLING_TIME(x)	((x) << 24)
> +#define MX25_ADCQ_CFG_IGS		(1 << 20)
> +#define MX25_ADCQ_CFG_NOS_MASK		(0xf << 16)
> +#define MX25_ADCQ_CFG_NOS(x)		(((x) - 1) << 16)
> +#define MX25_ADCQ_CFG_WIPER		(1 << 15)
> +#define MX25_ADCQ_CFG_YNLR		(1 << 14)
> +#define MX25_ADCQ_CFG_YPLL_HIGH		(0 << 12)
> +#define MX25_ADCQ_CFG_YPLL_OFF		(1 << 12)
> +#define MX25_ADCQ_CFG_YPLL_LOW		(3 << 12)
> +#define MX25_ADCQ_CFG_XNUR_HIGH		(0 << 10)
> +#define MX25_ADCQ_CFG_XNUR_OFF		(1 << 10)
> +#define MX25_ADCQ_CFG_XNUR_LOW		(3 << 10)
> +#define MX25_ADCQ_CFG_XPUL_HIGH		(0 << 9)
> +#define MX25_ADCQ_CFG_XPUL_OFF		(1 << 9)
> +#define MX25_ADCQ_CFG_REFP(sel)		((sel) << 7)
> +#define MX25_ADCQ_CFG_REFP_YP		(0 << 7)
> +#define MX25_ADCQ_CFG_REFP_XP		(1 << 7)
> +#define MX25_ADCQ_CFG_REFP_EXT		(2 << 7)
> +#define MX25_ADCQ_CFG_REFP_INT		(3 << 7)
> +#define MX25_ADCQ_CFG_REFP_MASK		(3 << 7)
> +#define MX25_ADCQ_CFG_IN(sel)		((sel) << 4)
> +#define MX25_ADCQ_CFG_IN_XP		(0 << 4)
> +#define MX25_ADCQ_CFG_IN_YP		(1 << 4)
> +#define MX25_ADCQ_CFG_IN_XN		(2 << 4)
> +#define MX25_ADCQ_CFG_IN_YN		(3 << 4)
> +#define MX25_ADCQ_CFG_IN_WIPER		(4 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX0		(5 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX1		(6 << 4)
> +#define MX25_ADCQ_CFG_IN_AUX2		(7 << 4)
> +#define MX25_ADCQ_CFG_REFN(sel)		((sel) << 2)
> +#define MX25_ADCQ_CFG_REFN_XN		(0 << 2)
> +#define MX25_ADCQ_CFG_REFN_YN		(1 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND		(2 << 2)
> +#define MX25_ADCQ_CFG_REFN_NGND2	(3 << 2)
> +#define MX25_ADCQ_CFG_REFN_MASK		(3 << 2)
> +#define MX25_ADCQ_CFG_PENIACK		(1 << 1)
> +
> +#endif  /* _LINUX_INCLUDE_INPUT_IMX25_TSADC_H_ */
> 

[PATCH v7 5/8] iio: adc: fsl,imx25-gcq driver

[Markus Pargmann]

This is a conversion queue driver for the mx25 SoC. It uses the central
ADC which is used by two seperate independent queues. This driver
prepares different conversion configurations for each possible input.
For a conversion it creates a conversionqueue of one item with the
correct configuration for the chosen channel. It then executes the queue
once and disables the conversion queue afterwards.

The reference voltages are configurable through devicetree subnodes,
depending on the connections of the ADC inputs.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---

Notes:
    Changes in v7:
     - Remove separate functions mx25_gcq_disable/enable_eoq() as they were used at
       only one position
     - Enforce an external reference regulator if one of the conversions uses it as
       reference. The devm_regulator_get() call was moved into
       mx25_gcq_setup_cfgs() to be able to acquire the reference regulator when
       necessary.
     - Store indio_dev as platform driver data instead of the private data. This
       was changed in probe() and remove().
    
    Changes in v6:
     - Added defines for a complete list of references in the dt binding macros

 drivers/iio/adc/Kconfig                     |   7 +
 drivers/iio/adc/Makefile                    |   1 +
 drivers/iio/adc/fsl-imx25-gcq.c             | 356 ++++++++++++++++++++++++++++
 include/dt-bindings/iio/adc/fsl-imx25-gcq.h |  18 ++
 4 files changed, 382 insertions(+)
 create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
 create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h

diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 202daf889be2..947805d03d6c 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -154,6 +154,13 @@ config EXYNOS_ADC
 	  of SoCs for drivers such as the touchscreen and hwmon to use to share
 	  this resource.
 
+config FSL_MX25_ADC
+	tristate "Freescale MX25 ADC driver"
+	depends on MFD_MX25_TSADC
+	help
+	  Generic Conversion Queue driver used for general purpose ADC in the
+	  MX25. This driver supports single measurements using the MX25 ADC.
+
 config LP8788_ADC
 	tristate "LP8788 ADC driver"
 	depends on MFD_LP8788
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 0315af640866..409583975ba0 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_AT91_ADC) += at91_adc.o
 obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
 obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
 obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
+obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
 obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
 obj-$(CONFIG_MAX1027) += max1027.o
 obj-$(CONFIG_MAX1363) += max1363.o
diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
new file mode 100644
index 000000000000..18c21888aa4e
--- /dev/null
+++ b/drivers/iio/adc/fsl-imx25-gcq.c
@@ -0,0 +1,356 @@
+/*
+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ *
+ * This is the driver for the imx25 GCQ (Generic Conversion Queue)
+ * connected to the imx25 ADC.
+ */
+
+#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
+#include <linux/clk.h>
+#include <linux/iio/iio.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
+
+enum mx25_gcq_cfgs {
+	MX25_CFG_XP = 0,
+	MX25_CFG_YP,
+	MX25_CFG_XN,
+	MX25_CFG_YN,
+	MX25_CFG_WIPER,
+	MX25_CFG_INAUX0,
+	MX25_CFG_INAUX1,
+	MX25_CFG_INAUX2,
+	MX25_NUM_CFGS,
+};
+
+struct mx25_gcq_priv {
+	struct regmap *regs;
+	struct completion completed;
+	unsigned int settling_time;
+	struct clk *clk;
+	int irq;
+	struct regulator *ext_vref;
+	u32 channel_vref_mv[MX25_NUM_CFGS];
+};
+
+#define MX25_CQG_CHAN(chan, id) {\
+	.type = IIO_VOLTAGE,\
+	.indexed = 1,\
+	.channel = chan,\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),\
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
+	.datasheet_name = id,\
+}
+
+static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
+	MX25_CQG_CHAN(0, "xp"),
+	MX25_CQG_CHAN(1, "yp"),
+	MX25_CQG_CHAN(2, "xn"),
+	MX25_CQG_CHAN(3, "yn"),
+	MX25_CQG_CHAN(4, "wiper"),
+	MX25_CQG_CHAN(5, "inaux0"),
+	MX25_CQG_CHAN(6, "inaux1"),
+	MX25_CQG_CHAN(7, "inaux2"),
+};
+
+static irqreturn_t mx25_gcq_irq(int irq, void *data)
+{
+	struct mx25_gcq_priv *priv = data;
+	u32 stats;
+
+	regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
+
+	if (stats & MX25_ADCQ_SR_EOQ) {
+		regmap_update_bits(priv->regs, MX25_ADCQ_MR,
+				   MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
+		complete(&priv->completed);
+	}
+
+	/* Disable conversion queue run */
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
+
+	/* Acknowledge all possible irqs */
+	regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
+		     MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
+		     MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
+
+	return IRQ_HANDLED;
+}
+
+static int mx25_gcq_get_raw_value(struct device *dev,
+				  struct iio_chan_spec const *chan,
+				  struct mx25_gcq_priv *priv,
+				  int *val)
+{
+	long timeout;
+	u32 data;
+
+	/* Setup the configuration we want to use */
+	regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
+		     MX25_ADCQ_ITEM(0, chan->channel));
+
+	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
+
+	/* Trigger queue for one run */
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
+			   MX25_ADCQ_CR_FQS);
+
+	timeout = wait_for_completion_interruptible_timeout(
+		&priv->completed, MX25_GCQ_TIMEOUT);
+	if (timeout < 0) {
+		dev_err(dev,
+			"ADC wait for measurement failed\n");
+		return timeout;
+	} else if (timeout == 0) {
+		dev_err(dev, "ADC timed out\n");
+		return -ETIMEDOUT;
+	}
+
+	regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
+
+	*val = MX25_ADCQ_FIFO_DATA(data);
+
+	return IIO_VAL_INT;
+}
+
+static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
+			     struct iio_chan_spec const *chan, int *val,
+			     int *val2, long mask)
+{
+	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
+	int ret = 0;
+
+	switch (mask) {
+	case IIO_CHAN_INFO_RAW:
+		mutex_lock(&indio_dev->mlock);
+		ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
+		mutex_unlock(&indio_dev->mlock);
+		return ret;
+
+	case IIO_CHAN_INFO_SCALE:
+		*val = priv->channel_vref_mv[chan->channel];
+		*val2 = 12;
+		return IIO_VAL_FRACTIONAL_LOG2;
+
+	default:
+		return -EINVAL;
+	}
+}
+
+static const struct iio_info mx25_gcq_iio_info = {
+	.read_raw = mx25_gcq_read_raw,
+};
+
+static const struct regmap_config mx25_gcq_regconfig = {
+	.max_register = 0x5c,
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
+			       struct mx25_gcq_priv *priv)
+{
+	struct device_node *np = pdev->dev.of_node;
+	struct device_node *child;
+	struct device *dev = &pdev->dev;
+	int ret, i;
+	bool external_ref_used = false;
+
+	/*
+	 * Setup all configurations registers with a default conversion
+	 * configuration for each input
+	 */
+	for (i = 0; i < MX25_NUM_CFGS; ++i)
+		regmap_write(priv->regs, MX25_ADCQ_CFG(i),
+			     MX25_ADCQ_CFG_YPLL_OFF |
+			     MX25_ADCQ_CFG_XNUR_OFF |
+			     MX25_ADCQ_CFG_XPUL_OFF |
+			     MX25_ADCQ_CFG_REFP_INT |
+			     MX25_ADCQ_CFG_IN(i) |
+			     MX25_ADCQ_CFG_REFN_NGND2);
+
+	for_each_child_of_node(np, child) {
+		u32 reg;
+		u32 refp = MX25_ADCQ_CFG_REFP_INT;
+		u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
+
+		ret = of_property_read_u32(child, "reg", &reg);
+		if (ret) {
+			dev_err(dev, "Failed to get reg property\n");
+			return ret;
+		}
+
+		if (reg >= MX25_NUM_CFGS) {
+			dev_err(dev,
+				"reg value is greater than the number of available configuration registers\n");
+			return -EINVAL;
+		}
+
+		of_property_read_u32(child, "fsl,adc-refp", &refp);
+		of_property_read_u32(child, "fsl,adc-refn", &refn);
+
+		if (refp == MX25_ADC_REFP_EXT)
+			external_ref_used = true;
+
+		/*
+		 * Shift the read values to the correct positions within the
+		 * register.
+		 */
+		refp = MX25_ADCQ_CFG_REFP(refp);
+		refn = MX25_ADCQ_CFG_REFN(refn);
+
+		if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
+			dev_err(dev, "Invalid fsl,adc-refp property value\n");
+			return -EINVAL;
+		}
+		if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
+			dev_err(dev, "Invalid fsl,adc-refn property value");
+			return -EINVAL;
+		}
+
+		regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
+				   MX25_ADCQ_CFG_REFP_MASK |
+				   MX25_ADCQ_CFG_REFN_MASK,
+				   refp | refn);
+	}
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
+			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
+
+	regmap_write(priv->regs, MX25_ADCQ_CR,
+		     MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
+
+	if (external_ref_used) {
+		priv->ext_vref = devm_regulator_get(&pdev->dev, "vref");
+		if (IS_ERR(priv->ext_vref)) {
+			dev_err(&pdev->dev, "Failed to get regulator for vref although the external reference voltage is used.\n");
+			return PTR_ERR(priv->ext_vref);
+		}
+	}
+
+	return 0;
+}
+
+static int mx25_gcq_probe(struct platform_device *pdev)
+{
+	struct iio_dev *indio_dev;
+	struct mx25_gcq_priv *priv;
+	struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	void __iomem *mem;
+	int ret;
+
+	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	priv = iio_priv(indio_dev);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mem = devm_ioremap_resource(dev, res);
+	if (!mem)
+		return -ENOMEM;
+
+	priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
+	if (IS_ERR(priv->regs)) {
+		dev_err(dev, "Failed to initialize regmap\n");
+		return PTR_ERR(priv->regs);
+	}
+
+	init_completion(&priv->completed);
+
+	ret = mx25_gcq_setup_cfgs(pdev, priv);
+	if (ret)
+		return ret;
+
+	if (!IS_ERR_OR_NULL(priv->ext_vref)) {
+		ret = regulator_enable(priv->ext_vref);
+		if (ret)
+			return ret;
+	}
+
+	priv->clk = tsadc->clk;
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable clock\n");
+		return ret;
+	}
+
+	priv->irq = platform_get_irq(pdev, 0);
+	if (priv->irq <= 0) {
+		dev_err(dev, "Failed to get IRQ\n");
+		ret = priv->irq;
+		goto err_clk_unprepare;
+	}
+
+	ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);
+	if (ret) {
+		dev_err(dev, "Failed requesting IRQ\n");
+		goto err_clk_unprepare;
+	}
+
+	indio_dev->dev.parent = &pdev->dev;
+	indio_dev->channels = mx25_gcq_channels;
+	indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
+	indio_dev->info = &mx25_gcq_iio_info;
+
+	ret = iio_device_register(indio_dev);
+	if (ret) {
+		dev_err(dev, "Failed to register iio device\n");
+		goto err_irq_free;
+	}
+
+	platform_set_drvdata(pdev, indio_dev);
+
+	return 0;
+
+err_irq_free:
+	free_irq(priv->irq, (void *)priv);
+err_clk_unprepare:
+	clk_disable_unprepare(priv->clk);
+	return ret;
+}
+
+static int mx25_gcq_remove(struct platform_device *pdev)
+{
+	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
+	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
+
+	iio_device_unregister(indio_dev);
+	free_irq(priv->irq, priv);
+	clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static struct of_device_id mx25_gcq_ids[] = {
+	{ .compatible = "fsl,imx25-gcq", },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver mx25_gcq_driver = {
+	.driver		= {
+		.name	= "mx25-gcq",
+		.of_match_table = mx25_gcq_ids,
+	},
+	.probe		= mx25_gcq_probe,
+	.remove		= mx25_gcq_remove,
+};
+module_platform_driver(mx25_gcq_driver);
+
+MODULE_DESCRIPTION("ADC driver for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/dt-bindings/iio/adc/fsl-imx25-gcq.h b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
new file mode 100644
index 000000000000..4f2f4a9baafe
--- /dev/null
+++ b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
@@ -0,0 +1,18 @@
+/*
+ * This header provides constants for configuring the I.MX25 ADC
+ */
+
+#ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
+#define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
+
+#define MX25_ADC_REFP_YP	0 /* YP voltage reference */
+#define MX25_ADC_REFP_XP	1 /* XP voltage reference */
+#define MX25_ADC_REFP_INT	2 /* Internal voltage reference */
+#define MX25_ADC_REFP_EXT	3 /* External voltage reference */
+
+#define MX25_ADC_REFN_XN	0
+#define MX25_ADC_REFN_YN	1
+#define MX25_ADC_REFN_NGND	2
+#define MX25_ADC_REFN_NGND2	3
+
+#endif
-- 
2.1.4

[PATCH v7 5/8] iio: adc: fsl,imx25-gcq driver

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> This is a conversion queue driver for the mx25 SoC. It uses the central
> ADC which is used by two seperate independent queues. This driver
> prepares different conversion configurations for each possible input.
> For a conversion it creates a conversionqueue of one item with the
> correct configuration for the chosen channel. It then executes the queue
> once and disables the conversion queue afterwards.
> 
> The reference voltages are configurable through devicetree subnodes,
> depending on the connections of the ADC inputs.
> 
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
There's an unbalanced regulator_enable that needs fixing.
Deal with that in both the remove and the error cases
and I'm happy.

> ---
> 
> Notes:
>     Changes in v7:
>      - Remove separate functions mx25_gcq_disable/enable_eoq() as they were used at
>        only one position
>      - Enforce an external reference regulator if one of the conversions uses it as
>        reference. The devm_regulator_get() call was moved into
>        mx25_gcq_setup_cfgs() to be able to acquire the reference regulator when
>        necessary.
>      - Store indio_dev as platform driver data instead of the private data. This
>        was changed in probe() and remove().
>     
>     Changes in v6:
>      - Added defines for a complete list of references in the dt binding macros
> 
>  drivers/iio/adc/Kconfig                     |   7 +
>  drivers/iio/adc/Makefile                    |   1 +
>  drivers/iio/adc/fsl-imx25-gcq.c             | 356 ++++++++++++++++++++++++++++
>  include/dt-bindings/iio/adc/fsl-imx25-gcq.h |  18 ++
>  4 files changed, 382 insertions(+)
>  create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
>  create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 202daf889be2..947805d03d6c 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -154,6 +154,13 @@ config EXYNOS_ADC
>  	  of SoCs for drivers such as the touchscreen and hwmon to use to share
>  	  this resource.
>  
> +config FSL_MX25_ADC
> +	tristate "Freescale MX25 ADC driver"
> +	depends on MFD_MX25_TSADC
> +	help
> +	  Generic Conversion Queue driver used for general purpose ADC in the
> +	  MX25. This driver supports single measurements using the MX25 ADC.
> +
>  config LP8788_ADC
>  	tristate "LP8788 ADC driver"
>  	depends on MFD_LP8788
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 0315af640866..409583975ba0 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -17,6 +17,7 @@ obj-$(CONFIG_AT91_ADC) += at91_adc.o
>  obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
>  obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
>  obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
> +obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
>  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
>  obj-$(CONFIG_MAX1027) += max1027.o
>  obj-$(CONFIG_MAX1363) += max1363.o
> diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
> new file mode 100644
> index 000000000000..18c21888aa4e
> --- /dev/null
> +++ b/drivers/iio/adc/fsl-imx25-gcq.c
> @@ -0,0 +1,356 @@
> +/*
> + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation.
> + *
> + * This is the driver for the imx25 GCQ (Generic Conversion Queue)
> + * connected to the imx25 ADC.
> + */
> +
> +#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
> +#include <linux/clk.h>
> +#include <linux/iio/iio.h>
> +#include <linux/interrupt.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>
> +
> +#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
> +
> +enum mx25_gcq_cfgs {
> +	MX25_CFG_XP = 0,
> +	MX25_CFG_YP,
> +	MX25_CFG_XN,
> +	MX25_CFG_YN,
> +	MX25_CFG_WIPER,
> +	MX25_CFG_INAUX0,
> +	MX25_CFG_INAUX1,
> +	MX25_CFG_INAUX2,
> +	MX25_NUM_CFGS,
> +};
> +
> +struct mx25_gcq_priv {
> +	struct regmap *regs;
> +	struct completion completed;
> +	unsigned int settling_time;
> +	struct clk *clk;
> +	int irq;
> +	struct regulator *ext_vref;
> +	u32 channel_vref_mv[MX25_NUM_CFGS];
> +};
> +
> +#define MX25_CQG_CHAN(chan, id) {\
> +	.type = IIO_VOLTAGE,\
> +	.indexed = 1,\
> +	.channel = chan,\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),\
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
> +	.datasheet_name = id,\
> +}
> +
> +static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
> +	MX25_CQG_CHAN(0, "xp"),
> +	MX25_CQG_CHAN(1, "yp"),
> +	MX25_CQG_CHAN(2, "xn"),
> +	MX25_CQG_CHAN(3, "yn"),
> +	MX25_CQG_CHAN(4, "wiper"),
> +	MX25_CQG_CHAN(5, "inaux0"),
> +	MX25_CQG_CHAN(6, "inaux1"),
> +	MX25_CQG_CHAN(7, "inaux2"),
> +};
> +
> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
> +{
> +	struct mx25_gcq_priv *priv = data;
> +	u32 stats;
> +
> +	regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
> +
> +	if (stats & MX25_ADCQ_SR_EOQ) {
> +		regmap_update_bits(priv->regs, MX25_ADCQ_MR,
> +				   MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
> +		complete(&priv->completed);
> +	}
> +
> +	/* Disable conversion queue run */
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
> +
> +	/* Acknowledge all possible irqs */
> +	regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
> +		     MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
> +		     MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int mx25_gcq_get_raw_value(struct device *dev,
> +				  struct iio_chan_spec const *chan,
> +				  struct mx25_gcq_priv *priv,
> +				  int *val)
> +{
> +	long timeout;
> +	u32 data;
> +
> +	/* Setup the configuration we want to use */
> +	regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
> +		     MX25_ADCQ_ITEM(0, chan->channel));
> +
> +	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
> +
> +	/* Trigger queue for one run */
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
> +			   MX25_ADCQ_CR_FQS);
> +
> +	timeout = wait_for_completion_interruptible_timeout(
> +		&priv->completed, MX25_GCQ_TIMEOUT);
> +	if (timeout < 0) {
> +		dev_err(dev,
> +			"ADC wait for measurement failed\n");
> +		return timeout;
> +	} else if (timeout == 0) {
> +		dev_err(dev, "ADC timed out\n");
> +		return -ETIMEDOUT;
> +	}
> +
> +	regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
> +
> +	*val = MX25_ADCQ_FIFO_DATA(data);
> +
> +	return IIO_VAL_INT;
> +}
> +
> +static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
> +			     struct iio_chan_spec const *chan, int *val,
> +			     int *val2, long mask)
> +{
> +	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> +	int ret = 0;
> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:
> +		mutex_lock(&indio_dev->mlock);
> +		ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
> +		mutex_unlock(&indio_dev->mlock);
> +		return ret;
> +
> +	case IIO_CHAN_INFO_SCALE:
> +		*val = priv->channel_vref_mv[chan->channel];
> +		*val2 = 12;
> +		return IIO_VAL_FRACTIONAL_LOG2;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static const struct iio_info mx25_gcq_iio_info = {
> +	.read_raw = mx25_gcq_read_raw,
> +};
> +
> +static const struct regmap_config mx25_gcq_regconfig = {
> +	.max_register = 0x5c,
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,
> +};
> +
> +static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
> +			       struct mx25_gcq_priv *priv)
> +{
> +	struct device_node *np = pdev->dev.of_node;
> +	struct device_node *child;
> +	struct device *dev = &pdev->dev;
> +	int ret, i;
> +	bool external_ref_used = false;
> +
> +	/*
> +	 * Setup all configurations registers with a default conversion
> +	 * configuration for each input
> +	 */
> +	for (i = 0; i < MX25_NUM_CFGS; ++i)
> +		regmap_write(priv->regs, MX25_ADCQ_CFG(i),
> +			     MX25_ADCQ_CFG_YPLL_OFF |
> +			     MX25_ADCQ_CFG_XNUR_OFF |
> +			     MX25_ADCQ_CFG_XPUL_OFF |
> +			     MX25_ADCQ_CFG_REFP_INT |
> +			     MX25_ADCQ_CFG_IN(i) |
> +			     MX25_ADCQ_CFG_REFN_NGND2);
> +
> +	for_each_child_of_node(np, child) {
> +		u32 reg;
> +		u32 refp = MX25_ADCQ_CFG_REFP_INT;
> +		u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
> +
> +		ret = of_property_read_u32(child, "reg", &reg);
> +		if (ret) {
> +			dev_err(dev, "Failed to get reg property\n");
> +			return ret;
> +		}
> +
> +		if (reg >= MX25_NUM_CFGS) {
> +			dev_err(dev,
> +				"reg value is greater than the number of available configuration registers\n");
> +			return -EINVAL;
> +		}
> +
> +		of_property_read_u32(child, "fsl,adc-refp", &refp);
> +		of_property_read_u32(child, "fsl,adc-refn", &refn);
> +
> +		if (refp == MX25_ADC_REFP_EXT)
> +			external_ref_used = true;
> +
> +		/*
> +		 * Shift the read values to the correct positions within the
> +		 * register.
> +		 */
> +		refp = MX25_ADCQ_CFG_REFP(refp);
> +		refn = MX25_ADCQ_CFG_REFN(refn);
> +
> +		if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
> +			dev_err(dev, "Invalid fsl,adc-refp property value\n");
> +			return -EINVAL;
> +		}
> +		if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
> +			dev_err(dev, "Invalid fsl,adc-refn property value");
> +			return -EINVAL;
> +		}
> +
> +		regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
> +				   MX25_ADCQ_CFG_REFP_MASK |
> +				   MX25_ADCQ_CFG_REFN_MASK,
> +				   refp | refn);
> +	}
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
> +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
> +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
> +
> +	regmap_write(priv->regs, MX25_ADCQ_CR,
> +		     MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
> +
> +	if (external_ref_used) {
> +		priv->ext_vref = devm_regulator_get(&pdev->dev, "vref");
> +		if (IS_ERR(priv->ext_vref)) {
> +			dev_err(&pdev->dev, "Failed to get regulator for vref although the external reference voltage is used.\n");
> +			return PTR_ERR(priv->ext_vref);
> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +static int mx25_gcq_probe(struct platform_device *pdev)
> +{
> +	struct iio_dev *indio_dev;
> +	struct mx25_gcq_priv *priv;
> +	struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
> +	struct device *dev = &pdev->dev;
> +	struct resource *res;
> +	void __iomem *mem;
> +	int ret;
> +
> +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	priv = iio_priv(indio_dev);
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	mem = devm_ioremap_resource(dev, res);
> +	if (!mem)
> +		return -ENOMEM;
> +
> +	priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
> +	if (IS_ERR(priv->regs)) {
> +		dev_err(dev, "Failed to initialize regmap\n");
> +		return PTR_ERR(priv->regs);
> +	}
> +
> +	init_completion(&priv->completed);
> +
> +	ret = mx25_gcq_setup_cfgs(pdev, priv);
> +	if (ret)
> +		return ret;
> +
> +	if (!IS_ERR_OR_NULL(priv->ext_vref)) {
> +		ret = regulator_enable(priv->ext_vref);

I don't seen this being disabled anywhere.  As devm_regulator_get
will result in a regulator put on device exit and the regulator_put
code is commented with enables must be balanced by disables this
looks liable to cause trouble.

> +		if (ret)
> +			return ret;
> +	}
> +
> +	priv->clk = tsadc->clk;
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret) {
> +		dev_err(dev, "Failed to enable clock\n");
> +		return ret;
> +	}
> +
> +	priv->irq = platform_get_irq(pdev, 0);
> +	if (priv->irq <= 0) {
> +		dev_err(dev, "Failed to get IRQ\n");
> +		ret = priv->irq;
> +		goto err_clk_unprepare;
> +	}
> +
> +	ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);
> +	if (ret) {
> +		dev_err(dev, "Failed requesting IRQ\n");
> +		goto err_clk_unprepare;
> +	}
> +
> +	indio_dev->dev.parent = &pdev->dev;
> +	indio_dev->channels = mx25_gcq_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
> +	indio_dev->info = &mx25_gcq_iio_info;
> +
> +	ret = iio_device_register(indio_dev);
> +	if (ret) {
> +		dev_err(dev, "Failed to register iio device\n");
> +		goto err_irq_free;
> +	}
> +
> +	platform_set_drvdata(pdev, indio_dev);
> +
> +	return 0;
> +
> +err_irq_free:
> +	free_irq(priv->irq, (void *)priv);
> +err_clk_unprepare:
> +	clk_disable_unprepare(priv->clk);
> +	return ret;
> +}
> +
> +static int mx25_gcq_remove(struct platform_device *pdev)
> +{
> +	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> +	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> +
> +	iio_device_unregister(indio_dev);
> +	free_irq(priv->irq, priv);
> +	clk_disable_unprepare(priv->clk);
> +
> +	return 0;
> +}
> +
> +static struct of_device_id mx25_gcq_ids[] = {
> +	{ .compatible = "fsl,imx25-gcq", },
> +	{ /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_gcq_driver = {
> +	.driver		= {
> +		.name	= "mx25-gcq",
> +		.of_match_table = mx25_gcq_ids,
> +	},
> +	.probe		= mx25_gcq_probe,
> +	.remove		= mx25_gcq_remove,
> +};
> +module_platform_driver(mx25_gcq_driver);
> +
> +MODULE_DESCRIPTION("ADC driver for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/dt-bindings/iio/adc/fsl-imx25-gcq.h b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> new file mode 100644
> index 000000000000..4f2f4a9baafe
> --- /dev/null
> +++ b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> @@ -0,0 +1,18 @@
> +/*
> + * This header provides constants for configuring the I.MX25 ADC
> + */
> +
> +#ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
> +#define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
> +
> +#define MX25_ADC_REFP_YP	0 /* YP voltage reference */
> +#define MX25_ADC_REFP_XP	1 /* XP voltage reference */
> +#define MX25_ADC_REFP_INT	2 /* Internal voltage reference */
> +#define MX25_ADC_REFP_EXT	3 /* External voltage reference */
> +
> +#define MX25_ADC_REFN_XN	0
> +#define MX25_ADC_REFN_YN	1
> +#define MX25_ADC_REFN_NGND	2
> +#define MX25_ADC_REFN_NGND2	3
> +
> +#endif
> 

[PATCH v7 5/8] iio: adc: fsl,imx25-gcq driver

[Markus Pargmann]

On Sat, Mar 07, 2015 at 06:03:44PM +0000, Jonathan Cameron wrote:
> On 03/03/15 07:58, Markus Pargmann wrote:
> > This is a conversion queue driver for the mx25 SoC. It uses the central
> > ADC which is used by two seperate independent queues. This driver
> > prepares different conversion configurations for each possible input.
> > For a conversion it creates a conversionqueue of one item with the
> > correct configuration for the chosen channel. It then executes the queue
> > once and disables the conversion queue afterwards.
> > 
> > The reference voltages are configurable through devicetree subnodes,
> > depending on the connections of the ADC inputs.
> > 
> > Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> > Signed-off-by: Denis Carikli <denis@eukrea.com>
> > Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> There's an unbalanced regulator_enable that needs fixing.
> Deal with that in both the remove and the error cases
> and I'm happy.
> 
> > ---
> > 
> > Notes:
> >     Changes in v7:
> >      - Remove separate functions mx25_gcq_disable/enable_eoq() as they were used at
> >        only one position
> >      - Enforce an external reference regulator if one of the conversions uses it as
> >        reference. The devm_regulator_get() call was moved into
> >        mx25_gcq_setup_cfgs() to be able to acquire the reference regulator when
> >        necessary.
> >      - Store indio_dev as platform driver data instead of the private data. This
> >        was changed in probe() and remove().
> >     
> >     Changes in v6:
> >      - Added defines for a complete list of references in the dt binding macros
> > 
> >  drivers/iio/adc/Kconfig                     |   7 +
> >  drivers/iio/adc/Makefile                    |   1 +
> >  drivers/iio/adc/fsl-imx25-gcq.c             | 356 ++++++++++++++++++++++++++++
> >  include/dt-bindings/iio/adc/fsl-imx25-gcq.h |  18 ++
> >  4 files changed, 382 insertions(+)
> >  create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
> >  create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> > 
> > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> > index 202daf889be2..947805d03d6c 100644
> > --- a/drivers/iio/adc/Kconfig
> > +++ b/drivers/iio/adc/Kconfig
> > @@ -154,6 +154,13 @@ config EXYNOS_ADC
> >  	  of SoCs for drivers such as the touchscreen and hwmon to use to share
> >  	  this resource.
> >  
> > +config FSL_MX25_ADC
> > +	tristate "Freescale MX25 ADC driver"
> > +	depends on MFD_MX25_TSADC
> > +	help
> > +	  Generic Conversion Queue driver used for general purpose ADC in the
> > +	  MX25. This driver supports single measurements using the MX25 ADC.
> > +
> >  config LP8788_ADC
> >  	tristate "LP8788 ADC driver"
> >  	depends on MFD_LP8788
> > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> > index 0315af640866..409583975ba0 100644
> > --- a/drivers/iio/adc/Makefile
> > +++ b/drivers/iio/adc/Makefile
> > @@ -17,6 +17,7 @@ obj-$(CONFIG_AT91_ADC) += at91_adc.o
> >  obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
> >  obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
> >  obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
> > +obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
> >  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
> >  obj-$(CONFIG_MAX1027) += max1027.o
> >  obj-$(CONFIG_MAX1363) += max1363.o
> > diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
> > new file mode 100644
> > index 000000000000..18c21888aa4e
> > --- /dev/null
> > +++ b/drivers/iio/adc/fsl-imx25-gcq.c
> > @@ -0,0 +1,356 @@
> > +/*
> > + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> > + *
> > + * This program is free software; you can redistribute it and/or modify it under
> > + * the terms of the GNU General Public License version 2 as published by the
> > + * Free Software Foundation.
> > + *
> > + * This is the driver for the imx25 GCQ (Generic Conversion Queue)
> > + * connected to the imx25 ADC.
> > + */
> > +
> > +#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
> > +#include <linux/clk.h>
> > +#include <linux/iio/iio.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/mfd/imx25-tsadc.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > +#include <linux/regulator/consumer.h>
> > +
> > +#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
> > +
> > +enum mx25_gcq_cfgs {
> > +	MX25_CFG_XP = 0,
> > +	MX25_CFG_YP,
> > +	MX25_CFG_XN,
> > +	MX25_CFG_YN,
> > +	MX25_CFG_WIPER,
> > +	MX25_CFG_INAUX0,
> > +	MX25_CFG_INAUX1,
> > +	MX25_CFG_INAUX2,
> > +	MX25_NUM_CFGS,
> > +};
> > +
> > +struct mx25_gcq_priv {
> > +	struct regmap *regs;
> > +	struct completion completed;
> > +	unsigned int settling_time;
> > +	struct clk *clk;
> > +	int irq;
> > +	struct regulator *ext_vref;
> > +	u32 channel_vref_mv[MX25_NUM_CFGS];
> > +};
> > +
> > +#define MX25_CQG_CHAN(chan, id) {\
> > +	.type = IIO_VOLTAGE,\
> > +	.indexed = 1,\
> > +	.channel = chan,\
> > +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),\
> > +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
> > +	.datasheet_name = id,\
> > +}
> > +
> > +static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
> > +	MX25_CQG_CHAN(0, "xp"),
> > +	MX25_CQG_CHAN(1, "yp"),
> > +	MX25_CQG_CHAN(2, "xn"),
> > +	MX25_CQG_CHAN(3, "yn"),
> > +	MX25_CQG_CHAN(4, "wiper"),
> > +	MX25_CQG_CHAN(5, "inaux0"),
> > +	MX25_CQG_CHAN(6, "inaux1"),
> > +	MX25_CQG_CHAN(7, "inaux2"),
> > +};
> > +
> > +static irqreturn_t mx25_gcq_irq(int irq, void *data)
> > +{
> > +	struct mx25_gcq_priv *priv = data;
> > +	u32 stats;
> > +
> > +	regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
> > +
> > +	if (stats & MX25_ADCQ_SR_EOQ) {
> > +		regmap_update_bits(priv->regs, MX25_ADCQ_MR,
> > +				   MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
> > +		complete(&priv->completed);
> > +	}
> > +
> > +	/* Disable conversion queue run */
> > +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
> > +
> > +	/* Acknowledge all possible irqs */
> > +	regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
> > +		     MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
> > +		     MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
> > +
> > +	return IRQ_HANDLED;
> > +}
> > +
> > +static int mx25_gcq_get_raw_value(struct device *dev,
> > +				  struct iio_chan_spec const *chan,
> > +				  struct mx25_gcq_priv *priv,
> > +				  int *val)
> > +{
> > +	long timeout;
> > +	u32 data;
> > +
> > +	/* Setup the configuration we want to use */
> > +	regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
> > +		     MX25_ADCQ_ITEM(0, chan->channel));
> > +
> > +	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
> > +
> > +	/* Trigger queue for one run */
> > +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
> > +			   MX25_ADCQ_CR_FQS);
> > +
> > +	timeout = wait_for_completion_interruptible_timeout(
> > +		&priv->completed, MX25_GCQ_TIMEOUT);
> > +	if (timeout < 0) {
> > +		dev_err(dev,
> > +			"ADC wait for measurement failed\n");
> > +		return timeout;
> > +	} else if (timeout == 0) {
> > +		dev_err(dev, "ADC timed out\n");
> > +		return -ETIMEDOUT;
> > +	}
> > +
> > +	regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
> > +
> > +	*val = MX25_ADCQ_FIFO_DATA(data);
> > +
> > +	return IIO_VAL_INT;
> > +}
> > +
> > +static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
> > +			     struct iio_chan_spec const *chan, int *val,
> > +			     int *val2, long mask)
> > +{
> > +	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> > +	int ret = 0;
> > +
> > +	switch (mask) {
> > +	case IIO_CHAN_INFO_RAW:
> > +		mutex_lock(&indio_dev->mlock);
> > +		ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
> > +		mutex_unlock(&indio_dev->mlock);
> > +		return ret;
> > +
> > +	case IIO_CHAN_INFO_SCALE:
> > +		*val = priv->channel_vref_mv[chan->channel];
> > +		*val2 = 12;
> > +		return IIO_VAL_FRACTIONAL_LOG2;
> > +
> > +	default:
> > +		return -EINVAL;
> > +	}
> > +}
> > +
> > +static const struct iio_info mx25_gcq_iio_info = {
> > +	.read_raw = mx25_gcq_read_raw,
> > +};
> > +
> > +static const struct regmap_config mx25_gcq_regconfig = {
> > +	.max_register = 0x5c,
> > +	.reg_bits = 32,
> > +	.val_bits = 32,
> > +	.reg_stride = 4,
> > +};
> > +
> > +static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
> > +			       struct mx25_gcq_priv *priv)
> > +{
> > +	struct device_node *np = pdev->dev.of_node;
> > +	struct device_node *child;
> > +	struct device *dev = &pdev->dev;
> > +	int ret, i;
> > +	bool external_ref_used = false;
> > +
> > +	/*
> > +	 * Setup all configurations registers with a default conversion
> > +	 * configuration for each input
> > +	 */
> > +	for (i = 0; i < MX25_NUM_CFGS; ++i)
> > +		regmap_write(priv->regs, MX25_ADCQ_CFG(i),
> > +			     MX25_ADCQ_CFG_YPLL_OFF |
> > +			     MX25_ADCQ_CFG_XNUR_OFF |
> > +			     MX25_ADCQ_CFG_XPUL_OFF |
> > +			     MX25_ADCQ_CFG_REFP_INT |
> > +			     MX25_ADCQ_CFG_IN(i) |
> > +			     MX25_ADCQ_CFG_REFN_NGND2);
> > +
> > +	for_each_child_of_node(np, child) {
> > +		u32 reg;
> > +		u32 refp = MX25_ADCQ_CFG_REFP_INT;
> > +		u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
> > +
> > +		ret = of_property_read_u32(child, "reg", &reg);
> > +		if (ret) {
> > +			dev_err(dev, "Failed to get reg property\n");
> > +			return ret;
> > +		}
> > +
> > +		if (reg >= MX25_NUM_CFGS) {
> > +			dev_err(dev,
> > +				"reg value is greater than the number of available configuration registers\n");
> > +			return -EINVAL;
> > +		}
> > +
> > +		of_property_read_u32(child, "fsl,adc-refp", &refp);
> > +		of_property_read_u32(child, "fsl,adc-refn", &refn);
> > +
> > +		if (refp == MX25_ADC_REFP_EXT)
> > +			external_ref_used = true;
> > +
> > +		/*
> > +		 * Shift the read values to the correct positions within the
> > +		 * register.
> > +		 */
> > +		refp = MX25_ADCQ_CFG_REFP(refp);
> > +		refn = MX25_ADCQ_CFG_REFN(refn);
> > +
> > +		if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
> > +			dev_err(dev, "Invalid fsl,adc-refp property value\n");
> > +			return -EINVAL;
> > +		}
> > +		if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
> > +			dev_err(dev, "Invalid fsl,adc-refn property value");
> > +			return -EINVAL;
> > +		}
> > +
> > +		regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
> > +				   MX25_ADCQ_CFG_REFP_MASK |
> > +				   MX25_ADCQ_CFG_REFN_MASK,
> > +				   refp | refn);
> > +	}
> > +	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
> > +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
> > +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
> > +
> > +	regmap_write(priv->regs, MX25_ADCQ_CR,
> > +		     MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
> > +
> > +	if (external_ref_used) {
> > +		priv->ext_vref = devm_regulator_get(&pdev->dev, "vref");
> > +		if (IS_ERR(priv->ext_vref)) {
> > +			dev_err(&pdev->dev, "Failed to get regulator for vref although the external reference voltage is used.\n");
> > +			return PTR_ERR(priv->ext_vref);
> > +		}
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static int mx25_gcq_probe(struct platform_device *pdev)
> > +{
> > +	struct iio_dev *indio_dev;
> > +	struct mx25_gcq_priv *priv;
> > +	struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
> > +	struct device *dev = &pdev->dev;
> > +	struct resource *res;
> > +	void __iomem *mem;
> > +	int ret;
> > +
> > +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
> > +	if (!indio_dev)
> > +		return -ENOMEM;
> > +
> > +	priv = iio_priv(indio_dev);
> > +
> > +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > +	mem = devm_ioremap_resource(dev, res);
> > +	if (!mem)
> > +		return -ENOMEM;
> > +
> > +	priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
> > +	if (IS_ERR(priv->regs)) {
> > +		dev_err(dev, "Failed to initialize regmap\n");
> > +		return PTR_ERR(priv->regs);
> > +	}
> > +
> > +	init_completion(&priv->completed);
> > +
> > +	ret = mx25_gcq_setup_cfgs(pdev, priv);
> > +	if (ret)
> > +		return ret;
> > +
> > +	if (!IS_ERR_OR_NULL(priv->ext_vref)) {
> > +		ret = regulator_enable(priv->ext_vref);
> 
> I don't seen this being disabled anywhere.  As devm_regulator_get
> will result in a regulator put on device exit and the regulator_put
> code is commented with enables must be balanced by disables this
> looks liable to cause trouble.

Thanks, I missed that. Will fix it.

Best Regards,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150309/3e100ab6/attachment.sig>

[PATCH v7 5/8] iio: adc: fsl,imx25-gcq driver

[Hartmut Knaack]

Markus Pargmann schrieb am 03.03.2015 um 08:58:
> This is a conversion queue driver for the mx25 SoC. It uses the central
> ADC which is used by two seperate independent queues. This driver
> prepares different conversion configurations for each possible input.
> For a conversion it creates a conversionqueue of one item with the
> correct configuration for the chosen channel. It then executes the queue
> once and disables the conversion queue afterwards.
> 
> The reference voltages are configurable through devicetree subnodes,
> depending on the connections of the ADC inputs.
> 

Hi,
please see my comments inline.

> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> Signed-off-by: Denis Carikli <denis@eukrea.com>
> Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
> ---
> 
> Notes:
>     Changes in v7:
>      - Remove separate functions mx25_gcq_disable/enable_eoq() as they were used at
>        only one position
>      - Enforce an external reference regulator if one of the conversions uses it as
>        reference. The devm_regulator_get() call was moved into
>        mx25_gcq_setup_cfgs() to be able to acquire the reference regulator when
>        necessary.
>      - Store indio_dev as platform driver data instead of the private data. This
>        was changed in probe() and remove().
>     
>     Changes in v6:
>      - Added defines for a complete list of references in the dt binding macros
> 
>  drivers/iio/adc/Kconfig                     |   7 +
>  drivers/iio/adc/Makefile                    |   1 +
>  drivers/iio/adc/fsl-imx25-gcq.c             | 356 ++++++++++++++++++++++++++++
>  include/dt-bindings/iio/adc/fsl-imx25-gcq.h |  18 ++
>  4 files changed, 382 insertions(+)
>  create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
>  create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> 
> diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
> index 202daf889be2..947805d03d6c 100644
> --- a/drivers/iio/adc/Kconfig
> +++ b/drivers/iio/adc/Kconfig
> @@ -154,6 +154,13 @@ config EXYNOS_ADC
>  	  of SoCs for drivers such as the touchscreen and hwmon to use to share
>  	  this resource.
>  
> +config FSL_MX25_ADC
> +	tristate "Freescale MX25 ADC driver"
> +	depends on MFD_MX25_TSADC
> +	help
> +	  Generic Conversion Queue driver used for general purpose ADC in the
> +	  MX25. This driver supports single measurements using the MX25 ADC.
> +
>  config LP8788_ADC
>  	tristate "LP8788 ADC driver"
>  	depends on MFD_LP8788
> diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
> index 0315af640866..409583975ba0 100644
> --- a/drivers/iio/adc/Makefile
> +++ b/drivers/iio/adc/Makefile
> @@ -17,6 +17,7 @@ obj-$(CONFIG_AT91_ADC) += at91_adc.o
>  obj-$(CONFIG_AXP288_ADC) += axp288_adc.o
>  obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
>  obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
> +obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o
>  obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
>  obj-$(CONFIG_MAX1027) += max1027.o
>  obj-$(CONFIG_MAX1363) += max1363.o
> diff --git a/drivers/iio/adc/fsl-imx25-gcq.c b/drivers/iio/adc/fsl-imx25-gcq.c
> new file mode 100644
> index 000000000000..18c21888aa4e
> --- /dev/null
> +++ b/drivers/iio/adc/fsl-imx25-gcq.c
> @@ -0,0 +1,356 @@
> +/*
> + * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation.
> + *
> + * This is the driver for the imx25 GCQ (Generic Conversion Queue)
> + * connected to the imx25 ADC.
> + */
> +
> +#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
> +#include <linux/clk.h>
> +#include <linux/iio/iio.h>
> +#include <linux/interrupt.h>
> +#include <linux/mfd/imx25-tsadc.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>
> +
> +#define MX25_GCQ_TIMEOUT (msecs_to_jiffies(2000))
> +
> +enum mx25_gcq_cfgs {
> +	MX25_CFG_XP = 0,
> +	MX25_CFG_YP,
> +	MX25_CFG_XN,
> +	MX25_CFG_YN,
> +	MX25_CFG_WIPER,
> +	MX25_CFG_INAUX0,
> +	MX25_CFG_INAUX1,
> +	MX25_CFG_INAUX2,
> +	MX25_NUM_CFGS,
> +};
> +
> +struct mx25_gcq_priv {
> +	struct regmap *regs;
> +	struct completion completed;
> +	unsigned int settling_time;
settling_time is unused.

> +	struct clk *clk;
> +	int irq;
> +	struct regulator *ext_vref;
> +	u32 channel_vref_mv[MX25_NUM_CFGS];
I couldn't see where this array got assigned.

> +};
> +
> +#define MX25_CQG_CHAN(chan, id) {\
> +	.type = IIO_VOLTAGE,\
> +	.indexed = 1,\
> +	.channel = chan,\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),\
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
> +	.datasheet_name = id,\
> +}
> +
> +static const struct iio_chan_spec mx25_gcq_channels[MX25_NUM_CFGS] = {
> +	MX25_CQG_CHAN(0, "xp"),
> +	MX25_CQG_CHAN(1, "yp"),
> +	MX25_CQG_CHAN(2, "xn"),
> +	MX25_CQG_CHAN(3, "yn"),
> +	MX25_CQG_CHAN(4, "wiper"),
> +	MX25_CQG_CHAN(5, "inaux0"),
> +	MX25_CQG_CHAN(6, "inaux1"),
> +	MX25_CQG_CHAN(7, "inaux2"),
Was it intended to use the entries of enum mx25_gcq_cfgs for chan here?

> +};
> +
> +static irqreturn_t mx25_gcq_irq(int irq, void *data)
> +{
> +	struct mx25_gcq_priv *priv = data;
> +	u32 stats;
> +
> +	regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
> +
> +	if (stats & MX25_ADCQ_SR_EOQ) {
> +		regmap_update_bits(priv->regs, MX25_ADCQ_MR,
> +				   MX25_ADCQ_MR_EOQ_IRQ, MX25_ADCQ_MR_EOQ_IRQ);
> +		complete(&priv->completed);
> +	}
> +
> +	/* Disable conversion queue run */
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS, 0);
> +
> +	/* Acknowledge all possible irqs */
> +	regmap_write(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
> +		     MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
> +		     MX25_ADCQ_SR_EOQ | MX25_ADCQ_SR_PD);
> +
> +	return IRQ_HANDLED;
> +}
> +
> +static int mx25_gcq_get_raw_value(struct device *dev,
> +				  struct iio_chan_spec const *chan,
> +				  struct mx25_gcq_priv *priv,
> +				  int *val)
> +{
> +	long timeout;
> +	u32 data;
> +
> +	/* Setup the configuration we want to use */
> +	regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
> +		     MX25_ADCQ_ITEM(0, chan->channel));
> +
> +	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_EOQ_IRQ, 0);
> +
> +	/* Trigger queue for one run */
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FQS,
> +			   MX25_ADCQ_CR_FQS);
> +
> +	timeout = wait_for_completion_interruptible_timeout(
> +		&priv->completed, MX25_GCQ_TIMEOUT);
> +	if (timeout < 0) {
> +		dev_err(dev,
> +			"ADC wait for measurement failed\n");
This fits in one line.

> +		return timeout;
> +	} else if (timeout == 0) {
> +		dev_err(dev, "ADC timed out\n");
> +		return -ETIMEDOUT;
> +	}
> +
> +	regmap_read(priv->regs, MX25_ADCQ_FIFO, &data);
> +
> +	*val = MX25_ADCQ_FIFO_DATA(data);
> +
> +	return IIO_VAL_INT;
> +}
> +
> +static int mx25_gcq_read_raw(struct iio_dev *indio_dev,
> +			     struct iio_chan_spec const *chan, int *val,
> +			     int *val2, long mask)
> +{
> +	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> +	int ret = 0;
No need to initialize ret.

> +
> +	switch (mask) {
> +	case IIO_CHAN_INFO_RAW:
> +		mutex_lock(&indio_dev->mlock);
> +		ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
> +		mutex_unlock(&indio_dev->mlock);
> +		return ret;
> +
> +	case IIO_CHAN_INFO_SCALE:
> +		*val = priv->channel_vref_mv[chan->channel];
> +		*val2 = 12;
> +		return IIO_VAL_FRACTIONAL_LOG2;
> +
> +	default:
> +		return -EINVAL;
> +	}
> +}
> +
> +static const struct iio_info mx25_gcq_iio_info = {
> +	.read_raw = mx25_gcq_read_raw,
> +};
> +
> +static const struct regmap_config mx25_gcq_regconfig = {
> +	.max_register = 0x5c,
> +	.reg_bits = 32,
> +	.val_bits = 32,
> +	.reg_stride = 4,
> +};
> +
> +static int mx25_gcq_setup_cfgs(struct platform_device *pdev,
> +			       struct mx25_gcq_priv *priv)
> +{
> +	struct device_node *np = pdev->dev.of_node;
> +	struct device_node *child;
> +	struct device *dev = &pdev->dev;
> +	int ret, i;
> +	bool external_ref_used = false;
> +
> +	/*
> +	 * Setup all configurations registers with a default conversion
> +	 * configuration for each input
> +	 */
> +	for (i = 0; i < MX25_NUM_CFGS; ++i)
> +		regmap_write(priv->regs, MX25_ADCQ_CFG(i),
> +			     MX25_ADCQ_CFG_YPLL_OFF |
> +			     MX25_ADCQ_CFG_XNUR_OFF |
> +			     MX25_ADCQ_CFG_XPUL_OFF |
> +			     MX25_ADCQ_CFG_REFP_INT |
> +			     MX25_ADCQ_CFG_IN(i) |
> +			     MX25_ADCQ_CFG_REFN_NGND2);
> +
> +	for_each_child_of_node(np, child) {
> +		u32 reg;
> +		u32 refp = MX25_ADCQ_CFG_REFP_INT;
> +		u32 refn = MX25_ADCQ_CFG_REFN_NGND2;
> +
> +		ret = of_property_read_u32(child, "reg", &reg);
> +		if (ret) {
> +			dev_err(dev, "Failed to get reg property\n");
> +			return ret;
> +		}
> +
> +		if (reg >= MX25_NUM_CFGS) {
> +			dev_err(dev,
> +				"reg value is greater than the number of available configuration registers\n");
> +			return -EINVAL;
> +		}
> +
> +		of_property_read_u32(child, "fsl,adc-refp", &refp);
> +		of_property_read_u32(child, "fsl,adc-refn", &refn);
> +
> +		if (refp == MX25_ADC_REFP_EXT)
> +			external_ref_used = true;
> +
> +		/*
> +		 * Shift the read values to the correct positions within the
> +		 * register.
> +		 */
> +		refp = MX25_ADCQ_CFG_REFP(refp);
> +		refn = MX25_ADCQ_CFG_REFN(refn);
This is only valid if reading the of_property was successful!
Better check return value after read and only apply the shift in case of success.

> +
> +		if ((refp & MX25_ADCQ_CFG_REFP_MASK) != refp) {
> +			dev_err(dev, "Invalid fsl,adc-refp property value\n");
> +			return -EINVAL;
> +		}
> +		if ((refn & MX25_ADCQ_CFG_REFN_MASK) != refn) {
> +			dev_err(dev, "Invalid fsl,adc-refn property value");
Missing \n

> +			return -EINVAL;
> +		}
> +
> +		regmap_update_bits(priv->regs, MX25_ADCQ_CFG(reg),
> +				   MX25_ADCQ_CFG_REFP_MASK |
> +				   MX25_ADCQ_CFG_REFN_MASK,
> +				   refp | refn);
> +	}
> +	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
> +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST,
> +			   MX25_ADCQ_CR_FRST | MX25_ADCQ_CR_QRST);
> +
> +	regmap_write(priv->regs, MX25_ADCQ_CR,
> +		     MX25_ADCQ_CR_PDMSK | MX25_ADCQ_CR_QSM_FQS);
> +
> +	if (external_ref_used) {
> +		priv->ext_vref = devm_regulator_get(&pdev->dev, "vref");
> +		if (IS_ERR(priv->ext_vref)) {
> +			dev_err(&pdev->dev, "Failed to get regulator for vref although the external reference voltage is used.\n");
> +			return PTR_ERR(priv->ext_vref);
You need to restructure your code to set the reference voltage for each channel.

> +		}
> +	}
> +
> +	return 0;
> +}
> +
> +static int mx25_gcq_probe(struct platform_device *pdev)
> +{
> +	struct iio_dev *indio_dev;
> +	struct mx25_gcq_priv *priv;
> +	struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
> +	struct device *dev = &pdev->dev;
> +	struct resource *res;
> +	void __iomem *mem;
> +	int ret;
> +
> +	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	priv = iio_priv(indio_dev);
> +
> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +	mem = devm_ioremap_resource(dev, res);
> +	if (!mem)
mem is an ERR_PTR() encoded error code in case of failure.

> +		return -ENOMEM;
> +
> +	priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_gcq_regconfig);
> +	if (IS_ERR(priv->regs)) {
> +		dev_err(dev, "Failed to initialize regmap\n");
> +		return PTR_ERR(priv->regs);
> +	}
> +
> +	init_completion(&priv->completed);
> +
> +	ret = mx25_gcq_setup_cfgs(pdev, priv);
> +	if (ret)
> +		return ret;
> +
> +	if (!IS_ERR_OR_NULL(priv->ext_vref)) {
> +		ret = regulator_enable(priv->ext_vref);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	priv->clk = tsadc->clk;
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret) {
> +		dev_err(dev, "Failed to enable clock\n");
> +		return ret;
> +	}
> +
> +	priv->irq = platform_get_irq(pdev, 0);
> +	if (priv->irq <= 0) {
> +		dev_err(dev, "Failed to get IRQ\n");
> +		ret = priv->irq;
> +		goto err_clk_unprepare;
> +	}
> +
> +	ret = request_irq(priv->irq, mx25_gcq_irq, 0, pdev->name, priv);
> +	if (ret) {
> +		dev_err(dev, "Failed requesting IRQ\n");
> +		goto err_clk_unprepare;
> +	}
> +
> +	indio_dev->dev.parent = &pdev->dev;
> +	indio_dev->channels = mx25_gcq_channels;
> +	indio_dev->num_channels = ARRAY_SIZE(mx25_gcq_channels);
> +	indio_dev->info = &mx25_gcq_iio_info;
You should also set indio_dev->name and indio_dev->modes.

> +
> +	ret = iio_device_register(indio_dev);
> +	if (ret) {
> +		dev_err(dev, "Failed to register iio device\n");
> +		goto err_irq_free;
> +	}
> +
> +	platform_set_drvdata(pdev, indio_dev);
This should be moved up before iio_device_register.

> +
> +	return 0;
> +
> +err_irq_free:
> +	free_irq(priv->irq, (void *)priv);
> +err_clk_unprepare:
> +	clk_disable_unprepare(priv->clk);
> +	return ret;
> +}
> +
> +static int mx25_gcq_remove(struct platform_device *pdev)
> +{
> +	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
> +	struct mx25_gcq_priv *priv = iio_priv(indio_dev);
> +
> +	iio_device_unregister(indio_dev);
> +	free_irq(priv->irq, priv);
> +	clk_disable_unprepare(priv->clk);
> +
> +	return 0;
> +}
> +
> +static struct of_device_id mx25_gcq_ids[] = {
> +	{ .compatible = "fsl,imx25-gcq", },
> +	{ /* Sentinel */ }
> +};
> +
> +static struct platform_driver mx25_gcq_driver = {
> +	.driver		= {
> +		.name	= "mx25-gcq",
> +		.of_match_table = mx25_gcq_ids,
> +	},
> +	.probe		= mx25_gcq_probe,
> +	.remove		= mx25_gcq_remove,
> +};
> +module_platform_driver(mx25_gcq_driver);
> +
> +MODULE_DESCRIPTION("ADC driver for Freescale mx25");
> +MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
> +MODULE_LICENSE("GPL v2");
> diff --git a/include/dt-bindings/iio/adc/fsl-imx25-gcq.h b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> new file mode 100644
> index 000000000000..4f2f4a9baafe
> --- /dev/null
> +++ b/include/dt-bindings/iio/adc/fsl-imx25-gcq.h
> @@ -0,0 +1,18 @@
> +/*
> + * This header provides constants for configuring the I.MX25 ADC
> + */
> +
> +#ifndef _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
> +#define _DT_BINDINGS_IIO_ADC_FS_IMX25_GCQ_H
> +
> +#define MX25_ADC_REFP_YP	0 /* YP voltage reference */
> +#define MX25_ADC_REFP_XP	1 /* XP voltage reference */
> +#define MX25_ADC_REFP_INT	2 /* Internal voltage reference */
> +#define MX25_ADC_REFP_EXT	3 /* External voltage reference */
> +
> +#define MX25_ADC_REFN_XN	0
> +#define MX25_ADC_REFN_YN	1
> +#define MX25_ADC_REFN_NGND	2
> +#define MX25_ADC_REFN_NGND2	3
Have some comments for the REFN-block as well?

> +
> +#endif
> 

[PATCH v7 6/8] input: touchscreen: imx25 tcq driver

[Markus Pargmann]

This is a driver for the imx25 ADC/TSC module. It controls the
touchscreen conversion queue and creates a touchscreen input device.
The driver currently only supports 4 wire touchscreens. The driver uses
a simple conversion queue of precharge, touch detection, X measurement,
Y measurement, precharge and another touch detection.

This driver uses the regmap from the parent to setup some touch specific
settings in the core driver and setup a idle configuration with touch
detection.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---

Notes:
    Changes in v7:
     - Moved clk_prepare_enable() and mx25_tcq_init() into mx25_tcq_open(). This
       was done to be able to use devm_request_threaded_irq().
     - Cleanup of the probe function through above change
     - Removed mx25_tcq_remove(), not necessary now

 drivers/input/touchscreen/Kconfig         |   6 +
 drivers/input/touchscreen/Makefile        |   1 +
 drivers/input/touchscreen/fsl-imx25-tcq.c | 593 ++++++++++++++++++++++++++++++
 3 files changed, 600 insertions(+)
 create mode 100644 drivers/input/touchscreen/fsl-imx25-tcq.c

diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 58917525126e..f1534a0cd23f 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -748,6 +748,12 @@ config TOUCHSCREEN_USB_COMPOSITE
 	  To compile this driver as a module, choose M here: the
 	  module will be called usbtouchscreen.
 
+config TOUCHSCREEN_MX25
+	tristate "Freescale i.MX25 touchscreen input driver"
+	depends on MFD_MX25_TSADC
+	help
+	  Enable support for touchscreen connected to your i.MX25.
+
 config TOUCHSCREEN_MC13783
 	tristate "Freescale MC13783 touchscreen input driver"
 	depends on MFD_MC13XXX
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 0242fea2102a..bbb55a69c33c 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_TOUCHSCREEN_INEXIO)	+= inexio.o
 obj-$(CONFIG_TOUCHSCREEN_INTEL_MID)	+= intel-mid-touch.o
 obj-$(CONFIG_TOUCHSCREEN_LPC32XX)	+= lpc32xx_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MAX11801)	+= max11801_ts.o
+obj-$(CONFIG_TOUCHSCREEN_MX25)		+= fsl-imx25-tcq.o
 obj-$(CONFIG_TOUCHSCREEN_MC13783)	+= mc13783_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MCS5000)	+= mcs5000_ts.o
 obj-$(CONFIG_TOUCHSCREEN_MIGOR)		+= migor_ts.o
diff --git a/drivers/input/touchscreen/fsl-imx25-tcq.c b/drivers/input/touchscreen/fsl-imx25-tcq.c
new file mode 100644
index 000000000000..638302ecfc28
--- /dev/null
+++ b/drivers/input/touchscreen/fsl-imx25-tcq.c
@@ -0,0 +1,593 @@
+/*
+ * Copyright (C) 2014-2015 Pengutronix, Markus Pargmann <mpa@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ *
+ * Based on driver from 2011:
+ *   Juergen Beisert, Pengutronix <kernel@pengutronix.de>
+ *
+ * This is the driver for the imx25 TCQ (Touchscreen Conversion Queue)
+ * connected to the imx25 ADC.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/input.h>
+#include <linux/interrupt.h>
+#include <linux/mfd/imx25-tsadc.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+
+static const char mx25_tcq_name[] = "mx25-tcq";
+
+enum mx25_tcq_mode {
+	MX25_TS_4WIRE,
+};
+
+struct mx25_tcq_priv {
+	struct regmap *regs;
+	struct regmap *core_regs;
+	struct input_dev *idev;
+	enum mx25_tcq_mode mode;
+	unsigned int pen_threshold;
+	unsigned int sample_count;
+	unsigned int expected_samples;
+	unsigned int pen_debounce;
+	unsigned int settling_time;
+	struct clk *clk;
+	int irq;
+};
+
+static struct regmap_config mx25_tcq_regconfig = {
+	.fast_io = true,
+	.max_register = 0x5c,
+	.reg_bits = 32,
+	.val_bits = 32,
+	.reg_stride = 4,
+};
+
+static struct of_device_id mx25_tcq_ids[] = {
+	{ .compatible = "fsl,imx25-tcq", },
+	{ /* Sentinel */ }
+};
+
+#define TSC_4WIRE_PRE_INDEX 0
+#define TSC_4WIRE_X_INDEX 1
+#define TSC_4WIRE_Y_INDEX 2
+#define TSC_4WIRE_POST_INDEX 3
+#define TSC_4WIRE_LEAVE 4
+
+#define MX25_TSC_DEF_THRESHOLD 80
+#define TSC_MAX_SAMPLES 16
+
+#define MX25_TSC_REPEAT_WAIT 14
+
+enum mx25_adc_configurations {
+	MX25_CFG_PRECHARGE = 0,
+	MX25_CFG_TOUCH_DETECT,
+	MX25_CFG_X_MEASUREMENT,
+	MX25_CFG_Y_MEASUREMENT,
+};
+
+#define MX25_PRECHARGE_VALUE (\
+			MX25_ADCQ_CFG_YPLL_OFF | \
+			MX25_ADCQ_CFG_XNUR_OFF | \
+			MX25_ADCQ_CFG_XPUL_HIGH | \
+			MX25_ADCQ_CFG_REFP_INT | \
+			MX25_ADCQ_CFG_IN_XP | \
+			MX25_ADCQ_CFG_REFN_NGND2 | \
+			MX25_ADCQ_CFG_IGS)
+
+#define MX25_TOUCH_DETECT_VALUE (\
+			MX25_ADCQ_CFG_YNLR | \
+			MX25_ADCQ_CFG_YPLL_OFF | \
+			MX25_ADCQ_CFG_XNUR_OFF | \
+			MX25_ADCQ_CFG_XPUL_OFF | \
+			MX25_ADCQ_CFG_REFP_INT | \
+			MX25_ADCQ_CFG_IN_XP | \
+			MX25_ADCQ_CFG_REFN_NGND2 | \
+			MX25_ADCQ_CFG_PENIACK)
+
+static void imx25_setup_queue_cfgs(struct mx25_tcq_priv *priv,
+				   unsigned int settling_time)
+{
+	u32 precharge_cfg =
+			MX25_PRECHARGE_VALUE |
+			MX25_ADCQ_CFG_SETTLING_TIME(settling_time);
+	u32 touch_detect_cfg =
+			MX25_TOUCH_DETECT_VALUE |
+			MX25_ADCQ_CFG_NOS(1) |
+			MX25_ADCQ_CFG_SETTLING_TIME(settling_time);
+
+	regmap_write(priv->core_regs, MX25_TSC_TICR, precharge_cfg);
+
+	/* PRECHARGE */
+	regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_PRECHARGE),
+		     precharge_cfg);
+
+	/* TOUCH_DETECT */
+	regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_TOUCH_DETECT),
+		     touch_detect_cfg);
+
+	/* X Measurement */
+	regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_X_MEASUREMENT),
+		     MX25_ADCQ_CFG_YPLL_OFF |
+		     MX25_ADCQ_CFG_XNUR_LOW |
+		     MX25_ADCQ_CFG_XPUL_HIGH |
+		     MX25_ADCQ_CFG_REFP_XP |
+		     MX25_ADCQ_CFG_IN_YP |
+		     MX25_ADCQ_CFG_REFN_XN |
+		     MX25_ADCQ_CFG_NOS(priv->sample_count) |
+		     MX25_ADCQ_CFG_SETTLING_TIME(settling_time));
+
+	/* Y Measurement */
+	regmap_write(priv->regs, MX25_ADCQ_CFG(MX25_CFG_Y_MEASUREMENT),
+		     MX25_ADCQ_CFG_YNLR |
+		     MX25_ADCQ_CFG_YPLL_HIGH |
+		     MX25_ADCQ_CFG_XNUR_OFF |
+		     MX25_ADCQ_CFG_XPUL_OFF |
+		     MX25_ADCQ_CFG_REFP_YP |
+		     MX25_ADCQ_CFG_IN_XP |
+		     MX25_ADCQ_CFG_REFN_YN |
+		     MX25_ADCQ_CFG_NOS(priv->sample_count) |
+		     MX25_ADCQ_CFG_SETTLING_TIME(settling_time));
+
+	/* Enable the touch detection right now */
+	regmap_write(priv->core_regs, MX25_TSC_TICR, touch_detect_cfg |
+		     MX25_ADCQ_CFG_IGS);
+}
+
+static int imx25_setup_queue_4wire(struct mx25_tcq_priv *priv,
+				   unsigned settling_time, int *items)
+{
+	imx25_setup_queue_cfgs(priv, settling_time);
+
+	/* Setup the conversion queue */
+	regmap_write(priv->regs, MX25_ADCQ_ITEM_7_0,
+		     MX25_ADCQ_ITEM(0, MX25_CFG_PRECHARGE) |
+		     MX25_ADCQ_ITEM(1, MX25_CFG_TOUCH_DETECT) |
+		     MX25_ADCQ_ITEM(2, MX25_CFG_X_MEASUREMENT) |
+		     MX25_ADCQ_ITEM(3, MX25_CFG_Y_MEASUREMENT) |
+		     MX25_ADCQ_ITEM(4, MX25_CFG_PRECHARGE) |
+		     MX25_ADCQ_ITEM(5, MX25_CFG_TOUCH_DETECT));
+
+	/* We measure X/Y with 'sample_count' number of samples and execute a
+	 * touch detection twice, with 1 sample each */
+	priv->expected_samples = priv->sample_count * 2 + 2;
+	*items = 6;
+
+	return 0;
+}
+
+static void mx25_tcq_disable_touch_irq(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK,
+			   MX25_ADCQ_CR_PDMSK);
+}
+
+static void mx25_tcq_enable_touch_irq(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_PDMSK, 0);
+}
+
+static void mx25_tcq_disable_fifo_irq(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ,
+			   MX25_ADCQ_MR_FDRY_IRQ);
+}
+
+static void mx25_tcq_enable_fifo_irq(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_FDRY_IRQ, 0);
+}
+
+static void mx25_tcq_force_queue_start(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_FQS,
+			   MX25_ADCQ_CR_FQS);
+}
+
+static void mx25_tcq_force_queue_stop(struct mx25_tcq_priv *priv)
+{
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_FQS, 0);
+}
+
+static void mx25_tcq_fifo_reset(struct mx25_tcq_priv *priv)
+{
+	u32 tcqcr;
+
+	regmap_read(priv->regs, MX25_ADCQ_CR, &tcqcr);
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST,
+			   MX25_ADCQ_CR_FRST);
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_FRST, 0);
+	regmap_write(priv->regs, MX25_ADCQ_CR, tcqcr);
+}
+
+static void mx25_tcq_re_enable_touch_detection(struct mx25_tcq_priv *priv)
+{
+	/* stop the queue from looping */
+	mx25_tcq_force_queue_stop(priv);
+
+	/* for a clean touch detection, preload the X plane */
+	regmap_write(priv->core_regs, MX25_TSC_TICR, MX25_PRECHARGE_VALUE);
+
+	/* waste some time now to pre-load the X plate to high voltage */
+	mx25_tcq_fifo_reset(priv);
+
+	/* re-enable the detection right now */
+	regmap_write(priv->core_regs, MX25_TSC_TICR,
+		     MX25_TOUCH_DETECT_VALUE | MX25_ADCQ_CFG_IGS);
+
+	regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_PD,
+			   MX25_ADCQ_SR_PD);
+
+	/* enable the pen down event to be a source for the interrupt */
+	regmap_update_bits(priv->regs, MX25_ADCQ_MR, MX25_ADCQ_MR_PD_IRQ, 0);
+
+	/* lets fire the next IRQ if someone touches the touchscreen */
+	mx25_tcq_enable_touch_irq(priv);
+}
+
+static int mx25_tcq_create_event_for_4wire(struct mx25_tcq_priv *priv,
+					   u32 *sample_buf,
+					   unsigned int samples)
+{
+	unsigned int x_pos = 0;
+	unsigned int y_pos = 0;
+	unsigned int touch_pre = 0;
+	unsigned int touch_post = 0;
+	unsigned int i;
+	int ret = 0;
+
+	for (i = 0; i < samples; i++) {
+		unsigned int index = MX25_ADCQ_FIFO_ID(sample_buf[i]);
+		unsigned int val = MX25_ADCQ_FIFO_DATA(sample_buf[i]);
+
+		switch (index) {
+		case 1:
+			touch_pre = val;
+			break;
+		case 2:
+			x_pos = val;
+			break;
+		case 3:
+			y_pos = val;
+			break;
+		case 5:
+			touch_post = val;
+			break;
+		default:
+			ret = -EINVAL;
+			break;
+		}
+	}
+
+	if (ret == 0 && samples != 0) {
+		/*
+		 * only if both touch measures are below a threshold,
+		 * the position is valid
+		 */
+		if (touch_pre < priv->pen_threshold &&
+		    touch_post < priv->pen_threshold) {
+			/* valid samples, generate a report */
+			x_pos /= priv->sample_count;
+			y_pos /= priv->sample_count;
+			input_report_abs(priv->idev, ABS_X, x_pos);
+			input_report_abs(priv->idev, ABS_Y, y_pos);
+			input_report_key(priv->idev, BTN_TOUCH, 1);
+			input_sync(priv->idev);
+
+			/* get next sample */
+			mx25_tcq_enable_fifo_irq(priv);
+		} else if (touch_pre >= priv->pen_threshold &&
+			   touch_post >= priv->pen_threshold) {
+			/*
+			 * if both samples are invalid,
+			 * generate a release report
+			 */
+			input_report_key(priv->idev, BTN_TOUCH, 0);
+			input_sync(priv->idev);
+			mx25_tcq_re_enable_touch_detection(priv);
+		} else {
+			/*
+			 * if only one of both touch measurements are
+			 * below the threshold, still some bouncing
+			 * happens. Take additional samples in this
+			 * case to be sure
+			 */
+			mx25_tcq_enable_fifo_irq(priv);
+		}
+	}
+
+	return ret;
+}
+
+static irqreturn_t mx25_tcq_irq_thread(int irq, void *dev_id)
+{
+	struct mx25_tcq_priv *priv = dev_id;
+	u32 sample_buf[TSC_MAX_SAMPLES];
+	unsigned int samples = 0;
+
+	/* read all samples */
+	while (1) {
+		u32 stats;
+
+		regmap_read(priv->regs, MX25_ADCQ_SR, &stats);
+		if (stats & MX25_ADCQ_SR_EMPT)
+			break;
+
+		if (samples < TSC_MAX_SAMPLES) {
+			regmap_read(priv->regs, MX25_ADCQ_FIFO,
+				    &sample_buf[samples]);
+			++samples;
+		} else {
+			u32 discarded;
+			/* discard samples */
+			regmap_read(priv->regs, MX25_ADCQ_FIFO, &discarded);
+		}
+	}
+
+	mx25_tcq_create_event_for_4wire(priv, sample_buf, samples);
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t mx25_tcq_irq(int irq, void *dev_id)
+{
+	struct mx25_tcq_priv *priv = dev_id;
+	u32 stat;
+	int ret = IRQ_HANDLED;
+
+	regmap_read(priv->regs, MX25_ADCQ_SR, &stat);
+
+	if (stat & (MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR))
+		mx25_tcq_fifo_reset(priv);
+
+	if (stat & MX25_ADCQ_SR_PD) {
+		mx25_tcq_disable_touch_irq(priv);
+		mx25_tcq_force_queue_start(priv);
+		mx25_tcq_enable_fifo_irq(priv);
+	}
+
+	if (stat & MX25_ADCQ_SR_FDRY) {
+		mx25_tcq_disable_fifo_irq(priv);
+		ret = IRQ_WAKE_THREAD;
+	}
+
+	regmap_update_bits(priv->regs, MX25_ADCQ_SR, MX25_ADCQ_SR_FRR |
+			   MX25_ADCQ_SR_FUR | MX25_ADCQ_SR_FOR |
+			   MX25_ADCQ_SR_PD | MX25_ADCQ_SR_EOQ,
+			   MX25_ADCQ_SR_FRR | MX25_ADCQ_SR_FUR |
+			   MX25_ADCQ_SR_FOR | MX25_ADCQ_SR_PD |
+			   MX25_ADCQ_SR_EOQ);
+
+	return ret;
+}
+
+/* configure the statemachine for a 4-wire touchscreen */
+static int mx25_tcq_init(struct mx25_tcq_priv *priv)
+{
+	u32 tgcr;
+	unsigned int ipg_div;
+	unsigned int adc_period;
+	unsigned int debounce_cnt;
+	unsigned int settling_time;
+	int itemct;
+	int ret;
+
+	regmap_read(priv->core_regs, MX25_TSC_TGCR, &tgcr);
+	ipg_div = max_t(unsigned int, 4, MX25_TGCR_GET_ADCCLK(tgcr));
+	adc_period = clk_get_rate(priv->clk) / (ipg_div * 2 + 2);
+	debounce_cnt = DIV_ROUND_UP(priv->pen_debounce, adc_period * 8) - 1;
+	settling_time = DIV_ROUND_UP(priv->settling_time, adc_period);
+
+	/* Reset */
+	regmap_write(priv->regs, MX25_ADCQ_CR,
+		     MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST);
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_QRST | MX25_ADCQ_CR_FRST, 0);
+
+	/* up to 128 * 8 ADC clocks are possible */
+	if (debounce_cnt > 127)
+		debounce_cnt = 127;
+
+	ret = imx25_setup_queue_4wire(priv, settling_time, &itemct);
+	if (ret)
+		return ret;
+
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_LITEMID_MASK | MX25_ADCQ_CR_WMRK_MASK,
+			   MX25_ADCQ_CR_LITEMID(itemct - 1) |
+			   MX25_ADCQ_CR_WMRK(priv->expected_samples - 1));
+
+	/* setup debounce count */
+	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR,
+			   MX25_TGCR_PDBTIME_MASK,
+			   MX25_TGCR_PDBTIME(debounce_cnt));
+
+	/* enable debounce */
+	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDBEN,
+			   MX25_TGCR_PDBEN);
+	regmap_update_bits(priv->core_regs, MX25_TSC_TGCR, MX25_TGCR_PDEN,
+			   MX25_TGCR_PDEN);
+
+	/* enable the engine on demand */
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR, MX25_ADCQ_CR_QSM_MASK,
+			   MX25_ADCQ_CR_QSM_FQS);
+
+	/* Enable repeat and repeat wait */
+	regmap_update_bits(priv->regs, MX25_ADCQ_CR,
+			   MX25_ADCQ_CR_RPT | MX25_ADCQ_CR_RWAIT_MASK,
+			   MX25_ADCQ_CR_RPT |
+			   MX25_ADCQ_CR_RWAIT(MX25_TSC_REPEAT_WAIT));
+
+	mx25_tcq_re_enable_touch_detection(priv);
+
+	return 0;
+}
+
+static int mx25_tcq_parse_dt(struct platform_device *pdev,
+			     struct mx25_tcq_priv *priv)
+{
+	struct device_node *np = pdev->dev.of_node;
+	u32 wires;
+	int ret;
+
+	/* Setup defaults */
+	priv->pen_threshold = 500;
+	priv->sample_count = 3;
+	priv->pen_debounce = 1000000;
+	priv->settling_time = 250000;
+
+	ret = of_property_read_u32(np, "fsl,wires", &wires);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to find fsl,wires properties\n");
+		return ret;
+	}
+
+	if (wires == 4) {
+		priv->mode = MX25_TS_4WIRE;
+	} else {
+		dev_err(&pdev->dev, "%u-wire mode not supported\n", wires);
+		return -EINVAL;
+	}
+
+	/* These are optional, we don't care about the return values */
+	of_property_read_u32(np, "fsl,pen-threshold", &priv->pen_threshold);
+	of_property_read_u32(np, "fsl,settling-time", &priv->settling_time);
+	of_property_read_u32(np, "fsl,pen-debounce", &priv->pen_debounce);
+
+	return 0;
+}
+
+static int mx25_tcq_open(struct input_dev *idev)
+{
+	struct device *dev = &idev->dev;
+	struct mx25_tcq_priv *priv = dev_get_drvdata(dev);
+	int ret;
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		dev_err(dev, "Failed to enable ipg clock\n");
+		return ret;
+	}
+
+	ret = mx25_tcq_init(priv);
+	if (ret) {
+		dev_err(dev, "Failed to init tcq\n");
+		clk_disable_unprepare(priv->clk);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void mx25_tcq_close(struct input_dev *idev)
+{
+	struct mx25_tcq_priv *priv = input_get_drvdata(idev);
+
+	mx25_tcq_force_queue_stop(priv);
+	mx25_tcq_disable_touch_irq(priv);
+	mx25_tcq_disable_fifo_irq(priv);
+	clk_disable_unprepare(priv->clk);
+}
+
+static int mx25_tcq_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct input_dev *idev;
+	struct mx25_tcq_priv *priv;
+	struct mx25_tsadc *tsadc = dev_get_drvdata(pdev->dev.parent);
+	struct resource *res;
+	void __iomem *mem;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	mem = devm_ioremap_resource(dev, res);
+	if (!mem)
+		return -ENOMEM;
+
+	ret = mx25_tcq_parse_dt(pdev, priv);
+	if (ret)
+		return ret;
+
+	priv->regs = devm_regmap_init_mmio(dev, mem, &mx25_tcq_regconfig);
+	if (IS_ERR(priv->regs)) {
+		dev_err(dev, "Failed to initialize regmap\n");
+		return PTR_ERR(priv->regs);
+	}
+
+	priv->irq = platform_get_irq(pdev, 0);
+	if (priv->irq <= 0) {
+		dev_err(dev, "Failed to get IRQ\n");
+		return priv->irq;
+	}
+
+	idev = devm_input_allocate_device(dev);
+	if (!idev) {
+		dev_err(dev, "Failed to allocate input device\n");
+		return -ENOMEM;
+	}
+
+	idev->name = mx25_tcq_name;
+	idev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+	idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+	input_set_abs_params(idev, ABS_X, 0, 0xfff, 0, 0);
+	input_set_abs_params(idev, ABS_Y, 0, 0xfff, 0, 0);
+
+	idev->id.bustype = BUS_HOST;
+	idev->open = mx25_tcq_open;
+	idev->close = mx25_tcq_close;
+
+	priv->idev = idev;
+	input_set_drvdata(idev, priv);
+
+	priv->core_regs = tsadc->regs;
+	if (!priv->core_regs)
+		return -EINVAL;
+
+	priv->clk = tsadc->clk;
+	if (!priv->clk)
+		return -EINVAL;
+
+	platform_set_drvdata(pdev, priv);
+
+	ret = input_register_device(idev);
+	if (ret) {
+		dev_err(dev, "Failed to register input device\n");
+		return ret;
+	}
+
+	ret = devm_request_threaded_irq(dev, priv->irq, mx25_tcq_irq,
+					mx25_tcq_irq_thread, IRQF_ONESHOT,
+					pdev->name, priv);
+	if (ret) {
+		dev_err(dev, "Failed requesting IRQ\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static struct platform_driver mx25_tcq_driver = {
+	.driver		= {
+		.name	= "mx25-tcq",
+		.of_match_table = mx25_tcq_ids,
+	},
+	.probe		= mx25_tcq_probe,
+};
+module_platform_driver(mx25_tcq_driver);
+
+MODULE_DESCRIPTION("TS input driver for Freescale mx25");
+MODULE_AUTHOR("Markus Pargmann <mpa@pengutronix.de>");
+MODULE_LICENSE("GPL v2");
-- 
2.1.4

[PATCH v7 7/8] ARM: dts: imx25: Add TSC and ADC support

[Markus Pargmann]

From: Denis Carikli <denis@eukrea.com>

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---
 arch/arm/boot/dts/imx25.dtsi | 30 +++++++++++++++++++++++++++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index e4d3aecc4ed2..4780926fa20e 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -265,13 +265,37 @@
 				status = "disabled";
 			};
 
-			tsc: tsc at 50030000 {
-				compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
-				reg = <0x50030000 0x4000>;
+			tscadc: tscadc at 50030000 {
+				compatible = "fsl,imx25-tsadc";
+				reg = <0x50030000 0xc>;
 				interrupts = <46>;
 				clocks = <&clks 119>;
 				clock-names = "ipg";
+				interrupt-controller;
+				#interrupt-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges;
 				status = "disabled";
+
+				adc: adc at 50030800 {
+					compatible = "fsl,imx25-gcq";
+					reg = <0x50030800 0x60>;
+					interrupt-parent = <&tscadc>;
+					interrupts = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+					status = "disabled";
+				};
+
+				tsc: tcq at 50030400 {
+					compatible = "fsl,imx25-tcq";
+					reg = <0x50030400 0x60>;
+					interrupt-parent = <&tscadc>;
+					interrupts = <0>;
+					fsl,wires = <4>;
+					status = "disabled";
+				};
 			};
 
 			ssi1: ssi at 50034000 {
-- 
2.1.4

[PATCH v7 8/8] ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC support.

[Markus Pargmann]

From: Denis Carikli <denis@eukrea.com>

Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
---
 arch/arm/configs/imx_v4_v5_defconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index e6b0007355f8..e1bda0136f6c 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -89,6 +89,7 @@ CONFIG_KEYBOARD_IMX=y
 # CONFIG_INPUT_MOUSE is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=m
+CONFIG_TOUCHSCREEN_MX25=y
 CONFIG_TOUCHSCREEN_MC13783=y
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=m
@@ -108,6 +109,7 @@ CONFIG_HWMON=m
 CONFIG_SENSORS_MC13783_ADC=m
 CONFIG_WATCHDOG=y
 CONFIG_IMX2_WDT=y
+CONFIG_MFD_MX25_TSADC=y
 CONFIG_MFD_MC13XXX_SPI=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -173,6 +175,8 @@ CONFIG_DMADEVICES=y
 CONFIG_IMX_SDMA=y
 CONFIG_IMX_DMA=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_IIO=y
+CONFIG_FSL_MX25_ADC=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_EXT4_FS=y
-- 
2.1.4

[PATCH v7 0/8] imx25 adc and touchscreen driver

[Jonathan Cameron]

On 03/03/15 07:58, Markus Pargmann wrote:
> Hi,
> 
> This series adds a driver for the Freescale i.MX25 SoC internal ADC unit which
> is used for touchscreen and ADC. The driver consists of three parts, the MFD
> driver which handles interrupts and some central configuration registers, the
> ADC driver and the touchscreen driver.
> 
> v7 has some modifications in the probe functions to use devres irq requests.
> irq checks were fixed to check for irqs <= 0. The header was cleaned up to have
> a more uniform presentation of the bit fields. Detailed changelogs are attached
> to the according mails.
> 
> Best Regards,
> 
> Markus
Almost there as far as I am concerned.  Just that one unbalanced regulator_enable
that needs dealing with.  The bindings are pretty simple so whilst a device-tree
ack would of course be great I guess it could be taken without.

This wants to go via mfd or I suppose the freescale/arm-soc tree.  Either is fine
with me.

Jonathan
> 
> 
> Denis Carikli (2):
>   ARM: dts: imx25: Add TSC and ADC support
>   ARM: imx_v4_v5_defconfig: Add I.MX25 Touchscreen controller and ADC
>     support.
> 
> Markus Pargmann (6):
>   ARM: dt: Binding documentation for imx25 ADC/TSC
>   ARM: dt: Binding documentation for imx25 GCQ
>   ARM: dt: Binding documentation for imx25 touchscreen controller
>   mfd: fsl imx25 Touchscreen ADC driver
>   iio: adc: fsl,imx25-gcq driver
>   input: touchscreen: imx25 tcq driver
> 
>  .../devicetree/bindings/iio/adc/fsl,imx25-gcq.txt  |  54 ++
>  .../bindings/input/touchscreen/fsl-mx25-tcq.txt    |  29 +
>  .../devicetree/bindings/mfd/fsl-imx25-tsadc.txt    |  46 ++
>  arch/arm/boot/dts/imx25.dtsi                       |  30 +-
>  arch/arm/configs/imx_v4_v5_defconfig               |   4 +
>  drivers/iio/adc/Kconfig                            |   7 +
>  drivers/iio/adc/Makefile                           |   1 +
>  drivers/iio/adc/fsl-imx25-gcq.c                    | 356 +++++++++++++
>  drivers/input/touchscreen/Kconfig                  |   6 +
>  drivers/input/touchscreen/Makefile                 |   1 +
>  drivers/input/touchscreen/fsl-imx25-tcq.c          | 593 +++++++++++++++++++++
>  drivers/mfd/Kconfig                                |  10 +
>  drivers/mfd/Makefile                               |   2 +
>  drivers/mfd/fsl-imx25-tsadc.c                      | 164 ++++++
>  include/dt-bindings/iio/adc/fsl-imx25-gcq.h        |  18 +
>  include/linux/mfd/imx25-tsadc.h                    | 141 +++++
>  16 files changed, 1459 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
>  create mode 100644 Documentation/devicetree/bindings/input/touchscreen/fsl-mx25-tcq.txt
>  create mode 100644 Documentation/devicetree/bindings/mfd/fsl-imx25-tsadc.txt
>  create mode 100644 drivers/iio/adc/fsl-imx25-gcq.c
>  create mode 100644 drivers/input/touchscreen/fsl-imx25-tcq.c
>  create mode 100644 drivers/mfd/fsl-imx25-tsadc.c
>  create mode 100644 include/dt-bindings/iio/adc/fsl-imx25-gcq.h
>  create mode 100644 include/linux/mfd/imx25-tsadc.h
> 

[PATCH v7 0/8] imx25 adc and touchscreen driver

[Markus Pargmann]

On Sat, Mar 07, 2015 at 06:24:09PM +0000, Jonathan Cameron wrote:
> On 03/03/15 07:58, Markus Pargmann wrote:
> > Hi,
> > 
> > This series adds a driver for the Freescale i.MX25 SoC internal ADC unit which
> > is used for touchscreen and ADC. The driver consists of three parts, the MFD
> > driver which handles interrupts and some central configuration registers, the
> > ADC driver and the touchscreen driver.
> > 
> > v7 has some modifications in the probe functions to use devres irq requests.
> > irq checks were fixed to check for irqs <= 0. The header was cleaned up to have
> > a more uniform presentation of the bit fields. Detailed changelogs are attached
> > to the according mails.
> > 
> > Best Regards,
> > 
> > Markus
> Almost there as far as I am concerned.  Just that one unbalanced regulator_enable
> that needs dealing with.  The bindings are pretty simple so whilst a device-tree
> ack would of course be great I guess it could be taken without.
> 
> This wants to go via mfd or I suppose the freescale/arm-soc tree.  Either is fine
> with me.

Thanks for your review. I will fix the missing parts.

Best Regards,

Markus

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20150309/91c54f79/attachment.sig>