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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: Mike Leach <mike.leach@linaro.org>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org,
	peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
	linux-perf-users@vger.kernel.org, leo.yan@linaro.org,
	quic_jinlmao@quicinc.com
Subject: Re: [PATCH v3 03/13] coresight: stm: Update STM driver to use Trace ID API
Date: Fri, 7 Oct 2022 18:53:03 +0100	[thread overview]
Message-ID: <55170f1f-99f7-6e25-55d3-5d7247737afc@arm.com> (raw)
In-Reply-To: <CAJ9a7Vgz+0xEQO-MvGUzbsr_LBh4pDep7JJtFoA+cAeiAERJFw@mail.gmail.com>

On 06/10/2022 14:54, Mike Leach wrote:
> Hi Suzuki,
> 
> On Mon, 3 Oct 2022 at 10:04, Suzuki K Poulose <suzuki.poulose@arm.com> wrote:
>>
>> On 09/08/2022 23:33, Mike Leach wrote:
>>> Updates the STM driver to use the trace ID allocation API.
>>> This uses the _system_id calls to allocate an ID on device poll,
>>> and release on device remove.
>>>
>>> The sysfs access to the STMTRACEIDR register has been changed from RW
>>> to RO. Having this value as writable is not appropriate for the new
>>> Trace ID scheme - and had potential to cause errors in the previous
>>> scheme if values clashed with other sources.
>>>
>>> Signed-off-by: Mike Leach <mike.leach@linaro.org>
>>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>

>>> @@ -854,7 +830,7 @@ static void stm_init_generic_data(struct stm_drvdata *drvdata,
>>>
>>>    static int stm_probe(struct amba_device *adev, const struct amba_id *id)
>>>    {
>>> -     int ret;
>>> +     int ret, trace_id;
>>>        void __iomem *base;
>>>        struct device *dev = &adev->dev;
>>>        struct coresight_platform_data *pdata = NULL;
>>> @@ -938,12 +914,22 @@ static int stm_probe(struct amba_device *adev, const struct amba_id *id)
>>>                goto stm_unregister;
>>>        }
>>>
>>> +     trace_id = coresight_trace_id_get_system_id();
>>> +     if (trace_id < 0) {
>>
>> The above API returns "INVALID_ID" and not a negative error status.
>> I think it is better to fix the API to return:
>>
>>     ret < 0  - If there is any error
>>              - Otherwise a positive integer
>> And the users should be kept unaware of which ID is valid or invalid.
>>
> 
> coresight_trace_id_get_system_id() returns the ID if one can be
> allocated or -EINVAL if not.
> 
> Not sure what you are looking at here.

Sorry, indeed I was mistaken there. It is the get_cpu_id() which
returns the INVALID_ID on failure. Please could we make that
consistent with this scheme ? i.e, < 0 on error.

Also, please could we add a comment above the exported functions
on their entry/exit criteria ? It is not clearly evident, unless
we follow the code and figure out.

Cheers
Suzuki


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  reply	other threads:[~2022-10-07 17:54 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-09 22:33 [PATCH v3 00/13] coresight: Add new API to allocate trace source ID values Mike Leach
2022-08-09 22:33 ` [PATCH v3 01/13] coresight: trace-id: Add API to dynamically assign Trace " Mike Leach
2022-10-03  8:55   ` Suzuki K Poulose
2022-10-11 10:22     ` Mike Leach
2022-08-09 22:33 ` [PATCH v3 02/13] coresight: Remove obsolete Trace ID unniqueness checks Mike Leach
2022-10-03  8:56   ` Suzuki K Poulose
2022-08-09 22:33 ` [PATCH v3 03/13] coresight: stm: Update STM driver to use Trace ID API Mike Leach
2022-10-03  9:04   ` Suzuki K Poulose
2022-10-06 13:54     ` Mike Leach
2022-10-07 17:53       ` Suzuki K Poulose [this message]
2022-10-11 11:10         ` Mike Leach
2022-10-11 15:10           ` Suzuki K Poulose
2022-08-09 22:33 ` [PATCH v3 04/13] coresight: etm4x: Update ETM4 " Mike Leach
2022-10-03  9:31   ` Suzuki K Poulose
2022-10-03  9:37     ` Suzuki K Poulose
2022-10-06 13:47       ` Mike Leach
2022-08-09 22:33 ` [PATCH v3 05/13] coresight: etm3x: Update ETM3 " Mike Leach
2022-08-13  9:53   ` kernel test robot
2022-08-13 13:48   ` kernel test robot
2022-08-09 22:33 ` [PATCH v3 06/13] coresight: etmX.X: stm: Remove trace_id() callback Mike Leach
2022-08-09 22:33 ` [PATCH v3 07/13] coresight: perf: traceid: Add perf notifiers for Trace ID Mike Leach
2022-08-09 22:33 ` [PATCH v3 08/13] perf: cs-etm: Move mapping of Trace ID and cpu into helper function Mike Leach
2022-08-09 22:33 ` [PATCH v3 09/13] perf: cs-etm: Update record event to use new Trace ID protocol Mike Leach
2022-08-09 22:33 ` [PATCH v3 10/13] kernel: events: Export perf_report_aux_output_id() Mike Leach
2022-08-09 22:33 ` [PATCH v3 11/13] perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet Mike Leach
2022-08-09 22:34 ` [PATCH v3 12/13] coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID Mike Leach
2022-08-09 22:34 ` [PATCH v3 13/13] coresight: trace-id: Add debug & test macros to Trace ID allocation Mike Leach
2022-10-03 11:06   ` Suzuki K Poulose
2022-10-06 13:22     ` Mike Leach
2022-08-12 19:50 ` [PATCH v3 00/13] coresight: Add new API to allocate trace source ID values Arnaldo Carvalho de Melo
2022-08-15 19:04   ` Mike Leach

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