* [PATCH] arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entry
@ 2019-10-01 18:35 John Stultz
2019-10-30 9:12 ` Wei Xu
0 siblings, 1 reply; 2+ messages in thread
From: John Stultz @ 2019-10-01 18:35 UTC (permalink / raw)
To: lkml
Cc: Mark Rutland, devicetree, Wei Xu, Peter Griffin, Rob Herring,
John Stultz, linux-arm-kernel
From: Peter Griffin <peter.griffin@linaro.org>
hi6220 has a Mali450 MP4 so lets add it into the DT.
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
---
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 38 +++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 108e2a4227f6..2072b637b5af 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -260,6 +260,7 @@
compatible = "hisilicon,hi6220-aoctrl", "syscon";
reg = <0x0 0xf7800000 0x0 0x2000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
sys_ctrl: sys_ctrl@f7030000 {
@@ -1021,6 +1022,43 @@
clock-names = "apb_pclk";
cpu = <&cpu7>;
};
+
+ mali: gpu@f4080000 {
+ compatible = "hisilicon,hi6220-mali", "arm,mali-450";
+ reg = <0x0 0xf4080000 0x0 0x00040000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-names = "gp",
+ "gpmmu",
+ "pp",
+ "pp0",
+ "ppmmu0",
+ "pp1",
+ "ppmmu1",
+ "pp2",
+ "ppmmu2",
+ "pp3",
+ "ppmmu3";
+ clocks = <&media_ctrl HI6220_G3D_CLK>,
+ <&media_ctrl HI6220_G3D_PCLK>;
+ clock-names = "core", "bus";
+ assigned-clocks = <&media_ctrl HI6220_G3D_CLK>,
+ <&media_ctrl HI6220_G3D_PCLK>;
+ assigned-clock-rates = <500000000>, <144000000>;
+ reset-names = "ao_g3d", "media_g3d";
+ resets = <&ao_ctrl AO_G3D>, <&media_ctrl MEDIA_G3D>;
+ };
};
};
--
2.17.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entry
2019-10-01 18:35 [PATCH] arm64: dts: hisilicon: Add Mali-450 MP4 GPU DT entry John Stultz
@ 2019-10-30 9:12 ` Wei Xu
0 siblings, 0 replies; 2+ messages in thread
From: Wei Xu @ 2019-10-30 9:12 UTC (permalink / raw)
To: John Stultz, lkml
Cc: Peter Griffin, Mark Rutland, Rob Herring, linux-arm-kernel, devicetree
On 2019/10/2 2:35, John Stultz wrote:
> From: Peter Griffin <peter.griffin@linaro.org>
>
> hi6220 has a Mali450 MP4 so lets add it into the DT.
>
> Cc: Wei Xu <xuwei5@hisilicon.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
> Signed-off-by: John Stultz <john.stultz@linaro.org>
Thanks!
Applied to the hisilicon arm64 dt tree.
Best Regards,
Wei
> ---
> arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 38 +++++++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> index 108e2a4227f6..2072b637b5af 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
> @@ -260,6 +260,7 @@
> compatible = "hisilicon,hi6220-aoctrl", "syscon";
> reg = <0x0 0xf7800000 0x0 0x2000>;
> #clock-cells = <1>;
> + #reset-cells = <1>;
> };
>
> sys_ctrl: sys_ctrl@f7030000 {
> @@ -1021,6 +1022,43 @@
> clock-names = "apb_pclk";
> cpu = <&cpu7>;
> };
> +
> + mali: gpu@f4080000 {
> + compatible = "hisilicon,hi6220-mali", "arm,mali-450";
> + reg = <0x0 0xf4080000 0x0 0x00040000>;
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_PPI 126 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interrupt-names = "gp",
> + "gpmmu",
> + "pp",
> + "pp0",
> + "ppmmu0",
> + "pp1",
> + "ppmmu1",
> + "pp2",
> + "ppmmu2",
> + "pp3",
> + "ppmmu3";
> + clocks = <&media_ctrl HI6220_G3D_CLK>,
> + <&media_ctrl HI6220_G3D_PCLK>;
> + clock-names = "core", "bus";
> + assigned-clocks = <&media_ctrl HI6220_G3D_CLK>,
> + <&media_ctrl HI6220_G3D_PCLK>;
> + assigned-clock-rates = <500000000>, <144000000>;
> + reset-names = "ao_g3d", "media_g3d";
> + resets = <&ao_ctrl AO_G3D>, <&media_ctrl MEDIA_G3D>;
> + };
> };
> };
>
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