* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
[not found] <draft-7hd0mvu7pp.fsf@baylibre.com>
@ 2019-03-12 21:11 ` Kevin Hilman
0 siblings, 0 replies; 7+ messages in thread
From: Kevin Hilman @ 2019-03-12 21:11 UTC (permalink / raw)
To: Neil Armstrong
Cc: linux-amlogic, linux-kernel, linux-arm-kernel, Neil Armstrong
Kevin Hilman <khilman@baylibre.com> writes:
> Neil Armstrong <narmstrong@baylibre.com> writes:
>
>> This patch adds the 2 UART nodes in the EE power domain with the corresponding
>> pinctrl nodes.
>>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Similar to PATCH 4/9, are you wanting to move this to the board series?
Nevermind, I misunderstood how you were splitting up the two series.
Kevin
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-16 22:14 ` Martin Blumenstingl
@ 2019-03-17 10:42 ` Neil Armstrong
0 siblings, 0 replies; 7+ messages in thread
From: Neil Armstrong @ 2019-03-17 10:42 UTC (permalink / raw)
To: Martin Blumenstingl, Jianxin Pan
Cc: khilman, linux-kernel, linux-arm-kernel, linux-amlogic
Le 16/03/2019 23:14, Martin Blumenstingl a écrit :
> Hi Neil,
>
> On Sat, Mar 16, 2019 at 3:35 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
> [...]
>>>> + uart_ao_a_c_pins: uart_ao_a_c {
>>>> + mux {
>>>> + groups = "uart_ao_a_rx_c",
>>>> + "uart_ao_a_tx_c";
>>>> + function = "uart_ao_a_c";
>>>> + bias-disable;
>>>> + };
>>>> + };
>>> I'm fine with this part if you mention it in the subject and/or the description
>>> uart_ao_a_c routes two pins from bank C (from the EE domain) to the
>>> uart_AO controller (from the AO domain)
>>
>> Not sure DT is the right place for that, I think I'll remove this until
>> we have it actually used somewhere.
> I'm fine with that as well
>
> [...]
>>>> +
>>>> + uart_C: serial@22000 {
>>>> + compatible = "amlogic,meson-gx-uart";
>>>> + reg = <0x0 0x22000 0x0 0x18>;
>>>> + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
>>>> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
>>> does uart_C really use CLKID_UART1? on GX uart_C uses CLKID_UART2
>>
>> It seems so :
>> https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/arch/arm64/boot/dts/amlogic/mesong12a.dtsi#L1020
> it's weird but we can always fix it up later if needed. so let's keep
> it for now to stay consistent with the vendor kernel until we know
> better
>
> Jianxin, can you please check with the hardware team whether the
> uart_C gate clock (pclk) is CLKID_UART1 or CLKID_UART2 on G12A?
I think it's a typo, it should use CLKID_UART2
Neil
>
>
> Regards
> Martin
>
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-16 14:35 ` Neil Armstrong
@ 2019-03-16 22:14 ` Martin Blumenstingl
2019-03-17 10:42 ` Neil Armstrong
0 siblings, 1 reply; 7+ messages in thread
From: Martin Blumenstingl @ 2019-03-16 22:14 UTC (permalink / raw)
To: Neil Armstrong, Jianxin Pan
Cc: khilman, linux-kernel, linux-arm-kernel, linux-amlogic
Hi Neil,
On Sat, Mar 16, 2019 at 3:35 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
[...]
> >> + uart_ao_a_c_pins: uart_ao_a_c {
> >> + mux {
> >> + groups = "uart_ao_a_rx_c",
> >> + "uart_ao_a_tx_c";
> >> + function = "uart_ao_a_c";
> >> + bias-disable;
> >> + };
> >> + };
> > I'm fine with this part if you mention it in the subject and/or the description
> > uart_ao_a_c routes two pins from bank C (from the EE domain) to the
> > uart_AO controller (from the AO domain)
>
> Not sure DT is the right place for that, I think I'll remove this until
> we have it actually used somewhere.
I'm fine with that as well
[...]
> >> +
> >> + uart_C: serial@22000 {
> >> + compatible = "amlogic,meson-gx-uart";
> >> + reg = <0x0 0x22000 0x0 0x18>;
> >> + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
> >> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> > does uart_C really use CLKID_UART1? on GX uart_C uses CLKID_UART2
>
> It seems so :
> https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/arch/arm64/boot/dts/amlogic/mesong12a.dtsi#L1020
it's weird but we can always fix it up later if needed. so let's keep
it for now to stay consistent with the vendor kernel until we know
better
Jianxin, can you please check with the hardware team whether the
uart_C gate clock (pclk) is CLKID_UART1 or CLKID_UART2 on G12A?
Regards
Martin
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-15 21:24 ` Martin Blumenstingl
@ 2019-03-16 14:35 ` Neil Armstrong
2019-03-16 22:14 ` Martin Blumenstingl
0 siblings, 1 reply; 7+ messages in thread
From: Neil Armstrong @ 2019-03-16 14:35 UTC (permalink / raw)
To: Martin Blumenstingl
Cc: khilman, linux-kernel, linux-arm-kernel, linux-amlogic
Le 15/03/2019 22:24, Martin Blumenstingl a écrit :
> Hi Neil,
>
> On Thu, Mar 7, 2019 at 4:15 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>>
>> This patch adds the 2 UART nodes in the EE power domain with the corresponding
>> pinctrl nodes.
> there are 3 UART controllers in the EE power domain
Good catch !
>
>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>> ---
>> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 82 +++++++++++++++++++++
>> 1 file changed, 82 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> index 2a700bb45d04..50e2cd36e08b 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> @@ -113,6 +113,61 @@
>> #gpio-cells = <2>;
>> gpio-ranges = <&periphs_pinctrl 0 0 86>;
>> };
>> +
>> + uart_a_pins: uart_a {
> (this applies to all new nodes)
> we started using dashes for the node names for new pin definitions on
> the GX SoCs.
> I don't remember where it was discussed exactly but I think this was
> requested from Rob
Yes I remember, will fix
>
> since G12A is a new SoC we should do it "right" from the beginning
>
> [...]
>> + uart_ao_a_c_pins: uart_ao_a_c {
>> + mux {
>> + groups = "uart_ao_a_rx_c",
>> + "uart_ao_a_tx_c";
>> + function = "uart_ao_a_c";
>> + bias-disable;
>> + };
>> + };
> I'm fine with this part if you mention it in the subject and/or the description
> uart_ao_a_c routes two pins from bank C (from the EE domain) to the
> uart_AO controller (from the AO domain)
Not sure DT is the right place for that, I think I'll remove this until
we have it actually used somewhere.
>
>> + uart_b_pins: uart_b {
>> + mux {
>> + groups = "uart_b_tx",
>> + "uart_b_rx";
>> + function = "uart_b";
>> + bias-disable;
>> + };
>> + };
>> +
>> + uart_c_pins: uart_c {
>> + mux {
>> + groups = "uart_c_tx",
>> + "uart_c_rx";
>> + function = "uart_c";
>> + bias-disable;
>> + };
>> + };
>> +
>> + uart_c_cts_rts_pins: uart_c_cts_rts {
>> + mux {
>> + groups = "uart_c_cts",
>> + "uart_c_rts";
>> + function = "uart_c";
>> + bias-disable;
>> + };
>> + };
>> + };
>> };
>>
>> hiu: bus@3c000 {
>> @@ -256,6 +311,33 @@
>> compatible = "amlogic,meson-g12a-clk-measure";
>> reg = <0x0 0x18000 0x0 0x10>;
>> };
>> +
>> + uart_C: serial@22000 {
>> + compatible = "amlogic,meson-gx-uart";
>> + reg = <0x0 0x22000 0x0 0x18>;
>> + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
>> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> does uart_C really use CLKID_UART1? on GX uart_C uses CLKID_UART2
It seems so :
https://github.com/hardkernel/linux/blob/odroidn2-4.9.y/arch/arm64/boot/dts/amlogic/mesong12a.dtsi#L1020
Neil
>
>
> Regards
> Martin
>
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-07 15:13 ` [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins Neil Armstrong
2019-03-12 21:02 ` Kevin Hilman
@ 2019-03-15 21:24 ` Martin Blumenstingl
2019-03-16 14:35 ` Neil Armstrong
1 sibling, 1 reply; 7+ messages in thread
From: Martin Blumenstingl @ 2019-03-15 21:24 UTC (permalink / raw)
To: Neil Armstrong; +Cc: khilman, linux-kernel, linux-arm-kernel, linux-amlogic
Hi Neil,
On Thu, Mar 7, 2019 at 4:15 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> This patch adds the 2 UART nodes in the EE power domain with the corresponding
> pinctrl nodes.
there are 3 UART controllers in the EE power domain
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 82 +++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index 2a700bb45d04..50e2cd36e08b 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -113,6 +113,61 @@
> #gpio-cells = <2>;
> gpio-ranges = <&periphs_pinctrl 0 0 86>;
> };
> +
> + uart_a_pins: uart_a {
(this applies to all new nodes)
we started using dashes for the node names for new pin definitions on
the GX SoCs.
I don't remember where it was discussed exactly but I think this was
requested from Rob
since G12A is a new SoC we should do it "right" from the beginning
[...]
> + uart_ao_a_c_pins: uart_ao_a_c {
> + mux {
> + groups = "uart_ao_a_rx_c",
> + "uart_ao_a_tx_c";
> + function = "uart_ao_a_c";
> + bias-disable;
> + };
> + };
I'm fine with this part if you mention it in the subject and/or the description
uart_ao_a_c routes two pins from bank C (from the EE domain) to the
uart_AO controller (from the AO domain)
> + uart_b_pins: uart_b {
> + mux {
> + groups = "uart_b_tx",
> + "uart_b_rx";
> + function = "uart_b";
> + bias-disable;
> + };
> + };
> +
> + uart_c_pins: uart_c {
> + mux {
> + groups = "uart_c_tx",
> + "uart_c_rx";
> + function = "uart_c";
> + bias-disable;
> + };
> + };
> +
> + uart_c_cts_rts_pins: uart_c_cts_rts {
> + mux {
> + groups = "uart_c_cts",
> + "uart_c_rts";
> + function = "uart_c";
> + bias-disable;
> + };
> + };
> + };
> };
>
> hiu: bus@3c000 {
> @@ -256,6 +311,33 @@
> compatible = "amlogic,meson-g12a-clk-measure";
> reg = <0x0 0x18000 0x0 0x10>;
> };
> +
> + uart_C: serial@22000 {
> + compatible = "amlogic,meson-gx-uart";
> + reg = <0x0 0x22000 0x0 0x18>;
> + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
does uart_C really use CLKID_UART1? on GX uart_C uses CLKID_UART2
Regards
Martin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-07 15:13 ` [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins Neil Armstrong
@ 2019-03-12 21:02 ` Kevin Hilman
2019-03-15 21:24 ` Martin Blumenstingl
1 sibling, 0 replies; 7+ messages in thread
From: Kevin Hilman @ 2019-03-12 21:02 UTC (permalink / raw)
To: Neil Armstrong
Cc: linux-amlogic, linux-kernel, linux-arm-kernel, Neil Armstrong
Neil Armstrong <narmstrong@baylibre.com> writes:
> This patch adds the 2 UART nodes in the EE power domain with the corresponding
> pinctrl nodes.
>
> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Similar to PATCH 4/9, are you wanting to move this to the board series?
Kevin
> ---
> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 82 +++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> index 2a700bb45d04..50e2cd36e08b 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
> @@ -113,6 +113,61 @@
> #gpio-cells = <2>;
> gpio-ranges = <&periphs_pinctrl 0 0 86>;
> };
> +
> + uart_a_pins: uart_a {
> + mux {
> + groups = "uart_a_tx",
> + "uart_a_rx";
> + function = "uart_a";
> + bias-disable;
> + };
> + };
> +
> + uart_a_cts_rts_pins: uart_a_cts_rts {
> + mux {
> + groups = "uart_a_cts",
> + "uart_a_rts";
> + function = "uart_a";
> + bias-disable;
> + };
> + };
> +
> + uart_ao_a_c_pins: uart_ao_a_c {
> + mux {
> + groups = "uart_ao_a_rx_c",
> + "uart_ao_a_tx_c";
> + function = "uart_ao_a_c";
> + bias-disable;
> + };
> + };
> +
> + uart_b_pins: uart_b {
> + mux {
> + groups = "uart_b_tx",
> + "uart_b_rx";
> + function = "uart_b";
> + bias-disable;
> + };
> + };
> +
> + uart_c_pins: uart_c {
> + mux {
> + groups = "uart_c_tx",
> + "uart_c_rx";
> + function = "uart_c";
> + bias-disable;
> + };
> + };
> +
> + uart_c_cts_rts_pins: uart_c_cts_rts {
> + mux {
> + groups = "uart_c_cts",
> + "uart_c_rts";
> + function = "uart_c";
> + bias-disable;
> + };
> + };
> + };
> };
>
> hiu: bus@3c000 {
> @@ -256,6 +311,33 @@
> compatible = "amlogic,meson-g12a-clk-measure";
> reg = <0x0 0x18000 0x0 0x10>;
> };
> +
> + uart_C: serial@22000 {
> + compatible = "amlogic,meson-gx-uart";
> + reg = <0x0 0x22000 0x0 0x18>;
> + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> + status = "disabled";
> + };
> +
> + uart_B: serial@23000 {
> + compatible = "amlogic,meson-gx-uart";
> + reg = <0x0 0x23000 0x0 0x18>;
> + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> + status = "disabled";
> + };
> +
> + uart_A: serial@24000 {
> + compatible = "amlogic,meson-gx-uart";
> + reg = <0x0 0x24000 0x0 0x18>;
> + interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
> + clock-names = "xtal", "pclk", "baud";
> + status = "disabled";
> + };
> };
> };
>
> --
> 2.20.1
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^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins
2019-03-07 15:13 [PATCH 0/9] arm64: dts: g12a: Add peripherals Neil Armstrong
@ 2019-03-07 15:13 ` Neil Armstrong
2019-03-12 21:02 ` Kevin Hilman
2019-03-15 21:24 ` Martin Blumenstingl
0 siblings, 2 replies; 7+ messages in thread
From: Neil Armstrong @ 2019-03-07 15:13 UTC (permalink / raw)
To: khilman; +Cc: linux-amlogic, linux-kernel, linux-arm-kernel, Neil Armstrong
This patch adds the 2 UART nodes in the EE power domain with the corresponding
pinctrl nodes.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 82 +++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index 2a700bb45d04..50e2cd36e08b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -113,6 +113,61 @@
#gpio-cells = <2>;
gpio-ranges = <&periphs_pinctrl 0 0 86>;
};
+
+ uart_a_pins: uart_a {
+ mux {
+ groups = "uart_a_tx",
+ "uart_a_rx";
+ function = "uart_a";
+ bias-disable;
+ };
+ };
+
+ uart_a_cts_rts_pins: uart_a_cts_rts {
+ mux {
+ groups = "uart_a_cts",
+ "uart_a_rts";
+ function = "uart_a";
+ bias-disable;
+ };
+ };
+
+ uart_ao_a_c_pins: uart_ao_a_c {
+ mux {
+ groups = "uart_ao_a_rx_c",
+ "uart_ao_a_tx_c";
+ function = "uart_ao_a_c";
+ bias-disable;
+ };
+ };
+
+ uart_b_pins: uart_b {
+ mux {
+ groups = "uart_b_tx",
+ "uart_b_rx";
+ function = "uart_b";
+ bias-disable;
+ };
+ };
+
+ uart_c_pins: uart_c {
+ mux {
+ groups = "uart_c_tx",
+ "uart_c_rx";
+ function = "uart_c";
+ bias-disable;
+ };
+ };
+
+ uart_c_cts_rts_pins: uart_c_cts_rts {
+ mux {
+ groups = "uart_c_cts",
+ "uart_c_rts";
+ function = "uart_c";
+ bias-disable;
+ };
+ };
+ };
};
hiu: bus@3c000 {
@@ -256,6 +311,33 @@
compatible = "amlogic,meson-g12a-clk-measure";
reg = <0x0 0x18000 0x0 0x10>;
};
+
+ uart_C: serial@22000 {
+ compatible = "amlogic,meson-gx-uart";
+ reg = <0x0 0x22000 0x0 0x18>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+
+ uart_B: serial@23000 {
+ compatible = "amlogic,meson-gx-uart";
+ reg = <0x0 0x23000 0x0 0x18>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
+
+ uart_A: serial@24000 {
+ compatible = "amlogic,meson-gx-uart";
+ reg = <0x0 0x24000 0x0 0x18>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
+ clock-names = "xtal", "pclk", "baud";
+ status = "disabled";
+ };
};
};
--
2.20.1
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^ permalink raw reply related [flat|nested] 7+ messages in thread
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[not found] <draft-7hd0mvu7pp.fsf@baylibre.com>
2019-03-12 21:11 ` [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins Kevin Hilman
2019-03-07 15:13 [PATCH 0/9] arm64: dts: g12a: Add peripherals Neil Armstrong
2019-03-07 15:13 ` [PATCH 6/9] arm64: dts: meson: g12a: Add UART A, B & C nodes and pins Neil Armstrong
2019-03-12 21:02 ` Kevin Hilman
2019-03-15 21:24 ` Martin Blumenstingl
2019-03-16 14:35 ` Neil Armstrong
2019-03-16 22:14 ` Martin Blumenstingl
2019-03-17 10:42 ` Neil Armstrong
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