* [PATCH] arm64: add Cortex-A76 to spectre v2 safe-list
@ 2020-01-12 15:10 Chanho Park
2020-01-13 9:22 ` Marc Zyngier
0 siblings, 1 reply; 2+ messages in thread
From: Chanho Park @ 2020-01-12 15:10 UTC (permalink / raw)
To: catalin.marinas, will; +Cc: maz, linux-arm-kernel, Chanho Park
Cortex A76(Enyo) core can be added in spectre v2(CVE-2017-5715 (Spectre,
Variant 2, Branch Target Injection) safe list.
Signed-off-by: Chanho Park <parkch98@gmail.com>
---
arch/arm64/kernel/cpu_errata.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index 85f4bec22f6d..9895d56bf5ac 100644
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -546,6 +546,7 @@ static const struct midr_range spectre_v2_safe_list[] = {
MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
{ /* sentinel */ }
--
2.17.1
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^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] arm64: add Cortex-A76 to spectre v2 safe-list
2020-01-12 15:10 [PATCH] arm64: add Cortex-A76 to spectre v2 safe-list Chanho Park
@ 2020-01-13 9:22 ` Marc Zyngier
0 siblings, 0 replies; 2+ messages in thread
From: Marc Zyngier @ 2020-01-13 9:22 UTC (permalink / raw)
To: Chanho Park; +Cc: catalin.marinas, will, linux-arm-kernel
On 2020-01-12 15:10, Chanho Park wrote:
> Cortex A76(Enyo) core can be added in spectre v2(CVE-2017-5715
> (Spectre,
> Variant 2, Branch Target Injection) safe list.
>
> Signed-off-by: Chanho Park <parkch98@gmail.com>
> ---
> arch/arm64/kernel/cpu_errata.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/kernel/cpu_errata.c
> b/arch/arm64/kernel/cpu_errata.c
> index 85f4bec22f6d..9895d56bf5ac 100644
> --- a/arch/arm64/kernel/cpu_errata.c
> +++ b/arch/arm64/kernel/cpu_errata.c
> @@ -546,6 +546,7 @@ static const struct midr_range
> spectre_v2_safe_list[] = {
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
> + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
> MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
> MIDR_ALL_VERSIONS(MIDR_HISI_TSV110),
> { /* sentinel */ }
Why? Doesn't Cortex-A76 already advertize ID_AA64PFR0_EL1.CSV2?
M.
--
Jazz is not dead. It just smells funny...
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^ permalink raw reply [flat|nested] 2+ messages in thread
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2020-01-13 9:22 ` Marc Zyngier
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