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From: Marc Zyngier <maz@kernel.org>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: "Marek Behún" <kabel@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <helgaas@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	pali@kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, tglx@linutronix.de
Subject: Re: [PATCH 03/11] PCI: aardvark: Add support for DLLSC and hotplug interrupt
Date: Mon, 26 Sep 2022 08:35:51 -0400	[thread overview]
Message-ID: <868rm68g9k.wl-maz@kernel.org> (raw)
In-Reply-To: <YzGR40/kmQX4ZNaS@lpieralisi>

On Mon, 26 Sep 2022 07:49:55 -0400,
Lorenzo Pieralisi <lpieralisi@kernel.org> wrote:
> 
> On Sat, Sep 17, 2022 at 10:05:59AM +0100, Marc Zyngier wrote:
> > Hi Lorenzo,
> > 
> > On Fri, 09 Sep 2022 15:57:11 +0100,
> > Lorenzo Pieralisi <lpieralisi@kernel.org> wrote:
> > > 
> > > [+Marc, Thomas - I can't merge this code without them reviewing it,
> > > I am not sure at all you can mix the timer/IRQ code the way you do]
> > > 
> > > On Thu, Aug 18, 2022 at 03:51:32PM +0200, Marek Behún wrote:
> > > > From: Pali Rohár <pali@kernel.org>
> > > > 
> > > > Add support for Data Link Layer State Change in the emulated slot
> > > > registers and hotplug interrupt via the emulated root bridge.
> > > > 
> > > > This is mainly useful for when an error causes link down event. With
> > > > this change, drivers can try recovery.
> > > > 
> > > > Link down state change can be implemented because Aardvark supports Link
> > > > Down event interrupt. Use it for signaling that Data Link Layer Link is
> > > > not active anymore via Hot-Plug Interrupt on emulated root bridge.
> > > > 
> > > > Link up interrupt is not available on Aardvark, but we check for whether
> > > > link is up in the advk_pcie_link_up() function. By triggering Hot-Plug
> > > > Interrupt from this function we achieve Link up event, so long as the
> > > > function is called (which it is after probe and when rescanning).
> > > > Although it is not ideal, it is better than nothing.
> > > 
> > > So before even coming to the code review: this patch does two things.
> > > 
> > > 1) It adds support for handling the Link down state
> > > 2) It adds some code to emulate a Link-up event
> > > 
> > > Now, for (2). IIUC you are adding code to make sure that an HP
> > > event is triggered if advk_pcie_link_up() is called and it
> > > detects a Link-down->Link-up transition, that has to be notified
> > > through an HP event.
> > > 
> > > If that's correct, you have to explain to me please what this is
> > > actually achieving and a specific scenario where we want this to be
> > > implemented, in fine details; then we add it to the commit log.
> > > 
> > > That aside, the interaction of the timer and the IRQ domain code
> > > must be reviewed by Marc and Thomas to make sure this is not
> > > a gross violation of the respective subsystems usage.
> > 
> > I don't see anything being a "gross violation" here, at least from an
> > interrupt subsystem perspective. In a way, this is synthesising an
> > interrupt on the back of some other event, and as long as the context
> > is somehow appropriate (something that looks like an interrupt when
> > pretending there is one), this should be OK. Other subsystems such as
> > i2c GPIO expanders do similar things.
> 
> Right, thanks.
> 
> > The one thing I'm dubious about is the frequency of the timer. Asking
> > for a poll of the link every jiffy is bound to be expensive, and it
> > would be good to relax this as much as possible, specially on low-end
> > HW such as this, where every cycle counts. It is always going to be a
> > "best effort" thing, and the commit message doesn't say what's the
> > actual grace period to handle this (the spec probably has one).
> 
> AFAICS, the code does not poll the link. It sets a timer only if
> the link is checked (eg upon PCI bus forced rescan or config access)
> the link is up and it was down, to emulate a HP IRQ.

I still find the timer frequency pretty high, but surely the authors
of the code have worked out that this wasn't a problem.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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  reply	other threads:[~2022-09-26 12:37 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 13:51 [PATCH 00/11] PCI: aardvark controller changes BATCH 6 Marek Behún
2022-08-18 13:51 ` [PATCH 01/11] PCI: pciehp: Enable DLLSC interrupt only if supported Marek Behún
     [not found]   ` <20220821124621.GA23239@wunner.de>
2022-08-22 10:37     ` Marek Behún
2022-08-18 13:51 ` [PATCH 02/11] PCI: pciehp: Enable Command Completed Interrupt " Marek Behún
2022-09-28  8:39   ` Lorenzo Pieralisi
2022-08-18 13:51 ` [PATCH 03/11] PCI: aardvark: Add support for DLLSC and hotplug interrupt Marek Behún
2022-09-09 14:57   ` Lorenzo Pieralisi
2022-09-16 16:23     ` Marek Behún
2022-09-27  8:29       ` Lorenzo Pieralisi
2022-09-27 11:13         ` Pali Rohár
2022-09-27 15:57           ` Lorenzo Pieralisi
2022-09-17  9:05     ` Marc Zyngier
2022-09-26 11:49       ` Lorenzo Pieralisi
2022-09-26 12:35         ` Marc Zyngier [this message]
2022-09-26 14:00           ` Lorenzo Pieralisi
2022-09-27 13:40             ` Marek Behún
2022-08-18 13:51 ` [PATCH 04/11] PCI: aardvark: Send Set_Slot_Power_Limit message Marek Behún
2022-08-18 13:51 ` [PATCH 05/11] arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe Marek Behún
2022-08-18 13:51 ` [PATCH 06/11] PCI: aardvark: Add clock support Marek Behún
2022-08-18 13:51 ` [PATCH 07/11] PCI: aardvark: Add suspend to RAM support Marek Behún
2022-09-09 10:33   ` Lorenzo Pieralisi
2022-09-27  8:30     ` Lorenzo Pieralisi
2022-08-18 13:51 ` [PATCH 08/11] PCI: aardvark: Replace custom PCIE_CORE_ERR_CAPCTL_* macros by linux/pci_regs.h macros Marek Behún
2022-08-18 13:51 ` [PATCH 09/11] PCI: aardvark: Don't write read-only bits explicitly in PCI_ERR_CAP register Marek Behún
2022-08-18 13:51 ` [PATCH 10/11] PCI: aardvark: Explicitly disable Marvell strict ordering Marek Behún
2022-08-18 13:51 ` [PATCH 11/11] PCI: aardvark: Cleanup some register macros Marek Behún

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