* [PATCH] arm64: dts: meson: Add capacity-dmips-mhz attributes to G12B
@ 2019-09-14 2:49 Christian Hewitt
2019-09-19 9:47 ` Neil Armstrong
2019-09-24 19:10 ` Kevin Hilman
0 siblings, 2 replies; 3+ messages in thread
From: Christian Hewitt @ 2019-09-14 2:49 UTC (permalink / raw)
To: Rob Herring, Mark Rutland, Kevin Hilman, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Frank Hartung, Christian Hewitt
From: Frank Hartung <supervisedthinking@gmail.com>
From: Frank Hartung <supervisedthinking@gmail.com>
Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs
are equal; the A53s cores are weaker than the A72s.
Include capacity-dmips-mhz properties to tell the OS there is a difference
in processing capacity. The dmips values are based on similar submissions for
other A53/A72 SoCs: HiSilicon 3660 [1] and Rockchip RK3399 [2].
This change is particularly beneficial for use-cases like retro gaming where
emulators often run on a single core. The OS now chooses an A72 core instead
of an A53 core.
[1] https://lore.kernel.org/patchwork/patch/862742/
[2] https://patchwork.kernel.org/patch/10836577/
Signed-off-by: Frank Hartung <supervisedthinking@gmail.com>
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
---
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
index 5628ccd..7f78d88 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -49,6 +49,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
+ capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
};
@@ -57,6 +58,7 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
+ capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
};
@@ -65,6 +67,7 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x100>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
};
@@ -73,6 +76,7 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x101>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
};
@@ -81,6 +85,7 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x102>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
};
@@ -89,6 +94,7 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x103>;
enable-method = "psci";
+ capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
};
--
2.7.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: meson: Add capacity-dmips-mhz attributes to G12B
2019-09-14 2:49 [PATCH] arm64: dts: meson: Add capacity-dmips-mhz attributes to G12B Christian Hewitt
@ 2019-09-19 9:47 ` Neil Armstrong
2019-09-24 19:10 ` Kevin Hilman
1 sibling, 0 replies; 3+ messages in thread
From: Neil Armstrong @ 2019-09-19 9:47 UTC (permalink / raw)
To: Christian Hewitt, Rob Herring, Mark Rutland, Kevin Hilman,
devicetree, linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Frank Hartung
On 14/09/2019 04:49, Christian Hewitt wrote:
> From: Frank Hartung <supervisedthinking@gmail.com>
>
> From: Frank Hartung <supervisedthinking@gmail.com>
>
> Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs
> are equal; the A53s cores are weaker than the A72s.
>
> Include capacity-dmips-mhz properties to tell the OS there is a difference
> in processing capacity. The dmips values are based on similar submissions for
> other A53/A72 SoCs: HiSilicon 3660 [1] and Rockchip RK3399 [2].
>
> This change is particularly beneficial for use-cases like retro gaming where
> emulators often run on a single core. The OS now chooses an A72 core instead
> of an A53 core.
>
> [1] https://lore.kernel.org/patchwork/patch/862742/
> [2] https://patchwork.kernel.org/patch/10836577/
>
> Signed-off-by: Frank Hartung <supervisedthinking@gmail.com>
> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> index 5628ccd..7f78d88 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
> @@ -49,6 +49,7 @@
> compatible = "arm,cortex-a53";
> reg = <0x0 0x0>;
> enable-method = "psci";
> + capacity-dmips-mhz = <592>;
> next-level-cache = <&l2>;
> };
>
> @@ -57,6 +58,7 @@
> compatible = "arm,cortex-a53";
> reg = <0x0 0x1>;
> enable-method = "psci";
> + capacity-dmips-mhz = <592>;
> next-level-cache = <&l2>;
> };
>
> @@ -65,6 +67,7 @@
> compatible = "arm,cortex-a73";
> reg = <0x0 0x100>;
> enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> next-level-cache = <&l2>;
> };
>
> @@ -73,6 +76,7 @@
> compatible = "arm,cortex-a73";
> reg = <0x0 0x101>;
> enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> next-level-cache = <&l2>;
> };
>
> @@ -81,6 +85,7 @@
> compatible = "arm,cortex-a73";
> reg = <0x0 0x102>;
> enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> next-level-cache = <&l2>;
> };
>
> @@ -89,6 +94,7 @@
> compatible = "arm,cortex-a73";
> reg = <0x0 0x103>;
> enable-method = "psci";
> + capacity-dmips-mhz = <1024>;
> next-level-cache = <&l2>;
> };
>
>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: meson: Add capacity-dmips-mhz attributes to G12B
2019-09-14 2:49 [PATCH] arm64: dts: meson: Add capacity-dmips-mhz attributes to G12B Christian Hewitt
2019-09-19 9:47 ` Neil Armstrong
@ 2019-09-24 19:10 ` Kevin Hilman
1 sibling, 0 replies; 3+ messages in thread
From: Kevin Hilman @ 2019-09-24 19:10 UTC (permalink / raw)
To: Christian Hewitt, Rob Herring, Mark Rutland, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
Cc: Frank Hartung, Christian Hewitt
Christian Hewitt <christianshewitt@gmail.com> writes:
> From: Frank Hartung <supervisedthinking@gmail.com>
>
> From: Frank Hartung <supervisedthinking@gmail.com>
nit: duplicate From line. Removed when applying.
> Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs
> are equal; the A53s cores are weaker than the A72s.
>
> Include capacity-dmips-mhz properties to tell the OS there is a difference
> in processing capacity. The dmips values are based on similar submissions for
> other A53/A72 SoCs: HiSilicon 3660 [1] and Rockchip RK3399 [2].
>
> This change is particularly beneficial for use-cases like retro gaming where
> emulators often run on a single core. The OS now chooses an A72 core instead
> of an A53 core.
>
> [1] https://lore.kernel.org/patchwork/patch/862742/
> [2] https://patchwork.kernel.org/patch/10836577/
>
> Signed-off-by: Frank Hartung <supervisedthinking@gmail.com>
> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Queued for v5.5,
Thanks!
Kevin
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 3+ messages in thread
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