* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
@ 2017-06-07 17:45 Troy Kisky
2017-06-07 17:45 ` [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz Troy Kisky
2017-06-15 3:38 ` [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Shawn Guo
0 siblings, 2 replies; 13+ messages in thread
From: Troy Kisky @ 2017-06-07 17:45 UTC (permalink / raw)
To: linux-arm-kernel
No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx7d-sdb.dts | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 54c4540..cab9208 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -591,7 +591,7 @@
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x59
- MX7D_PAD_SD1_CLK__SD1_CLK 0x19
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x09
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
@@ -605,7 +605,7 @@
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
- MX7D_PAD_SD2_CLK__SD2_CLK 0x19
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x09
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
@@ -616,7 +616,7 @@
pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
- MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
@@ -627,7 +627,7 @@
pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
- MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x0b
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
@@ -639,7 +639,7 @@
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
- MX7D_PAD_SD3_CLK__SD3_CLK 0x19
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x09
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
@@ -655,7 +655,7 @@
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
- MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
@@ -671,7 +671,7 @@
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
- MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x0b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz
2017-06-07 17:45 [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Troy Kisky
@ 2017-06-07 17:45 ` Troy Kisky
2017-06-15 3:39 ` Shawn Guo
2017-06-15 3:38 ` [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Shawn Guo
1 sibling, 1 reply; 13+ messages in thread
From: Troy Kisky @ 2017-06-07 17:45 UTC (permalink / raw)
To: linux-arm-kernel
It does not make sense that 100 Mhz pad settings would use a x2
setting and 50 Mhz would use a x4 setting, so swap.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
---
arch/arm/boot/dts/imx7d-sdb.dts | 72 ++++++++++++++++++++---------------------
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index cab9208..70dcbf4 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -590,31 +590,20 @@
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
- MX7D_PAD_SD1_CMD__SD1_CMD 0x59
- MX7D_PAD_SD1_CLK__SD1_CLK 0x09
- MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
- MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
- MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
- MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
- MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
- MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
- MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x0a
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
+ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x5a /* CD */
+ MX7D_PAD_SD1_WP__GPIO5_IO1 0x5a /* WP */
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x5a /* vmmc */
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
- MX7D_PAD_SD2_CMD__SD2_CMD 0x59
- MX7D_PAD_SD2_CLK__SD2_CLK 0x09
- MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
- MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
- MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
- MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
- fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
@@ -624,6 +613,17 @@
>;
};
+ pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD2_CMD__SD2_CMD 0x59
+ MX7D_PAD_SD2_CLK__SD2_CLK 0x09
+ MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
+ MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
+ MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
+ MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
+ >;
+ };
+
pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
@@ -638,22 +638,6 @@
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
- MX7D_PAD_SD3_CMD__SD3_CMD 0x59
- MX7D_PAD_SD3_CLK__SD3_CLK 0x09
- MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
- MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
- MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
- MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
- MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
- MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
- MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
- MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
- MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
- >;
- };
-
- pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
- fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
@@ -668,6 +652,22 @@
>;
};
+ pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+ fsl,pins = <
+ MX7D_PAD_SD3_CMD__SD3_CMD 0x59
+ MX7D_PAD_SD3_CLK__SD3_CLK 0x09
+ MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
+ MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
+ MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
+ MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
+ MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
+ MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
+ MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
+ MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
+ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
+ >;
+ };
+
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
--
2.7.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-07 17:45 [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Troy Kisky
2017-06-07 17:45 ` [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz Troy Kisky
@ 2017-06-15 3:38 ` Shawn Guo
2017-06-15 4:31 ` A.s. Dong
1 sibling, 1 reply; 13+ messages in thread
From: Shawn Guo @ 2017-06-15 3:38 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jun 07, 2017 at 10:45:41AM -0700, Troy Kisky wrote:
> No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add Dong and Frank who may help to confirm.
Shawn
> ---
> arch/arm/boot/dts/imx7d-sdb.dts | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index 54c4540..cab9208 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -591,7 +591,7 @@
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> MX7D_PAD_SD1_CMD__SD1_CMD 0x59
> - MX7D_PAD_SD1_CLK__SD1_CLK 0x19
> + MX7D_PAD_SD1_CLK__SD1_CLK 0x09
> MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
> MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
> MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
> @@ -605,7 +605,7 @@
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> - MX7D_PAD_SD2_CLK__SD2_CLK 0x19
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> @@ -616,7 +616,7 @@
> pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
> @@ -627,7 +627,7 @@
> pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0b
> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
> @@ -639,7 +639,7 @@
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> - MX7D_PAD_SD3_CLK__SD3_CLK 0x19
> + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> @@ -655,7 +655,7 @@
> pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
> @@ -671,7 +671,7 @@
> pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0b
> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz
2017-06-07 17:45 ` [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz Troy Kisky
@ 2017-06-15 3:39 ` Shawn Guo
2017-06-15 4:52 ` A.s. Dong
0 siblings, 1 reply; 13+ messages in thread
From: Shawn Guo @ 2017-06-15 3:39 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Jun 07, 2017 at 10:45:42AM -0700, Troy Kisky wrote:
> It does not make sense that 100 Mhz pad settings would use a x2
> setting and 50 Mhz would use a x4 setting, so swap.
>
> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add Dong and Frank for this one as well.
Shawn
> ---
> arch/arm/boot/dts/imx7d-sdb.dts | 72 ++++++++++++++++++++---------------------
> 1 file changed, 36 insertions(+), 36 deletions(-)
>
> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
> index cab9208..70dcbf4 100644
> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> @@ -590,31 +590,20 @@
>
> pinctrl_usdhc1: usdhc1grp {
> fsl,pins = <
> - MX7D_PAD_SD1_CMD__SD1_CMD 0x59
> - MX7D_PAD_SD1_CLK__SD1_CLK 0x09
> - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
> - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
> - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
> - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
> - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
> - MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
> - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
> + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
> + MX7D_PAD_SD1_CLK__SD1_CLK 0x0a
> + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
> + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
> + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
> + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
> + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x5a /* CD */
> + MX7D_PAD_SD1_WP__GPIO5_IO1 0x5a /* WP */
> + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x5a /* vmmc */
> >;
> };
>
> pinctrl_usdhc2: usdhc2grp {
> fsl,pins = <
> - MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> - MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> - >;
> - };
> -
> - pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> - fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
> MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
> @@ -624,6 +613,17 @@
> >;
> };
>
> + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> + fsl,pins = <
> + MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> + >;
> + };
> +
> pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
> fsl,pins = <
> MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
> @@ -638,22 +638,6 @@
>
> pinctrl_usdhc3: usdhc3grp {
> fsl,pins = <
> - MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> - MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
> - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
> - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
> - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
> - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
> - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
> - >;
> - };
> -
> - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> - fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
> MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
> @@ -668,6 +652,22 @@
> >;
> };
>
> + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> + fsl,pins = <
> + MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
> + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
> + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
> + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
> + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
> + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
> + >;
> + };
> +
> pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
> fsl,pins = <
> MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
> --
> 2.7.4
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-15 3:38 ` [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Shawn Guo
@ 2017-06-15 4:31 ` A.s. Dong
2017-06-15 17:46 ` Troy Kisky
0 siblings, 1 reply; 13+ messages in thread
From: A.s. Dong @ 2017-06-15 4:31 UTC (permalink / raw)
To: linux-arm-kernel
Hi Troy,
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Thursday, June 15, 2017 11:39 AM
> To: Troy Kisky; A.s. Dong; Frank Li
> Cc: shawn.guo at linaro.org; Fabio Estevam; gary.bisson at boundarydevices.com;
> linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down
> on USDHCx clock
>
> On Wed, Jun 07, 2017 at 10:45:41AM -0700, Troy Kisky wrote:
> > No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
> >
I saw the mx7d evk clk resistor pull-down is DNP,
then why we disable internal pad pull-down?
Regards
Dong Aisheng
> > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>
> Add Dong and Frank who may help to confirm.
>
> Shawn
>
> > ---
> > arch/arm/boot/dts/imx7d-sdb.dts | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/imx7d-sdb.dts
> > b/arch/arm/boot/dts/imx7d-sdb.dts index 54c4540..cab9208 100644
> > --- a/arch/arm/boot/dts/imx7d-sdb.dts
> > +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> > @@ -591,7 +591,7 @@
> > pinctrl_usdhc1: usdhc1grp {
> > fsl,pins = <
> > MX7D_PAD_SD1_CMD__SD1_CMD 0x59
> > - MX7D_PAD_SD1_CLK__SD1_CLK 0x19
> > + MX7D_PAD_SD1_CLK__SD1_CLK 0x09
> > MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
> > MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
> > MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
> > @@ -605,7 +605,7 @@
> > pinctrl_usdhc2: usdhc2grp {
> > fsl,pins = <
> > MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> > - MX7D_PAD_SD2_CLK__SD2_CLK 0x19
> > + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> > MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> > MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> > MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> > @@ -616,7 +616,7 @@
> > pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> > fsl,pins = <
> > MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
> > - MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
> > + MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
> > MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
> > MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
> > MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
> > @@ -627,7 +627,7 @@
> > pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
> > fsl,pins = <
> > MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
> > - MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
> > + MX7D_PAD_SD2_CLK__SD2_CLK 0x0b
> > MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
> > MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
> > MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
> > @@ -639,7 +639,7 @@
> > pinctrl_usdhc3: usdhc3grp {
> > fsl,pins = <
> > MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> > - MX7D_PAD_SD3_CLK__SD3_CLK 0x19
> > + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> > MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> > MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> > MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> > @@ -655,7 +655,7 @@
> > pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> > fsl,pins = <
> > MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
> > - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
> > + MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
> > MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
> > MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
> > MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
> > @@ -671,7 +671,7 @@
> > pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
> > fsl,pins = <
> > MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
> > - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
> > + MX7D_PAD_SD3_CLK__SD3_CLK 0x0b
> > MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
> > MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
> > MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
> > --
> > 2.7.4
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz
2017-06-15 3:39 ` Shawn Guo
@ 2017-06-15 4:52 ` A.s. Dong
0 siblings, 0 replies; 13+ messages in thread
From: A.s. Dong @ 2017-06-15 4:52 UTC (permalink / raw)
To: linux-arm-kernel
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: Thursday, June 15, 2017 11:40 AM
> To: Troy Kisky; A.s. Dong; Frank Li
> Cc: shawn.guo at linaro.org; Fabio Estevam; gary.bisson at boundarydevices.com;
> linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for
> USDHCx 50Mhz and 100Mhz
>
> On Wed, Jun 07, 2017 at 10:45:42AM -0700, Troy Kisky wrote:
> > It does not make sense that 100 Mhz pad settings would use a x2
> > setting and 50 Mhz would use a x4 setting, so swap.
> >
> > Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>
> Add Dong and Frank for this one as well.
>
I'm ok with this one.
But you need double check PATCH 1/2 as CLK part in this one depends on it.
Regards
Dong Aisheng
> Shawn
>
> > ---
> > arch/arm/boot/dts/imx7d-sdb.dts | 72
> > ++++++++++++++++++++---------------------
> > 1 file changed, 36 insertions(+), 36 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/imx7d-sdb.dts
> > b/arch/arm/boot/dts/imx7d-sdb.dts index cab9208..70dcbf4 100644
> > --- a/arch/arm/boot/dts/imx7d-sdb.dts
> > +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> > @@ -590,31 +590,20 @@
> >
> > pinctrl_usdhc1: usdhc1grp {
> > fsl,pins = <
> > - MX7D_PAD_SD1_CMD__SD1_CMD 0x59
> > - MX7D_PAD_SD1_CLK__SD1_CLK 0x09
> > - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
> > - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
> > - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
> > - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
> > - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x59 /* CD */
> > - MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
> > - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /*
> vmmc */
> > + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
> > + MX7D_PAD_SD1_CLK__SD1_CLK 0x0a
> > + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
> > + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
> > + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
> > + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
> > + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x5a /* CD */
> > + MX7D_PAD_SD1_WP__GPIO5_IO1 0x5a /* WP */
> > + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x5a /*
> vmmc */
> > >;
> > };
> >
> > pinctrl_usdhc2: usdhc2grp {
> > fsl,pins = <
> > - MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> > - MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> > - MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> > - MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> > - MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> > - MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> > - >;
> > - };
> > -
> > - pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> > - fsl,pins = <
> > MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
> > MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
> > MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
> > @@ -624,6 +613,17 @@
> > >;
> > };
> >
> > + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> > + fsl,pins = <
> > + MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> > + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> > + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> > + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> > + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> > + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
> > + >;
> > + };
> > +
> > pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
> > fsl,pins = <
> > MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
> > @@ -638,22 +638,6 @@
> >
> > pinctrl_usdhc3: usdhc3grp {
> > fsl,pins = <
> > - MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> > - MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> > - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> > - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> > - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> > - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
> > - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
> > - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
> > - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
> > - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
> > - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
> > - >;
> > - };
> > -
> > - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> > - fsl,pins = <
> > MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
> > MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
> > MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
> > @@ -668,6 +652,22 @@
> > >;
> > };
> >
> > + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> > + fsl,pins = <
> > + MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> > + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> > + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> > + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> > + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> > + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
> > + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
> > + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
> > + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
> > + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
> > + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
> > + >;
> > + };
> > +
> > pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
> > fsl,pins = <
> > MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
> > --
> > 2.7.4
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel at lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-15 4:31 ` A.s. Dong
@ 2017-06-15 17:46 ` Troy Kisky
2017-06-27 5:32 ` A.s. Dong
0 siblings, 1 reply; 13+ messages in thread
From: Troy Kisky @ 2017-06-15 17:46 UTC (permalink / raw)
To: linux-arm-kernel
On 6/14/2017 9:31 PM, A.s. Dong wrote:
> Hi Troy,
>
>> -----Original Message-----
>> From: Shawn Guo [mailto:shawnguo at kernel.org]
>> Sent: Thursday, June 15, 2017 11:39 AM
>> To: Troy Kisky; A.s. Dong; Frank Li
>> Cc: shawn.guo at linaro.org; Fabio Estevam; gary.bisson at boundarydevices.com;
>> linux-arm-kernel at lists.infradead.org
>> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down
>> on USDHCx clock
>>
>> On Wed, Jun 07, 2017 at 10:45:41AM -0700, Troy Kisky wrote:
>>> No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
>>>
>
> I saw the mx7d evk clk resistor pull-down is DNP,
> then why we disable internal pad pull-down?
That sounds like a very good reason to disable to me.
Why rely on a DNP? Also, consistency with imx6 is nice.
>
> Regards
> Dong Aisheng
>
>>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
>>
>> Add Dong and Frank who may help to confirm.
>>
>> Shawn
>>
>>> ---
>>> arch/arm/boot/dts/imx7d-sdb.dts | 14 +++++++-------
>>> 1 file changed, 7 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts
>>> b/arch/arm/boot/dts/imx7d-sdb.dts index 54c4540..cab9208 100644
>>> --- a/arch/arm/boot/dts/imx7d-sdb.dts
>>> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
>>> @@ -591,7 +591,7 @@
>>> pinctrl_usdhc1: usdhc1grp {
>>> fsl,pins = <
>>> MX7D_PAD_SD1_CMD__SD1_CMD 0x59
>>> - MX7D_PAD_SD1_CLK__SD1_CLK 0x19
>>> + MX7D_PAD_SD1_CLK__SD1_CLK 0x09
>>> MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
>>> MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
>>> MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
>>> @@ -605,7 +605,7 @@
>>> pinctrl_usdhc2: usdhc2grp {
>>> fsl,pins = <
>>> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
>>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x19
>>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
>>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
>>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
>>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
>>> @@ -616,7 +616,7 @@
>>> pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
>>> fsl,pins = <
>>> MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
>>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
>>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
>>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
>>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
>>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
>>> @@ -627,7 +627,7 @@
>>> pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
>>> fsl,pins = <
>>> MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
>>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
>>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0b
>>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
>>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
>>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
>>> @@ -639,7 +639,7 @@
>>> pinctrl_usdhc3: usdhc3grp {
>>> fsl,pins = <
>>> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
>>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x19
>>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
>>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
>>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
>>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
>>> @@ -655,7 +655,7 @@
>>> pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
>>> fsl,pins = <
>>> MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
>>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
>>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
>>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
>>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
>>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
>>> @@ -671,7 +671,7 @@
>>> pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
>>> fsl,pins = <
>>> MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
>>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
>>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0b
>>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
>>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
>>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
>>> --
>>> 2.7.4
>>>
>>>
>>> _______________________________________________
>>> linux-arm-kernel mailing list
>>> linux-arm-kernel at lists.infradead.org
>>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-15 17:46 ` Troy Kisky
@ 2017-06-27 5:32 ` A.s. Dong
2017-06-27 20:22 ` Troy Kisky
2017-06-27 23:49 ` Fabio Estevam
0 siblings, 2 replies; 13+ messages in thread
From: A.s. Dong @ 2017-06-27 5:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi Troy,
> -----Original Message-----
> From: Troy Kisky [mailto:troy.kisky at boundarydevices.com]
> Sent: Friday, June 16, 2017 1:46 AM
> To: A.s. Dong; Shawn Guo; Frank Li
> Cc: shawn.guo at linaro.org; Fabio Estevam; gary.bisson at boundarydevices.com;
> linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down
> on USDHCx clock
>
> On 6/14/2017 9:31 PM, A.s. Dong wrote:
> > Hi Troy,
> >
> >> -----Original Message-----
> >> From: Shawn Guo [mailto:shawnguo at kernel.org]
> >> Sent: Thursday, June 15, 2017 11:39 AM
> >> To: Troy Kisky; A.s. Dong; Frank Li
> >> Cc: shawn.guo at linaro.org; Fabio Estevam;
> >> gary.bisson at boundarydevices.com; linux-arm-kernel at lists.infradead.org
> >> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k
> >> pull-down on USDHCx clock
> >>
> >> On Wed, Jun 07, 2017 at 10:45:41AM -0700, Troy Kisky wrote:
> >>> No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
> >>>
> >
> > I saw the mx7d evk clk resistor pull-down is DNP, then why we disable
> > internal pad pull-down?
>
>
> That sounds like a very good reason to disable to me.
> Why rely on a DNP? Also, consistency with imx6 is nice.
>
Sorry missed your reply.
Not quite understand your point.
We would like to pull down the clk signal in default state,
But due to the board pull-down resistor is DNP (not exist),
That's why we use internal pull down function instead.
Regards
Dong Aisheng
>
> >
> > Regards
> > Dong Aisheng
> >
> >>> Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
> >>
> >> Add Dong and Frank who may help to confirm.
> >>
> >> Shawn
> >>
> >>> ---
> >>> arch/arm/boot/dts/imx7d-sdb.dts | 14 +++++++-------
> >>> 1 file changed, 7 insertions(+), 7 deletions(-)
> >>>
> >>> diff --git a/arch/arm/boot/dts/imx7d-sdb.dts
> >>> b/arch/arm/boot/dts/imx7d-sdb.dts index 54c4540..cab9208 100644
> >>> --- a/arch/arm/boot/dts/imx7d-sdb.dts
> >>> +++ b/arch/arm/boot/dts/imx7d-sdb.dts
> >>> @@ -591,7 +591,7 @@
> >>> pinctrl_usdhc1: usdhc1grp {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD1_CMD__SD1_CMD 0x59
> >>> - MX7D_PAD_SD1_CLK__SD1_CLK 0x19
> >>> + MX7D_PAD_SD1_CLK__SD1_CLK 0x09
> >>> MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
> >>> MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
> >>> MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
> >>> @@ -605,7 +605,7 @@
> >>> pinctrl_usdhc2: usdhc2grp {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD2_CMD__SD2_CMD 0x59
> >>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x19
> >>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x09
> >>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
> >>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
> >>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
> >>> @@ -616,7 +616,7 @@
> >>> pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
> >>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
> >>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0a
> >>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
> >>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
> >>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
> >>> @@ -627,7 +627,7 @@
> >>> pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
> >>> - MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
> >>> + MX7D_PAD_SD2_CLK__SD2_CLK 0x0b
> >>> MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
> >>> MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
> >>> MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
> >>> @@ -639,7 +639,7 @@
> >>> pinctrl_usdhc3: usdhc3grp {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD3_CMD__SD3_CMD 0x59
> >>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x19
> >>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x09
> >>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
> >>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
> >>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
> >>> @@ -655,7 +655,7 @@
> >>> pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
> >>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
> >>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0a
> >>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
> >>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
> >>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
> >>> @@ -671,7 +671,7 @@
> >>> pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
> >>> fsl,pins = <
> >>> MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
> >>> - MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
> >>> + MX7D_PAD_SD3_CLK__SD3_CLK 0x0b
> >>> MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
> >>> MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
> >>> MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
> >>> --
> >>> 2.7.4
> >>>
> >>>
> >>> _______________________________________________
> >>> linux-arm-kernel mailing list
> >>> linux-arm-kernel at lists.infradead.org
> >>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-27 5:32 ` A.s. Dong
@ 2017-06-27 20:22 ` Troy Kisky
2017-06-27 20:30 ` Fabio Estevam
2017-06-27 23:49 ` Fabio Estevam
1 sibling, 1 reply; 13+ messages in thread
From: Troy Kisky @ 2017-06-27 20:22 UTC (permalink / raw)
To: linux-arm-kernel
On 6/26/2017 10:32 PM, A.s. Dong wrote:
> Hi Troy,
>
>> -----Original Message-----
>> From: Troy Kisky [mailto:troy.kisky at boundarydevices.com]
>> Sent: Friday, June 16, 2017 1:46 AM
>> To: A.s. Dong; Shawn Guo; Frank Li
>> Cc: shawn.guo at linaro.org; Fabio Estevam; gary.bisson at boundarydevices.com;
>> linux-arm-kernel at lists.infradead.org
>> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down
>> on USDHCx clock
>>
>> On 6/14/2017 9:31 PM, A.s. Dong wrote:
>>> Hi Troy,
>>>
>>>> -----Original Message-----
>>>> From: Shawn Guo [mailto:shawnguo at kernel.org]
>>>> Sent: Thursday, June 15, 2017 11:39 AM
>>>> To: Troy Kisky; A.s. Dong; Frank Li
>>>> Cc: shawn.guo at linaro.org; Fabio Estevam;
>>>> gary.bisson at boundarydevices.com; linux-arm-kernel at lists.infradead.org
>>>> Subject: Re: [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k
>>>> pull-down on USDHCx clock
>>>>
>>>> On Wed, Jun 07, 2017 at 10:45:41AM -0700, Troy Kisky wrote:
>>>>> No i.mx6q board uses a 100k pull-down on clock, why should i.mx7d ?
>>>>>
>>>
>>> I saw the mx7d evk clk resistor pull-down is DNP, then why we disable
>>> internal pad pull-down?
>>
>>
>> That sounds like a very good reason to disable to me.
>> Why rely on a DNP? Also, consistency with imx6 is nice.
>>
>
> Sorry missed your reply.
>
> Not quite understand your point.
> We would like to pull down the clk signal in default state,
> But due to the board pull-down resistor is DNP (not exist),
> That's why we use internal pull down function instead.
>
> Regards
> Dong Aisheng
>
I totally misinterpreted what you said about the DNP. Sorry.
I understand you now, thanks.
But can you say why you want to pull down the clk signal in default state ?
And why mx6q does not want to do the same ?
Thanks
Troy
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-27 20:22 ` Troy Kisky
@ 2017-06-27 20:30 ` Fabio Estevam
2017-06-27 20:49 ` Troy Kisky
0 siblings, 1 reply; 13+ messages in thread
From: Fabio Estevam @ 2017-06-27 20:30 UTC (permalink / raw)
To: linux-arm-kernel
Hi Troy,
On Tue, Jun 27, 2017 at 5:22 PM, Troy Kisky
<troy.kisky@boundarydevices.com> wrote:
> And why mx6q does not want to do the same ?
On imx6qdl-sabresd.dtsi we have:
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
PUS field is at 00, which means 100k pull down.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-27 20:30 ` Fabio Estevam
@ 2017-06-27 20:49 ` Troy Kisky
2017-06-27 23:27 ` Fabio Estevam
0 siblings, 1 reply; 13+ messages in thread
From: Troy Kisky @ 2017-06-27 20:49 UTC (permalink / raw)
To: linux-arm-kernel
On 6/27/2017 1:30 PM, Fabio Estevam wrote:
> Hi Troy,
>
> On Tue, Jun 27, 2017 at 5:22 PM, Troy Kisky
> <troy.kisky@boundarydevices.com> wrote:
>
>> And why mx6q does not want to do the same ?
>
> On imx6qdl-sabresd.dtsi we have:
>
> MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
>
> PUS field is at 00, which means 100k pull down.
>
Hi Fabio !
Yes, but the enable bits(12,13) are clear.
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x13059
Would turn on 100K pull down.
Troy
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-27 20:49 ` Troy Kisky
@ 2017-06-27 23:27 ` Fabio Estevam
0 siblings, 0 replies; 13+ messages in thread
From: Fabio Estevam @ 2017-06-27 23:27 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Jun 27, 2017 at 5:49 PM, Troy Kisky
<troy.kisky@boundarydevices.com> wrote:
> Hi Fabio !
>
> Yes, but the enable bits(12,13) are clear.
> MX6QDL_PAD_SD2_CLK__SD2_CLK 0x13059
>
> Would turn on 100K pull down.
Yes, you are right. That's the value that some boards use for pulling
down the DATA3 line.
So your patch makes sense in my opinion.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock
2017-06-27 5:32 ` A.s. Dong
2017-06-27 20:22 ` Troy Kisky
@ 2017-06-27 23:49 ` Fabio Estevam
1 sibling, 0 replies; 13+ messages in thread
From: Fabio Estevam @ 2017-06-27 23:49 UTC (permalink / raw)
To: linux-arm-kernel
Hi Dong,
On Tue, Jun 27, 2017 at 2:32 AM, A.s. Dong <aisheng.dong@nxp.com> wrote:
> Not quite understand your point.
> We would like to pull down the clk signal in default state,
> But due to the board pull-down resistor is DNP (not exist),
> That's why we use internal pull down function instead.
Looking at the SD1_CLK line in the mx7d-sdb schematics rev d there is
no pull-down DNP resistor.
The DNP element in this line is capacitor C197.
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2017-06-27 23:49 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-06-07 17:45 [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Troy Kisky
2017-06-07 17:45 ` [PATCH 2/2] RFC: ARM: dts: imx7d-sdb: swap pad settings for USDHCx 50Mhz and 100Mhz Troy Kisky
2017-06-15 3:39 ` Shawn Guo
2017-06-15 4:52 ` A.s. Dong
2017-06-15 3:38 ` [PATCH 1/2] RFC: ARM: dts: imx7d-sdb: remove 100k pull-down on USDHCx clock Shawn Guo
2017-06-15 4:31 ` A.s. Dong
2017-06-15 17:46 ` Troy Kisky
2017-06-27 5:32 ` A.s. Dong
2017-06-27 20:22 ` Troy Kisky
2017-06-27 20:30 ` Fabio Estevam
2017-06-27 20:49 ` Troy Kisky
2017-06-27 23:27 ` Fabio Estevam
2017-06-27 23:49 ` Fabio Estevam
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).