From: Fuad Tabba <tabba@google.com>
To: Will Deacon <will@kernel.org>
Cc: kvmarm@lists.cs.columbia.edu, maz@kernel.org,
james.morse@arm.com, alexandru.elisei@arm.com,
suzuki.poulose@arm.com, mark.rutland@arm.com,
christoffer.dall@arm.com, pbonzini@redhat.com,
drjones@redhat.com, qperret@google.com, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com
Subject: Re: [PATCH v2 02/13] KVM: arm64: MDCR_EL2 is a 64-bit register
Date: Thu, 1 Jul 2021 14:24:25 +0100 [thread overview]
Message-ID: <CA+EHjTz13dgJYSgVYwjiG89bhnNbXbJJAiY559yZRa0N=A50Cw@mail.gmail.com> (raw)
In-Reply-To: <20210701125329.GA9757@willie-the-truck>
Hi Will,
On Thu, Jul 1, 2021 at 1:53 PM Will Deacon <will@kernel.org> wrote:
>
> On Tue, Jun 15, 2021 at 02:39:39PM +0100, Fuad Tabba wrote:
> > Fix the places in KVM that treat MDCR_EL2 as a 32-bit register.
> > More recent features (e.g., FEAT_SPEv1p2) use bits above 31.
> >
> > No functional change intended.
> >
> > Signed-off-by: Fuad Tabba <tabba@google.com>
> > ---
> > arch/arm64/include/asm/kvm_arm.h | 20 ++++++++++----------
> > arch/arm64/include/asm/kvm_asm.h | 2 +-
> > arch/arm64/include/asm/kvm_host.h | 2 +-
> > arch/arm64/kvm/debug.c | 5 +++--
> > arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +-
> > arch/arm64/kvm/hyp/vhe/debug-sr.c | 2 +-
> > 6 files changed, 17 insertions(+), 16 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
> > index 692c9049befa..25d8a61888e4 100644
> > --- a/arch/arm64/include/asm/kvm_arm.h
> > +++ b/arch/arm64/include/asm/kvm_arm.h
> > @@ -280,18 +280,18 @@
> > /* Hyp Debug Configuration Register bits */
> > #define MDCR_EL2_E2TB_MASK (UL(0x3))
> > #define MDCR_EL2_E2TB_SHIFT (UL(24))
> > -#define MDCR_EL2_TTRF (1 << 19)
> > -#define MDCR_EL2_TPMS (1 << 14)
> > +#define MDCR_EL2_TTRF (UL(1) << 19)
> > +#define MDCR_EL2_TPMS (UL(1) << 14)
> > #define MDCR_EL2_E2PB_MASK (UL(0x3))
> > #define MDCR_EL2_E2PB_SHIFT (UL(12))
> > -#define MDCR_EL2_TDRA (1 << 11)
> > -#define MDCR_EL2_TDOSA (1 << 10)
> > -#define MDCR_EL2_TDA (1 << 9)
> > -#define MDCR_EL2_TDE (1 << 8)
> > -#define MDCR_EL2_HPME (1 << 7)
> > -#define MDCR_EL2_TPM (1 << 6)
> > -#define MDCR_EL2_TPMCR (1 << 5)
> > -#define MDCR_EL2_HPMN_MASK (0x1F)
> > +#define MDCR_EL2_TDRA (UL(1) << 11)
> > +#define MDCR_EL2_TDOSA (UL(1) << 10)
> > +#define MDCR_EL2_TDA (UL(1) << 9)
> > +#define MDCR_EL2_TDE (UL(1) << 8)
> > +#define MDCR_EL2_HPME (UL(1) << 7)
> > +#define MDCR_EL2_TPM (UL(1) << 6)
> > +#define MDCR_EL2_TPMCR (UL(1) << 5)
> > +#define MDCR_EL2_HPMN_MASK (UL(0x1F))
>
> Personally, I prefer to use the BIT() macro for these things, but what
> you've got here is consistent with the rest of the file and I think that's
> more important.
>
> > /* For compatibility with fault code shared with 32-bit */
> > #define FSC_FAULT ESR_ELx_FSC_FAULT
> > diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
> > index 5e9b33cbac51..d88a5550552c 100644
> > --- a/arch/arm64/include/asm/kvm_asm.h
> > +++ b/arch/arm64/include/asm/kvm_asm.h
> > @@ -209,7 +209,7 @@ extern u64 __vgic_v3_read_vmcr(void);
> > extern void __vgic_v3_write_vmcr(u32 vmcr);
> > extern void __vgic_v3_init_lrs(void);
> >
> > -extern u32 __kvm_get_mdcr_el2(void);
> > +extern u64 __kvm_get_mdcr_el2(void);
> >
> > #define __KVM_EXTABLE(from, to) \
> > " .pushsection __kvm_ex_table, \"a\"\n" \
> > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> > index 5645af2a1431..45fdd0b7063f 100644
> > --- a/arch/arm64/include/asm/kvm_host.h
> > +++ b/arch/arm64/include/asm/kvm_host.h
> > @@ -286,7 +286,7 @@ struct kvm_vcpu_arch {
> >
> > /* HYP configuration */
> > u64 hcr_el2;
> > - u32 mdcr_el2;
> > + u64 mdcr_el2;
> >
> > /* Exception Information */
> > struct kvm_vcpu_fault_info fault;
> > diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
> > index d5e79d7ee6e9..f7385bfbc9e4 100644
> > --- a/arch/arm64/kvm/debug.c
> > +++ b/arch/arm64/kvm/debug.c
> > @@ -21,7 +21,7 @@
> > DBG_MDSCR_KDE | \
> > DBG_MDSCR_MDE)
> >
> > -static DEFINE_PER_CPU(u32, mdcr_el2);
> > +static DEFINE_PER_CPU(u64, mdcr_el2);
> >
> > /**
> > * save/restore_guest_debug_regs
> > @@ -154,7 +154,8 @@ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu)
> >
> > void kvm_arm_setup_debug(struct kvm_vcpu *vcpu)
> > {
> > - unsigned long mdscr, orig_mdcr_el2 = vcpu->arch.mdcr_el2;
> > + unsigned long mdscr;
> > + u64 orig_mdcr_el2 = vcpu->arch.mdcr_el2;
>
> This is arm64 code, so 'unsigned long' is fine here and you can leave the
> existing code as-is.
I'll keep the existing code as it is.
Thanks,
/fuad
> With that:
>
> Acked-by: Will Deacon <will@kernel.org>
>
> Will
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-01 13:26 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-15 13:39 [PATCH v2 00/13] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 01/13] KVM: arm64: Remove trailing whitespace in comments Fuad Tabba
2021-07-01 12:55 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 02/13] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-07-01 12:53 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba [this message]
2021-06-15 13:39 ` [PATCH v2 03/13] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-07-01 13:01 ` Will Deacon
2021-07-01 13:44 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-07-01 13:09 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h, c " Will Deacon
2021-07-01 14:04 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 05/13] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-07-01 13:17 ` Will Deacon
2021-07-01 14:05 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 06/13] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-07-01 13:22 ` Will Deacon
2021-07-01 14:31 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 07/13] KVM: arm64: Add config register bit definitions Fuad Tabba
2021-07-01 13:33 ` Will Deacon
2021-07-01 14:52 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 08/13] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-07-01 13:48 ` Will Deacon
2021-07-01 14:58 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 09/13] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-07-01 14:08 ` Will Deacon
2021-07-14 20:01 ` Andrew Jones
2021-06-15 13:39 ` [PATCH v2 10/13] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 11/13] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 12/13] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 13/13] KVM: arm64: Check vcpu features at pVM creation Fuad Tabba
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CA+EHjTz13dgJYSgVYwjiG89bhnNbXbJJAiY559yZRa0N=A50Cw@mail.gmail.com' \
--to=tabba@google.com \
--cc=alexandru.elisei@arm.com \
--cc=christoffer.dall@arm.com \
--cc=drjones@redhat.com \
--cc=james.morse@arm.com \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=pbonzini@redhat.com \
--cc=qperret@google.com \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).