From: Fuad Tabba <tabba@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: maz@kernel.org, will@kernel.org, james.morse@arm.com,
alexandru.elisei@arm.com, suzuki.poulose@arm.com,
mark.rutland@arm.com, christoffer.dall@arm.com,
pbonzini@redhat.com, drjones@redhat.com, qperret@google.com,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kernel-team@android.com, tabba@google.com
Subject: [PATCH v2 07/13] KVM: arm64: Add config register bit definitions
Date: Tue, 15 Jun 2021 14:39:44 +0100 [thread overview]
Message-ID: <20210615133950.693489-8-tabba@google.com> (raw)
In-Reply-To: <20210615133950.693489-1-tabba@google.com>
Add hardware configuration register bit definitions for HCR_EL2
and MDCR_EL2. Future patches toggle these hyp configuration
register bits to trap on certain accesses.
No functional change intended.
Signed-off-by: Fuad Tabba <tabba@google.com>
---
arch/arm64/include/asm/kvm_arm.h | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index bee1ba6773fb..a78090071f1f 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -12,7 +12,11 @@
#include <asm/types.h>
/* Hyp Configuration Register (HCR) bits */
+#define HCR_TID5 (UL(1) << 58)
+#define HCR_DCT (UL(1) << 57)
#define HCR_ATA (UL(1) << 56)
+#define HCR_AMVOFFEN (UL(1) << 51)
+#define HCR_FIEN (UL(1) << 47)
#define HCR_FWB (UL(1) << 46)
#define HCR_API (UL(1) << 41)
#define HCR_APK (UL(1) << 40)
@@ -55,6 +59,7 @@
#define HCR_PTW (UL(1) << 2)
#define HCR_SWIO (UL(1) << 1)
#define HCR_VM (UL(1) << 0)
+#define HCR_RES0 ((UL(1) << 48) | (UL(1) << 39))
/*
* The bits we set in HCR:
@@ -276,11 +281,21 @@
#define CPTR_EL2_TZ (1 << 8)
#define CPTR_NVHE_EL2_RES1 0x000032ff /* known RES1 bits in CPTR_EL2 (nVHE) */
#define CPTR_EL2_DEFAULT CPTR_NVHE_EL2_RES1
+#define CPTR_NVHE_EL2_RES0 (GENMASK_ULL(63, 32) | \
+ GENMASK_ULL(29, 21) | \
+ GENMASK_ULL(19, 14) | \
+ (UL(1) << 11))
/* Hyp Debug Configuration Register bits */
#define MDCR_EL2_E2TB_MASK (UL(0x3))
#define MDCR_EL2_E2TB_SHIFT (UL(24))
+#define MDCR_EL2_HPMFZS (UL(1) << 36)
+#define MDCR_EL2_HPMFZO (UL(1) << 29)
+#define MDCR_EL2_MTPME (UL(1) << 28)
+#define MDCR_EL2_TDCC (UL(1) << 27)
+#define MDCR_EL2_HCCD (UL(1) << 23)
#define MDCR_EL2_TTRF (UL(1) << 19)
+#define MDCR_EL2_HPMD (UL(1) << 17)
#define MDCR_EL2_TPMS (UL(1) << 14)
#define MDCR_EL2_E2PB_MASK (UL(0x3))
#define MDCR_EL2_E2PB_SHIFT (UL(12))
@@ -292,6 +307,12 @@
#define MDCR_EL2_TPM (UL(1) << 6)
#define MDCR_EL2_TPMCR (UL(1) << 5)
#define MDCR_EL2_HPMN_MASK (UL(0x1F))
+#define MDCR_EL2_RES0 (GENMASK_ULL(63, 37) | \
+ GENMASK_ULL(35, 30) | \
+ GENMASK_ULL(25, 24) | \
+ GENMASK_ULL(22, 20) | \
+ (UL(1) << 18) | \
+ GENMASK_ULL(16, 15))
/* For compatibility with fault code shared with 32-bit */
#define FSC_FAULT ESR_ELx_FSC_FAULT
--
2.32.0.272.g935e593368-goog
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next prev parent reply other threads:[~2021-06-15 14:24 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-15 13:39 [PATCH v2 00/13] KVM: arm64: Fixed features for protected VMs Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 01/13] KVM: arm64: Remove trailing whitespace in comments Fuad Tabba
2021-07-01 12:55 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 02/13] KVM: arm64: MDCR_EL2 is a 64-bit register Fuad Tabba
2021-07-01 12:53 ` Will Deacon
2021-07-01 13:24 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 03/13] KVM: arm64: Fix names of config register fields Fuad Tabba
2021-07-01 13:01 ` Will Deacon
2021-07-01 13:44 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h,c for nVHE reuse Fuad Tabba
2021-07-01 13:09 ` [PATCH v2 04/13] KVM: arm64: Refactor sys_regs.h, c " Will Deacon
2021-07-01 14:04 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 05/13] KVM: arm64: Restore mdcr_el2 from vcpu Fuad Tabba
2021-07-01 13:17 ` Will Deacon
2021-07-01 14:05 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 06/13] KVM: arm64: Add feature register flag definitions Fuad Tabba
2021-07-01 13:22 ` Will Deacon
2021-07-01 14:31 ` Fuad Tabba
2021-06-15 13:39 ` Fuad Tabba [this message]
2021-07-01 13:33 ` [PATCH v2 07/13] KVM: arm64: Add config register bit definitions Will Deacon
2021-07-01 14:52 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 08/13] KVM: arm64: Guest exit handlers for nVHE hyp Fuad Tabba
2021-07-01 13:48 ` Will Deacon
2021-07-01 14:58 ` Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 09/13] KVM: arm64: Add trap handlers for protected VMs Fuad Tabba
2021-07-01 14:08 ` Will Deacon
2021-07-14 20:01 ` Andrew Jones
2021-06-15 13:39 ` [PATCH v2 10/13] KVM: arm64: Move sanitized copies of CPU features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 11/13] KVM: arm64: Trap access to pVM restricted features Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 12/13] KVM: arm64: Handle protected guests at 32 bits Fuad Tabba
2021-06-15 13:39 ` [PATCH v2 13/13] KVM: arm64: Check vcpu features at pVM creation Fuad Tabba
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