* [PATCH 1/3] pinctrl: mvebu: Add CP110 missing pin functionality
2019-08-05 10:16 [PATCH 0/3] CP115 pinctrl support Miquel Raynal
@ 2019-08-05 10:16 ` Miquel Raynal
2019-08-27 7:48 ` Linus Walleij
2019-08-05 10:16 ` [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible Miquel Raynal
` (2 subsequent siblings)
3 siblings, 1 reply; 15+ messages in thread
From: Miquel Raynal @ 2019-08-05 10:16 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: devicetree, Yan Markman, Antoine Tenart, Grzegorz Jaszczyk,
Gregory Clement, Maxime Chevallier, Nadav Haklai, linux-gpio,
Thomas Petazzoni, Miquel Raynal, Konstantin Porotchkin,
Stefan Chulski, Marcin Wojtas, Linus Walleij, linux-arm-kernel
From: Konstantin Porotchkin <kostap@marvell.com>
Add missing definition for function 0xe on CP-110 MPP-62.
The pin function is Data Strobe for SDIO interface.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/pinctrl/mvebu/pinctrl-armada-cp110.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c b/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
index 584952b2ba47..85ade9761885 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
@@ -597,7 +597,8 @@ static struct mvebu_mpp_mode armada_cp110_mpp_modes[] = {
MPP_FUNCTION(7, "uart0", "rxd"),
MPP_FUNCTION(8, "uart2", "rxd"),
MPP_FUNCTION(9, "sata0", "present_act"),
- MPP_FUNCTION(10, "ge", "mdc")),
+ MPP_FUNCTION(10, "ge", "mdc"),
+ MPP_FUNCTION(14, "sdio", "ds")),
};
static const struct of_device_id armada_cp110_pinctrl_of_match[] = {
--
2.20.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 1/3] pinctrl: mvebu: Add CP110 missing pin functionality
2019-08-05 10:16 ` [PATCH 1/3] pinctrl: mvebu: Add CP110 missing pin functionality Miquel Raynal
@ 2019-08-27 7:48 ` Linus Walleij
0 siblings, 0 replies; 15+ messages in thread
From: Linus Walleij @ 2019-08-27 7:48 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Konstantin Porotchkin,
Stefan Chulski, Marcin Wojtas, Linux ARM
On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> From: Konstantin Porotchkin <kostap@marvell.com>
>
> Add missing definition for function 0xe on CP-110 MPP-62.
> The pin function is Data Strobe for SDIO interface.
>
> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Patch applied.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible
2019-08-05 10:16 [PATCH 0/3] CP115 pinctrl support Miquel Raynal
2019-08-05 10:16 ` [PATCH 1/3] pinctrl: mvebu: Add CP110 missing pin functionality Miquel Raynal
@ 2019-08-05 10:16 ` Miquel Raynal
2019-08-21 18:53 ` Rob Herring
2019-08-27 7:46 ` Linus Walleij
2019-08-05 10:16 ` [PATCH 3/3] pinctrl: mvebu: add additional variant for standalone CP115 Miquel Raynal
2019-08-07 12:47 ` [PATCH 0/3] CP115 pinctrl support Linus Walleij
3 siblings, 2 replies; 15+ messages in thread
From: Miquel Raynal @ 2019-08-05 10:16 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: devicetree, Yan Markman, Antoine Tenart, Grzegorz Jaszczyk,
Gregory Clement, Maxime Chevallier, Nadav Haklai, linux-gpio,
Thomas Petazzoni, Miquel Raynal, Stefan Chulski, Marcin Wojtas,
Linus Walleij, linux-arm-kernel
From: Grzegorz Jaszczyk <jaz@semihalf.com>
A new compatible is going to be used for Armada CP115 pinctrl block,
document it.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
[<miquel.raynal@bootlin.com>: split the documentation out of the
driver commit]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
.../bindings/arm/marvell/cp110-system-controller.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
index 4db4119a6d19..f982a8ed9396 100644
--- a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
+++ b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt
@@ -78,8 +78,8 @@ Documentation/devicetree/bindings/pinctrl/marvell,mvebu-pinctrl.txt.
Required properties:
-- compatible: "marvell,armada-7k-pinctrl",
- "marvell,armada-8k-cpm-pinctrl" or "marvell,armada-8k-cps-pinctrl"
+- compatible: "marvell,armada-7k-pinctrl", "marvell,armada-8k-cpm-pinctrl",
+ "marvell,armada-8k-cps-pinctrl" or "marvell,cp115-standalone-pinctrl"
depending on the specific variant of the SoC being used.
Available mpp pins/groups and functions:
--
2.20.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible
2019-08-05 10:16 ` [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible Miquel Raynal
@ 2019-08-21 18:53 ` Rob Herring
2019-08-27 7:46 ` Linus Walleij
1 sibling, 0 replies; 15+ messages in thread
From: Rob Herring @ 2019-08-21 18:53 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland, devicetree, Yan Markman, Antoine Tenart,
Grzegorz Jaszczyk, Gregory Clement, Maxime Chevallier,
Nadav Haklai, linux-gpio, Thomas Petazzoni, Miquel Raynal,
Stefan Chulski, Marcin Wojtas, Linus Walleij, linux-arm-kernel
On Mon, 5 Aug 2019 12:16:06 +0200, Miquel Raynal wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> A new compatible is going to be used for Armada CP115 pinctrl block,
> document it.
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> [<miquel.raynal@bootlin.com>: split the documentation out of the
> driver commit]
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> ---
> .../bindings/arm/marvell/cp110-system-controller.txt | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible
2019-08-05 10:16 ` [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible Miquel Raynal
2019-08-21 18:53 ` Rob Herring
@ 2019-08-27 7:46 ` Linus Walleij
1 sibling, 0 replies; 15+ messages in thread
From: Linus Walleij @ 2019-08-27 7:46 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> A new compatible is going to be used for Armada CP115 pinctrl block,
> document it.
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> [<miquel.raynal@bootlin.com>: split the documentation out of the
> driver commit]
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Patch applied with Rob's ACK.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/3] pinctrl: mvebu: add additional variant for standalone CP115
2019-08-05 10:16 [PATCH 0/3] CP115 pinctrl support Miquel Raynal
2019-08-05 10:16 ` [PATCH 1/3] pinctrl: mvebu: Add CP110 missing pin functionality Miquel Raynal
2019-08-05 10:16 ` [PATCH 2/3] dt-bindings: cp110: document the new CP115 pinctrl compatible Miquel Raynal
@ 2019-08-05 10:16 ` Miquel Raynal
2019-08-27 7:49 ` Linus Walleij
2019-08-07 12:47 ` [PATCH 0/3] CP115 pinctrl support Linus Walleij
3 siblings, 1 reply; 15+ messages in thread
From: Miquel Raynal @ 2019-08-05 10:16 UTC (permalink / raw)
To: Rob Herring, Mark Rutland
Cc: devicetree, Yan Markman, Antoine Tenart, Grzegorz Jaszczyk,
Gregory Clement, Maxime Chevallier, Nadav Haklai, linux-gpio,
Thomas Petazzoni, Miquel Raynal, Stefan Chulski, Marcin Wojtas,
Linus Walleij, linux-arm-kernel
From: Grzegorz Jaszczyk <jaz@semihalf.com>
With CP115 standalone modules, all MPP configuration are
possible. Handle this new possibility thanks to the new
"marvell,cp115-standalone-pinctrl" compatible property.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
[<miquel.raynal@bootlin.com>: mention the new compatible in the
commit log]
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
drivers/pinctrl/mvebu/pinctrl-armada-cp110.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c b/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
index 85ade9761885..17491b27e487 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-cp110.c
@@ -32,6 +32,7 @@ enum {
V_ARMADA_7K = BIT(0),
V_ARMADA_8K_CPM = BIT(1),
V_ARMADA_8K_CPS = BIT(2),
+ V_CP115_STANDALONE = BIT(3),
V_ARMADA_7K_8K_CPM = (V_ARMADA_7K | V_ARMADA_8K_CPM),
V_ARMADA_7K_8K_CPS = (V_ARMADA_7K | V_ARMADA_8K_CPS),
};
@@ -614,6 +615,10 @@ static const struct of_device_id armada_cp110_pinctrl_of_match[] = {
.compatible = "marvell,armada-8k-cps-pinctrl",
.data = (void *) V_ARMADA_8K_CPS,
},
+ {
+ .compatible = "marvell,cp115-standalone-pinctrl",
+ .data = (void *) V_CP115_STANDALONE,
+ },
{ },
};
@@ -655,16 +660,20 @@ static int armada_cp110_pinctrl_probe(struct platform_device *pdev)
switch (i) {
case 0 ... 31:
- mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPS);
+ mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPS |
+ V_CP115_STANDALONE));
break;
case 32 ... 38:
- mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM);
+ mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPM |
+ V_CP115_STANDALONE));
break;
case 39 ... 43:
- mvebu_pinctrl_assign_variant(m, V_ARMADA_8K_CPM);
+ mvebu_pinctrl_assign_variant(m, (V_ARMADA_8K_CPM |
+ V_CP115_STANDALONE));
break;
case 44 ... 62:
- mvebu_pinctrl_assign_variant(m, V_ARMADA_7K_8K_CPM);
+ mvebu_pinctrl_assign_variant(m, (V_ARMADA_7K_8K_CPM |
+ V_CP115_STANDALONE));
break;
}
}
--
2.20.1
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 3/3] pinctrl: mvebu: add additional variant for standalone CP115
2019-08-05 10:16 ` [PATCH 3/3] pinctrl: mvebu: add additional variant for standalone CP115 Miquel Raynal
@ 2019-08-27 7:49 ` Linus Walleij
0 siblings, 0 replies; 15+ messages in thread
From: Linus Walleij @ 2019-08-27 7:49 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> From: Grzegorz Jaszczyk <jaz@semihalf.com>
>
> With CP115 standalone modules, all MPP configuration are
> possible. Handle this new possibility thanks to the new
> "marvell,cp115-standalone-pinctrl" compatible property.
>
> Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
> [<miquel.raynal@bootlin.com>: mention the new compatible in the
> commit log]
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Patch applied.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-05 10:16 [PATCH 0/3] CP115 pinctrl support Miquel Raynal
` (2 preceding siblings ...)
2019-08-05 10:16 ` [PATCH 3/3] pinctrl: mvebu: add additional variant for standalone CP115 Miquel Raynal
@ 2019-08-07 12:47 ` Linus Walleij
2019-08-14 8:12 ` Linus Walleij
3 siblings, 1 reply; 15+ messages in thread
From: Linus Walleij @ 2019-08-07 12:47 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> This is the second batch of changes (out of three) to support the brand
> new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
>
> We add a new compatible (and the relevant support in the pinctrl
> driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.
Waiting for review from the Mvebu maintainers.
If it takes too long just nudge me, it looks good to me.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-07 12:47 ` [PATCH 0/3] CP115 pinctrl support Linus Walleij
@ 2019-08-14 8:12 ` Linus Walleij
2019-08-14 12:34 ` Thomas Petazzoni
0 siblings, 1 reply; 15+ messages in thread
From: Linus Walleij @ 2019-08-14 8:12 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>
> > This is the second batch of changes (out of three) to support the brand
> > new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
> >
> > We add a new compatible (and the relevant support in the pinctrl
> > driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.
>
> Waiting for review from the Mvebu maintainers.
>
> If it takes too long just nudge me, it looks good to me.
So if the other MVEBU maintainers don't really look much at MVEBU
patches anymore while Miquel is working a lot on the platform,
what about listing Miquel as maintainer under the SoC entry, hm?
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-14 8:12 ` Linus Walleij
@ 2019-08-14 12:34 ` Thomas Petazzoni
2019-08-15 8:10 ` Linus Walleij
0 siblings, 1 reply; 15+ messages in thread
From: Thomas Petazzoni @ 2019-08-14 12:34 UTC (permalink / raw)
To: Linus Walleij
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Miquel Raynal, Stefan Chulski, Marcin Wojtas,
Linux ARM
Hello Linus,
On Wed, 14 Aug 2019 10:12:36 +0200
Linus Walleij <linus.walleij@linaro.org> wrote:
> On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> > On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> >
> > > This is the second batch of changes (out of three) to support the brand
> > > new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
> > >
> > > We add a new compatible (and the relevant support in the pinctrl
> > > driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.
> >
> > Waiting for review from the Mvebu maintainers.
> >
> > If it takes too long just nudge me, it looks good to me.
>
> So if the other MVEBU maintainers don't really look much at MVEBU
> patches anymore while Miquel is working a lot on the platform,
> what about listing Miquel as maintainer under the SoC entry, hm?
Miquel sent his series on August 5, i.e 9 days ago. We're in August, in
the middle of the summer vacations for many people. While it is nice to
see subsystem maintainers who want to get code merged in a timely
fashion, I think it is probably wise to give it some more time for
review in this period of the year.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-14 12:34 ` Thomas Petazzoni
@ 2019-08-15 8:10 ` Linus Walleij
2019-08-24 11:33 ` Miquel Raynal
0 siblings, 1 reply; 15+ messages in thread
From: Linus Walleij @ 2019-08-15 8:10 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Miquel Raynal, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Wed, Aug 14, 2019 at 2:35 PM Thomas Petazzoni
<thomas.petazzoni@bootlin.com> wrote:
> On Wed, 14 Aug 2019 10:12:36 +0200
> Linus Walleij <linus.walleij@linaro.org> wrote:
>
> > On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> > > On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> > >
> > > > This is the second batch of changes (out of three) to support the brand
> > > > new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
> > > >
> > > > We add a new compatible (and the relevant support in the pinctrl
> > > > driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.
> > >
> > > Waiting for review from the Mvebu maintainers.
> > >
> > > If it takes too long just nudge me, it looks good to me.
> >
> > So if the other MVEBU maintainers don't really look much at MVEBU
> > patches anymore while Miquel is working a lot on the platform,
> > what about listing Miquel as maintainer under the SoC entry, hm?
>
> Miquel sent his series on August 5, i.e 9 days ago. We're in August, in
> the middle of the summer vacations for many people. While it is nice to
> see subsystem maintainers who want to get code merged in a timely
> fashion, I think it is probably wise to give it some more time for
> review in this period of the year.
OK then maybe I am a bit impatient.
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-15 8:10 ` Linus Walleij
@ 2019-08-24 11:33 ` Miquel Raynal
2019-08-27 7:50 ` Linus Walleij
0 siblings, 1 reply; 15+ messages in thread
From: Miquel Raynal @ 2019-08-24 11:33 UTC (permalink / raw)
To: Linus Walleij, Yan Markman
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
Hi Linus,
Linus Walleij <linus.walleij@linaro.org> wrote on Thu, 15 Aug 2019
10:10:46 +0200:
> On Wed, Aug 14, 2019 at 2:35 PM Thomas Petazzoni
> <thomas.petazzoni@bootlin.com> wrote:
> > On Wed, 14 Aug 2019 10:12:36 +0200
> > Linus Walleij <linus.walleij@linaro.org> wrote:
> >
> > > On Wed, Aug 7, 2019 at 2:47 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> > > > On Mon, Aug 5, 2019 at 12:16 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> > > >
> > > > > This is the second batch of changes (out of three) to support the brand
> > > > > new Marvell CN9130 SoCs which are made of one AP807 and one CP115.
> > > > >
> > > > > We add a new compatible (and the relevant support in the pinctrl
> > > > > driver) before the addition in batch 3/3 of CN9130 SoCs DT using it.
> > > >
> > > > Waiting for review from the Mvebu maintainers.
> > > >
> > > > If it takes too long just nudge me, it looks good to me.
> > >
> > > So if the other MVEBU maintainers don't really look much at MVEBU
> > > patches anymore while Miquel is working a lot on the platform,
> > > what about listing Miquel as maintainer under the SoC entry, hm?
> >
> > Miquel sent his series on August 5, i.e 9 days ago. We're in August, in
> > the middle of the summer vacations for many people. While it is nice to
> > see subsystem maintainers who want to get code merged in a timely
> > fashion, I think it is probably wise to give it some more time for
> > review in this period of the year.
>
> OK then maybe I am a bit impatient.
Actually Gregory is on vacation until September, so if we still are in
time for this merge window I suppose you can take it.
Thanks,
Miquèl
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-24 11:33 ` Miquel Raynal
@ 2019-08-27 7:50 ` Linus Walleij
2019-08-27 14:24 ` Gregory CLEMENT
0 siblings, 1 reply; 15+ messages in thread
From: Linus Walleij @ 2019-08-27 7:50 UTC (permalink / raw)
To: Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk, Gregory Clement,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
On Sat, Aug 24, 2019 at 1:33 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Linus Walleij <linus.walleij@linaro.org> wrote on Thu, 15 Aug 2019
> > OK then maybe I am a bit impatient.
>
> Actually Gregory is on vacation until September, so if we still are in
> time for this merge window I suppose you can take it.
OK I applied the patches.
If someone is upset we can always revert them in the -rc phase.
Yours,
Linus Walleij
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^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/3] CP115 pinctrl support
2019-08-27 7:50 ` Linus Walleij
@ 2019-08-27 14:24 ` Gregory CLEMENT
0 siblings, 0 replies; 15+ messages in thread
From: Gregory CLEMENT @ 2019-08-27 14:24 UTC (permalink / raw)
To: Linus Walleij, Miquel Raynal
Cc: Mark Rutland,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Yan Markman, Antoine Tenart, Grzegorz Jaszczyk,
Maxime Chevallier, Nadav Haklai, open list:GPIO SUBSYSTEM,
Rob Herring, Thomas Petazzoni, Stefan Chulski, Marcin Wojtas,
Linux ARM
Hi Linus,
> On Sat, Aug 24, 2019 at 1:33 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>> Linus Walleij <linus.walleij@linaro.org> wrote on Thu, 15 Aug 2019
>
>> > OK then maybe I am a bit impatient.
>>
>> Actually Gregory is on vacation until September, so if we still are in
>> time for this merge window I suppose you can take it.
>
> OK I applied the patches.
>
> If someone is upset we can always revert them in the -rc phase.
I had a look on the series and it looks good for me.
Gregory
>
> Yours,
> Linus Walleij
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
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^ permalink raw reply [flat|nested] 15+ messages in thread