From: achandran@mvista.com (Arun Chandran)
To: linux-arm-kernel@lists.infradead.org
Subject: Kexec on arm64
Date: Tue, 22 Jul 2014 18:55:49 +0530 [thread overview]
Message-ID: <CAFdej00J2mJwcg2Cy6CHVuuQZ4uQ2zZg8oErGPi0uPejievB+Q@mail.gmail.com> (raw)
In-Reply-To: <CAFdej03nixSU=3h+HYk2E3Onb2P3--Di0GM+wCwLS6ZNH7UjEQ@mail.gmail.com>
Hi Geoff,
On Tue, Jul 22, 2014 at 3:14 PM, Arun Chandran <achandran@mvista.com> wrote:
> On Thu, Jul 17, 2014 at 4:34 AM, Geoff Levand <geoff@infradead.org> wrote:
>> Hi Feng,
>>
>> On Wed, 2014-07-16 at 10:57 -0700, Feng Kan wrote:
>>> Just following up on the conversation. The cpu return address of 0 should work
>>> in your case. Since thats the _start of the bootloader, it will run
>>> some core init
>>> code and then put the core back in wfe.
>>
>> OK, I fixed up my code so that zero is valid cpu return address. Arun,
>> could you try my latest I pushed out today?
>>
> Hi Geoff,
>
> Sorry for the late reply I was away.
>
> Yes I tried the new code.
> My dts file has the below change.
>
> ################
> diff --git a/arch/arm64/boot/dts/apm-storm.dtsi
> b/arch/arm64/boot/dts/apm-storm.dtsi
> index e0bf91d..b64e549 100644
> --- a/arch/arm64/boot/dts/apm-storm.dtsi
> +++ b/arch/arm64/boot/dts/apm-storm.dtsi
> @@ -24,64 +24,64 @@
> compatible = "apm,potenza", "arm,armv8";
> reg = <0x0 0x000>;
> enable-method = "spin-table";
> - cpu-release-addr = <0x1 0x0000fff8>;
> - cpu-return-addr = <0x0 0x0> /* Updated by bootloader */
> + cpu-release-addr = <0x40 0x0000fff8>;
> + cpu-return-addr = <0x0 0x0>; /* Updated by bootloader */
> };
> #################
> All other cpu nodes have similar change.
>
I tried the same dtb with UP configuration. For UP kernel to compile
did the below modifications
##############################
diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c
index 1ccedb4c..c6a2a7e 100644
--- a/arch/arm64/kernel/cpu_ops.c
+++ b/arch/arm64/kernel/cpu_ops.c
@@ -89,6 +89,7 @@ void __init cpu_read_bootcpu_ops(void)
cpu_read_ops(dn, 0);
}
+#if 0
int __init cpu_ops_init(void)
{
int result = 0;
@@ -110,3 +111,4 @@ void cpu_ops_shutdown(void)
if (cpu_operation_psci.shutdown)
cpu_operation_psci.shutdown();
}
+#endif
diff --git a/arch/arm64/kernel/machine_kexec.c
b/arch/arm64/kernel/machine_kexec.c
index fba6d50..c3cf246 100644
--- a/arch/arm64/kernel/machine_kexec.c
+++ b/arch/arm64/kernel/machine_kexec.c
@@ -609,7 +609,7 @@ void machine_kexec(struct kimage *image)
flush_icache_range((unsigned long)reboot_code_buffer,
(unsigned long)reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
- dump_cpus();
+ //dump_cpus();
pr_info("Bye!\n");
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 31cba91..6bc85f78 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -83,7 +83,7 @@ void soft_restart(unsigned long addr)
setup_restart();
- smp_secondary_shutdown();
+ //smp_secondary_shutdown();
/* Switch to the identity mapping */
phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
@@ -130,7 +130,7 @@ void arch_cpu_idle_dead(void)
*/
void machine_shutdown(void)
{
- smp_send_stop();
+ //smp_send_stop();
}
/*
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index c29dde1..14c339c 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -73,7 +73,7 @@ ENTRY(cpu_reset)
bic x1, x1, #1
msr sctlr_el1, x1 // disable the MMU
isb
- bl secondary_shutdown
+# bl secondary_shutdown
ret x0
ENDPROC(cpu_reset)
#####################
With the default target configuration "kexec -e" failed to execute
in UP scenario also.
But I had some luck when I did the same steps with L3 cache
disabled. According to http://www.spinics.net/lists/arm-kernel/msg329541.html
it has an L3 cache. Luckily I was able to disable it in u-boot.
With the L3 cache disabled configuration I am able to
do "kexec -e". Please see the log attached.
Feng,
I doubt kernel is unaware of the presence of L3 cache, this subsequently
makes "kexec -e" to fail.
Do you have any idea how to make the kernel to take control of L3 cache?
--Arun
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next prev parent reply other threads:[~2014-07-22 13:25 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CAFdej006OSyhgDcJ2iZdbjt+PtysN=i_+9Dr4GTmr=+t5yg4Kw@mail.gmail.com>
2014-07-15 17:04 ` Kexec on arm64 Geoff Levand
2014-07-16 17:57 ` Feng Kan
2014-07-16 23:04 ` Geoff Levand
2014-07-22 9:44 ` Arun Chandran
2014-07-22 13:25 ` Arun Chandran [this message]
2014-07-24 0:38 ` Geoff Levand
2014-07-24 9:36 ` Mark Rutland
2014-07-24 12:49 ` Arun Chandran
2014-07-25 0:17 ` Geoff Levand
2014-07-25 10:31 ` Arun Chandran
2014-07-25 10:36 ` Mark Rutland
2014-07-25 11:48 ` Arun Chandran
2014-07-25 12:14 ` Mark Rutland
2014-07-25 15:29 ` Arun Chandran
2014-07-26 0:18 ` Geoff Levand
2014-07-28 15:00 ` Arun Chandran
2014-07-28 15:38 ` Mark Rutland
2014-07-29 0:09 ` Geoff Levand
2014-07-29 9:10 ` Mark Rutland
2014-07-29 12:32 ` Arun Chandran
2014-07-29 13:35 ` Mark Rutland
2014-07-29 21:19 ` Geoff Levand
2014-07-30 7:22 ` Arun Chandran
2014-08-01 11:13 ` Arun Chandran
2014-08-03 14:47 ` Mark Rutland
2014-08-04 10:16 ` Arun Chandran
2014-08-04 11:35 ` Mark Rutland
2014-08-07 0:40 ` Geoff Levand
2014-08-07 9:59 ` Mark Rutland
2014-08-07 17:09 ` Geoff Levand
2014-08-04 17:21 ` Geoff Levand
2014-08-06 13:54 ` Arun Chandran
2014-08-06 15:51 ` Arun Chandran
2014-08-07 20:07 ` Geoff Levand
2014-08-08 5:46 ` Arun Chandran
2014-08-08 10:03 ` Arun Chandran
2014-08-12 5:42 ` Arun Chandran
2014-08-13 11:09 ` Arun Chandran
2014-08-26 22:32 ` Geoff Levand
2014-08-27 4:56 ` Arun Chandran
2014-07-30 5:46 ` Arun Chandran
2014-07-30 9:16 ` Mark Rutland
2014-07-30 7:01 ` Arun Chandran
2014-07-25 10:26 ` Arun Chandran
2014-07-25 11:29 ` Mark Rutland
2014-07-24 11:50 ` Arun Chandran
2014-07-30 3:26 ` Feng Kan
2014-07-24 0:10 ` Geoff Levand
2014-07-24 9:13 ` Mark Rutland
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