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From: Daniel Palmer <daniel@0x0f.com>
To: Marc Zyngier <maz@kernel.org>
Cc: DTML <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	 Thomas Gleixner <tglx@linutronix.de>,
	 linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	 Romain Perier <romain.perier@gmail.com>
Subject: Re: [PATCH 2/3] irqchip: SigmaStar SSD20xD gpi
Date: Tue, 21 Sep 2021 15:11:35 +0900	[thread overview]
Message-ID: <CAFr9PXm8S+P+q5KiU7DxeKQVU92PQefovjd25zrQJ2m2RyZpcg@mail.gmail.com> (raw)
In-Reply-To: <87wnnbv6ac.wl-maz@kernel.org>

Hi Marc,

Sorry for the constant email.

On Mon, 20 Sept 2021 at 20:24, Marc Zyngier <maz@kernel.org> wrote:
>
> On Mon, 20 Sep 2021 11:05:26 +0100,
> Daniel Palmer <daniel@0x0f.com> wrote:
> >
> > Hi Marc,
> >
> > On Mon, 20 Sept 2021 at 18:45, Marc Zyngier <maz@kernel.org> wrote:
> > > > +static void ssd20xd_gpi_unmask_irq(struct irq_data *data)
> > > > +{
> > > > +     irq_hw_number_t hwirq = irqd_to_hwirq(data);
> > > > +     struct ssd20xd_gpi *gpi = irq_data_get_irq_chip_data(data);
> > > > +     int offset_reg = REG_OFFSET(hwirq);
> > > > +     int offset_bit = BIT_OFFSET(hwirq);
> > > > +
> > > > +     regmap_update_bits(gpi->regmap, REG_MASK + offset_reg, offset_bit, 0);
> > >
> > > Is this regmap call atomic? When running this, you are holding a
> > > raw_spinlock already. From what I can see, this is unlikely to work
> > > correctly with the current state of regmap.
> >
> > I didn't even think about it. I will check.
>
> You may want to enable lockdep to verify that.

After some research I think this can be solved by adding
".use_raw_spinlock = true" to the regmap config to force using a
raw_spinlock instead of the default spinlock.
This avoids having a spinlock inside of a raw_spinlock.

lockdep doesn't actually complain about this currently but another
interrupt controller driver I have uses a syscon because the interrupt
registers are mixed in with unrelated stuff.
lockdep is complaining about the spinlock inside of a raw_spinlock
there. So I guess I'll need to add a new DT property for syscon to use
raw_spinlocks for that driver.

Cheers,

Daniel

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  parent reply	other threads:[~2021-09-21  6:13 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14 10:04 [PATCH 0/3] SigmaStar SSD20XD GPIO interrupt controller Daniel Palmer
2021-09-14 10:04 ` [PATCH 1/3] dt-bindings: interrupt-controller: Add SigmaStar SSD20xD gpi Daniel Palmer
2021-09-21 20:36   ` Rob Herring
2021-09-14 10:04 ` [PATCH 2/3] irqchip: " Daniel Palmer
2021-09-20  9:45   ` Marc Zyngier
2021-09-20 10:05     ` Daniel Palmer
2021-09-20 11:24       ` Marc Zyngier
2021-09-21  4:16         ` Daniel Palmer
2021-09-21  8:27           ` Marc Zyngier
2021-09-21 18:23             ` Linus Walleij
2021-09-30 12:39               ` Daniel Palmer
2021-09-30 13:07                 ` Marc Zyngier
2021-09-30 13:10                   ` Daniel Palmer
2021-09-30 13:06               ` Marc Zyngier
2021-09-30 13:36                 ` Daniel Palmer
2021-09-30 13:53                   ` Marc Zyngier
2021-09-30 13:59                     ` Daniel Palmer
2021-09-30 14:11                       ` Marc Zyngier
2021-09-30 16:10                         ` Linus Walleij
2021-09-30 16:13                   ` Linus Walleij
2021-10-01 12:33                     ` Daniel Palmer
2021-10-02  3:08                     ` Daniel Palmer
2021-09-21  6:11         ` Daniel Palmer [this message]
2021-09-14 10:04 ` [PATCH 3/3] ARM: dts: mstar: Add gpi interrupt controller to i2m Daniel Palmer
2021-09-14 15:59 ` [PATCH 0/3] SigmaStar SSD20XD GPIO interrupt controller Andrew Lunn
2021-09-15  9:06   ` Daniel Palmer
2021-09-15 20:34     ` Andrew Lunn
2021-09-20  8:36       ` Daniel Palmer

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