* [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support
@ 2021-03-12 6:24 dillon.minfei
2021-03-12 6:24 ` [PATCH v2 1/8] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei
` (7 more replies)
0 siblings, 8 replies; 14+ messages in thread
From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw)
To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32,
alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, linux, vladimir.murzin, afzal.mohd.ma
Cc: dillon min
From: dillon min <dillon.minfei@gmail.com>
This patchset intend to add art-pi board support, this board developed
by rt-thread(https://www.rt-thread.org/).
Board resources:
8MiB QSPI flash
16MiB SPI flash
32MiB SDRAM
AP6212 wifi,bt,fm comb
sw context:
- as stm32h750 just has 128k bytes internal flash, so running a fw on
internal flash to download u-boot/kernel to qspi flash, boot
u-boot/kernel from qspi flash. this fw is based on rt-thread.
- kernel can be xip on qspi flash or load to sdram
- root filesystem is jffs2(created by buildroot), stored on spi flash
to support the boad, add following changes.
- fix r0-r3, r12 register restore failed after svc call,
- add dts binding
- update yaml doc
changes in v2:
- reorganize the pinctrl device tree about stm32h7-pinctrl/stm32h743/750-pinctrl
stm32h7-pinctrl.dtsi --> stm32h743-pinctrl.dtsi --> stm32h743i-disco.dts
| |-> stm32h743i-eval.dts
|-> stm32h750-pinctrl.dtsi --> stm32h750i-art-pi.dts
same to the stm32f7/f4's pinctrl style
- fix author name/copyright mistake
- add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they
have same pin alternate functions, update Kconfig description
- make item in stm32h750i-art-pi.dts sort by letter
dillon min (8):
Documentation: arm: stm32: Add stm32h750 value line doc
dt-bindings: arm: stm32: Add compatible strings for ART-PI board
dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
ARM: dts: stm32: add stm32h750-pinctrl.dtsi
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
ARM: stm32: Add a new SOC - STM32H750
pinctrl: stm32: Add STM32H750 MCU pinctrl support
Documentation/arm/index.rst | 1 +
Documentation/arm/stm32/stm32h750-overview.rst | 33 ++
.../devicetree/bindings/arm/stm32/stm32.yaml | 4 +
.../bindings/pinctrl/st,stm32-pinctrl.yaml | 1 +
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 392 +++++++++++++++++++++
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 307 +---------------
arch/arm/boot/dts/stm32h743.dtsi | 30 ++
arch/arm/boot/dts/stm32h750-pinctrl.dtsi | 11 +
arch/arm/boot/dts/stm32h750.dtsi | 5 +
arch/arm/boot/dts/stm32h750i-art-pi.dts | 228 ++++++++++++
arch/arm/mach-stm32/board-dt.c | 1 +
drivers/pinctrl/stm32/Kconfig | 2 +-
drivers/pinctrl/stm32/pinctrl-stm32h743.c | 3 +
14 files changed, 717 insertions(+), 302 deletions(-)
create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst
create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/stm32h750-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/stm32h750.dtsi
create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v2 1/8] Documentation: arm: stm32: Add stm32h750 value line doc 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-12 6:24 ` [PATCH v2 2/8] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei ` (6 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patchset add support for soc stm32h750, stm32h750 has mirror different from stm32h743 item stm32h743 stm32h750 flash size: 2MiB 128KiB adc: none 3 crypto-hash: none aes/hamc/des/tdes/md5/sha detail information can be found at: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: just add more commit message description Documentation/arm/index.rst | 1 + Documentation/arm/stm32/stm32h750-overview.rst | 33 ++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) create mode 100644 Documentation/arm/stm32/stm32h750-overview.rst diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst index b4bea32472b6..d4f34ae9e6f4 100644 --- a/Documentation/arm/index.rst +++ b/Documentation/arm/index.rst @@ -52,6 +52,7 @@ SoC-specific documents stm32/stm32f746-overview stm32/overview stm32/stm32h743-overview + stm32/stm32h750-overview stm32/stm32f769-overview stm32/stm32f429-overview stm32/stm32mp157-overview diff --git a/Documentation/arm/stm32/stm32h750-overview.rst b/Documentation/arm/stm32/stm32h750-overview.rst new file mode 100644 index 000000000000..c8ce59ec3bd1 --- /dev/null +++ b/Documentation/arm/stm32/stm32h750-overview.rst @@ -0,0 +1,33 @@ +================== +STM32H750 Overview +================== + +Introduction +------------ + +The STM32H750 is a Cortex-M7 MCU aimed at various applications. +It features: + +- Cortex-M7 core running up to @480MHz +- 128K internal flash, 1MBytes internal RAM +- FMC controller to connect SDRAM, NOR and NAND memories +- Dual mode QSPI +- SD/MMC/SDIO support +- Ethernet controller +- USB OTFG FS & HS controllers +- I2C, SPI, CAN busses support +- Several 16 & 32 bits general purpose timers +- Serial Audio interface +- LCD controller +- HDMI-CEC +- SPDIFRX +- DFSDM + +Resources +--------- + +Datasheet and reference manual are publicly available on ST website (STM32H750_). + +.. _STM32H750: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html + +:Authors: Dillon Min <dillon.minfei@gmail.com> -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 2/8] dt-bindings: arm: stm32: Add compatible strings for ART-PI board 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-12 6:24 ` [PATCH v2 1/8] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-12 6:24 ` [PATCH v2 3/8] dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl dillon.minfei ` (5 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> Art-pi based on stm32h750xbh6, with following resources: -8MiB QSPI flash -16MiB SPI flash -32MiB SDRAM -AP6212 wifi, bt, fm detail information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: no changes Documentation/devicetree/bindings/arm/stm32/stm32.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index e7525a3395e5..306e7551ad39 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -53,6 +53,10 @@ properties: - const: st,stm32h743 - items: - enum: + - st,stm32h750i-art-pi + - const: st,stm32h750 + - items: + - enum: - shiratech,stm32mp157a-iot-box # IoT Box - shiratech,stm32mp157a-stinger96 # Stinger96 - st,stm32mp157c-ed1 -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 3/8] dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-12 6:24 ` [PATCH v2 1/8] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei 2021-03-12 6:24 ` [PATCH v2 2/8] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-12 6:24 ` [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei ` (4 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patch intend to add pinctrl configuration support for stm32h750 value line The datasheet of stm32h750 value line can be found at: https://www.st.com/resource/en/datasheet/stm32h750ib.pdf Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: just add more commit message description Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index 72877544ca78..59f33cbe8f48 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -24,6 +24,7 @@ properties: - st,stm32f746-pinctrl - st,stm32f769-pinctrl - st,stm32h743-pinctrl + - st,stm32h750-pinctrl - st,stm32mp157-pinctrl - st,stm32mp157-z-pinctrl -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (2 preceding siblings ...) 2021-03-12 6:24 ` [PATCH v2 3/8] dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-15 0:25 ` kernel test robot 2021-03-12 6:24 ` [PATCH v2 5/8] ARM: dts: stm32: add stm32h750-pinctrl.dtsi dillon.minfei ` (3 subsequent siblings) 7 siblings, 1 reply; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patch is intend to add support stm32h750 value line, just add stm32h7-pinctrl.dtsi for extending, with following changes: - rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi - move compatible string "st,stm32h743-pinctrl" from stm32h7-pinctrl.dtsi to stm32h743-pinctrl.dtsi Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: - reorganize the pinctrl device tree about stm32h7-pinctrl/stm32h743/750-pinctrl stm32h7-pinctrl.dtsi --> stm32h743-pinctrl.dtsi --> stm32h743i-disco.dts | |-> stm32h743i-eval.dts |-> stm32h750-pinctrl.dtsi --> stm32h750i-art-pi.dts same to the stm32f7/f4's pinctrl style arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 305 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 307 +------------------------------ 2 files changed, 311 insertions(+), 301 deletions(-) create mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi diff --git a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi new file mode 100644 index 000000000000..9fcc1e3ba925 --- /dev/null +++ b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi @@ -0,0 +1,305 @@ +/* + * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include <dt-bindings/pinctrl/stm32-pinfunc.h> + +/ { + soc { + pinctrl: pin-controller { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x58020000 0x3000>; + interrupt-parent = <&exti>; + st,syscfg = <&syscfg 0x8>; + pins-are-numbered; + + gpioa: gpio@58020000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x0 0x400>; + clocks = <&rcc GPIOA_CK>; + st,bank-name = "GPIOA"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiob: gpio@58020400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x400 0x400>; + clocks = <&rcc GPIOB_CK>; + st,bank-name = "GPIOB"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioc: gpio@58020800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x800 0x400>; + clocks = <&rcc GPIOC_CK>; + st,bank-name = "GPIOC"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiod: gpio@58020c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0xc00 0x400>; + clocks = <&rcc GPIOD_CK>; + st,bank-name = "GPIOD"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioe: gpio@58021000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1000 0x400>; + clocks = <&rcc GPIOE_CK>; + st,bank-name = "GPIOE"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiof: gpio@58021400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1400 0x400>; + clocks = <&rcc GPIOF_CK>; + st,bank-name = "GPIOF"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiog: gpio@58021800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1800 0x400>; + clocks = <&rcc GPIOG_CK>; + st,bank-name = "GPIOG"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioh: gpio@58021c00 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x1c00 0x400>; + clocks = <&rcc GPIOH_CK>; + st,bank-name = "GPIOH"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioi: gpio@58022000 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2000 0x400>; + clocks = <&rcc GPIOI_CK>; + st,bank-name = "GPIOI"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioj: gpio@58022400 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2400 0x400>; + clocks = <&rcc GPIOJ_CK>; + st,bank-name = "GPIOJ"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiok: gpio@58022800 { + gpio-controller; + #gpio-cells = <2>; + reg = <0x2800 0x400>; + clocks = <&rcc GPIOK_CK>; + st,bank-name = "GPIOK"; + interrupt-controller; + #interrupt-cells = <2>; + }; + + i2c1_pins_a: i2c1-0 { + pins { + pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ + <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + ethernet_rmii: rmii-0 { + pins { + pinmux = <STM32_PINMUX('G', 11, AF11)>, + <STM32_PINMUX('G', 13, AF11)>, + <STM32_PINMUX('G', 12, AF11)>, + <STM32_PINMUX('C', 4, AF11)>, + <STM32_PINMUX('C', 5, AF11)>, + <STM32_PINMUX('A', 7, AF11)>, + <STM32_PINMUX('C', 1, AF11)>, + <STM32_PINMUX('A', 2, AF11)>, + <STM32_PINMUX('A', 1, AF11)>; + slew-rate = <2>; + }; + }; + + sdmmc1_b4_pins_a: sdmmc1-b4-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins2{ + pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + + sdmmc1_dir_pins_a: sdmmc1-dir-0 { + pins1 { + pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */ + slew-rate = <3>; + drive-push-pull; + bias-pull-up; + }; + pins2{ + pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */ + bias-pull-up; + }; + }; + + sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { + pins { + pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */ + <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ + <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ + <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */ + }; + }; + + usart1_pins: usart1-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ + bias-disable; + }; + }; + + usart2_pins: usart2-0 { + pins1 { + pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ + bias-disable; + }; + }; + + usbotg_hs_pins_a: usbotg-hs-0 { + pins { + pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ + <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */ + <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */ + <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */ + <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */ + <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */ + <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */ + <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */ + <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */ + <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */ + <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */ + <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi index fa5dcb6a5fdd..6b1e115307b9 100644 --- a/arch/arm/boot/dts/stm32h743-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32h743-pinctrl.dtsi @@ -1,306 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. + * Copyright (C) STMicroelectronics 2017 - All Rights Reserved + * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics. */ -#include <dt-bindings/pinctrl/stm32-pinfunc.h> +#include "stm32h7-pinctrl.dtsi" -/ { - soc { - pin-controller { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,stm32h743-pinctrl"; - ranges = <0 0x58020000 0x3000>; - interrupt-parent = <&exti>; - st,syscfg = <&syscfg 0x8>; - pins-are-numbered; - - gpioa: gpio@58020000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x0 0x400>; - clocks = <&rcc GPIOA_CK>; - st,bank-name = "GPIOA"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiob: gpio@58020400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x400 0x400>; - clocks = <&rcc GPIOB_CK>; - st,bank-name = "GPIOB"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioc: gpio@58020800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x800 0x400>; - clocks = <&rcc GPIOC_CK>; - st,bank-name = "GPIOC"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiod: gpio@58020c00 { - gpio-controller; - #gpio-cells = <2>; - reg = <0xc00 0x400>; - clocks = <&rcc GPIOD_CK>; - st,bank-name = "GPIOD"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioe: gpio@58021000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1000 0x400>; - clocks = <&rcc GPIOE_CK>; - st,bank-name = "GPIOE"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiof: gpio@58021400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1400 0x400>; - clocks = <&rcc GPIOF_CK>; - st,bank-name = "GPIOF"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiog: gpio@58021800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1800 0x400>; - clocks = <&rcc GPIOG_CK>; - st,bank-name = "GPIOG"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioh: gpio@58021c00 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x1c00 0x400>; - clocks = <&rcc GPIOH_CK>; - st,bank-name = "GPIOH"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioi: gpio@58022000 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2000 0x400>; - clocks = <&rcc GPIOI_CK>; - st,bank-name = "GPIOI"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpioj: gpio@58022400 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2400 0x400>; - clocks = <&rcc GPIOJ_CK>; - st,bank-name = "GPIOJ"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpiok: gpio@58022800 { - gpio-controller; - #gpio-cells = <2>; - reg = <0x2800 0x400>; - clocks = <&rcc GPIOK_CK>; - st,bank-name = "GPIOK"; - interrupt-controller; - #interrupt-cells = <2>; - }; - - i2c1_pins_a: i2c1-0 { - pins { - pinmux = <STM32_PINMUX('B', 6, AF4)>, /* I2C1_SCL */ - <STM32_PINMUX('B', 7, AF4)>; /* I2C1_SDA */ - bias-disable; - drive-open-drain; - slew-rate = <0>; - }; - }; - - ethernet_rmii: rmii-0 { - pins { - pinmux = <STM32_PINMUX('G', 11, AF11)>, - <STM32_PINMUX('G', 13, AF11)>, - <STM32_PINMUX('G', 12, AF11)>, - <STM32_PINMUX('C', 4, AF11)>, - <STM32_PINMUX('C', 5, AF11)>, - <STM32_PINMUX('A', 7, AF11)>, - <STM32_PINMUX('C', 1, AF11)>, - <STM32_PINMUX('A', 2, AF11)>, - <STM32_PINMUX('A', 1, AF11)>; - slew-rate = <2>; - }; - }; - - sdmmc1_b4_pins_a: sdmmc1-b4-0 { - pins { - pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, AF12)>, /* SDMMC1_CK */ - <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ - slew-rate = <3>; - drive-push-pull; - bias-disable; - }; - }; - - sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { - pins1 { - pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ - slew-rate = <3>; - drive-push-pull; - bias-disable; - }; - pins2{ - pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ - slew-rate = <3>; - drive-open-drain; - bias-disable; - }; - }; - - sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { - pins { - pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ - <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ - <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ - <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ - <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ - <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ - }; - }; - - sdmmc1_dir_pins_a: sdmmc1-dir-0 { - pins1 { - pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ - <STM32_PINMUX('C', 7, AF8)>, /* SDMMC1_D123DIR */ - <STM32_PINMUX('B', 9, AF7)>; /* SDMMC1_CDIR */ - slew-rate = <3>; - drive-push-pull; - bias-pull-up; - }; - pins2{ - pinmux = <STM32_PINMUX('B', 8, AF7)>; /* SDMMC1_CKIN */ - bias-pull-up; - }; - }; - - sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 { - pins { - pinmux = <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC1_D0DIR */ - <STM32_PINMUX('C', 7, ANALOG)>, /* SDMMC1_D123DIR */ - <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */ - <STM32_PINMUX('B', 8, ANALOG)>; /* SDMMC1_CKIN */ - }; - }; - - usart1_pins: usart1-0 { - pins1 { - pinmux = <STM32_PINMUX('B', 14, AF4)>; /* USART1_TX */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = <STM32_PINMUX('B', 15, AF4)>; /* USART1_RX */ - bias-disable; - }; - }; - - usart2_pins: usart2-0 { - pins1 { - pinmux = <STM32_PINMUX('D', 5, AF7)>; /* USART2_TX */ - bias-disable; - drive-push-pull; - slew-rate = <0>; - }; - pins2 { - pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */ - bias-disable; - }; - }; - - usbotg_hs_pins_a: usbotg-hs-0 { - pins { - pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ - <STM32_PINMUX('I', 11, AF10)>, /* ULPI_DIR> */ - <STM32_PINMUX('C', 0, AF10)>, /* ULPI_STP> */ - <STM32_PINMUX('A', 5, AF10)>, /* ULPI_CK> */ - <STM32_PINMUX('A', 3, AF10)>, /* ULPI_D0> */ - <STM32_PINMUX('B', 0, AF10)>, /* ULPI_D1> */ - <STM32_PINMUX('B', 1, AF10)>, /* ULPI_D2> */ - <STM32_PINMUX('B', 10, AF10)>, /* ULPI_D3> */ - <STM32_PINMUX('B', 11, AF10)>, /* ULPI_D4> */ - <STM32_PINMUX('B', 12, AF10)>, /* ULPI_D5> */ - <STM32_PINMUX('B', 13, AF10)>, /* ULPI_D6> */ - <STM32_PINMUX('B', 5, AF10)>; /* ULPI_D7> */ - bias-disable; - drive-push-pull; - slew-rate = <2>; - }; - }; - }; - }; +&pinctrl{ + compatible = "st,stm32h743-pinctrl"; }; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 2021-03-12 6:24 ` [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei @ 2021-03-15 0:25 ` kernel test robot 0 siblings, 0 replies; 14+ messages in thread From: kernel test robot @ 2021-03-15 0:25 UTC (permalink / raw) To: dillon.minfei, robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux Cc: kbuild-all Hi, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on stm32/stm32-next] [also build test WARNING on robh/for-next soc/for-next v5.12-rc2 next-20210312] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/dillon-minfei-gmail-com/ARM-STM32-add-art-pi-stm32h750xbh6-board-support/20210312-142805 base: https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next :::::: branch date: 17 hours ago :::::: commit date: 17 hours ago compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce: make ARCH=arm dtbs_check If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> "dtcheck warnings: (new ones prefixed by >>)" >> arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: pin-controller: {'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 1476526080, 12288]], 'interrupt-parent': [[17]], 'st,syscfg': [[23, 8]], 'pins-are-numbered': True, 'compatible': ['st,stm32h743-pinctrl'], 'gpio@58020000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[0, 1024]], 'clocks': [[2, 86]], 'st,bank-name': ['GPIOA'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[1024, 1024]], 'clocks': [[2, 85]], 'st,bank-name': ['GPIOB'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[2048, 1024]], 'clocks': [[2, 84]], 'st,bank-name': ['GPIOC'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[3072, 1024]], 'clocks': [[2, 83]], 's t,bank-name': ['GPIOD'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[4096, 1024]], 'clocks': [[2, 82]], 'st,bank-name': ['GPIOE'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[5120, 1024]], 'clocks': [[2, 81]], 'st,bank-name': ['GPIOF'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[6144, 1024]], 'clocks': [[2, 80]], 'st,bank-name': ['GPIOG'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[7168, 1024]], 'clocks': [[2, 79]], 'st,bank-name': ['GPIOH'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[8192, 1024]], 'clocks': [[2, 78]], 'st,bank-name': ['GPIOI'], 'i nterrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[9216, 1024]], 'clocks': [[2, 77]], 'st,bank-name': ['GPIOJ'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[10240, 1024]], 'clocks': [[2, 76]], 'st,bank-name': ['GPIOK'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'i2c1-0': {'phandle': [[3]], 'pins': {'pinmux': [[5637], [5893]], 'bias-disable': True, 'drive-open-drain': True, 'slew-rate': [[0]]}}, 'rmii-0': {'phandle': [[24]], 'pins': {'pinmux': [[27404], [27916], [27660], [9228], [9484], [1804], [8460], [524], [268]], 'slew-rate': [[2]]}}, 'sdmmc1-b4-0': {'phandle': [[11]], 'pins': {'pinmux': [[10253], [10509], [10765], [11021], [11277], [12813]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}}, 'sdmmc1-b4-od-0': {'phandle': [[13]], 'pins1': {'pinmux': [[10253], [10509], [10765], [1102 1], [11277]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}, 'pins2': {'pinmux': [[12813]], 'slew-rate': [[3]], 'drive-open-drain': True, 'bias-disable': True}}, 'sdmmc1-b4-sleep-0': {'phandle': [[14]], 'pins': {'pinmux': [[10257], [10513], [10769], [11025], [11281], [12817]]}}, 'sdmmc1-dir-0': {'phandle': [[12]], 'pins1': {'pinmux': [[9737], [9993], [6408]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-pull-up': True}, 'pins2': {'pinmux': [[6152]], 'bias-pull-up': True}}, 'sdmmc1-dir-sleep-0': {'phandle': [[15]], 'pins': {'pinmux': [[9745], [10001], [6417], [6161]]}}, 'usart1-0': {'phandle': [[4]], 'pins1': {'pinmux': [[7685]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[7941]], 'bias-disable': True}}, 'usart2-0': {'pins1': {'pinmux': [[13576]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[13832]], 'bias-disable': True}}, 'usbotg-hs-0': {'phandle': [[9]], 'pins': {' pinmux': [[29707], [35595], [8203], [1291], [779], [4107], [4363], [6667], [6923], [7179], [7435], [5387]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[2]]}}} From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml arch/arm/boot/dts/stm32h743i-eval.dt.yaml: soc: 'i2c@40005C00', 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml -- >> arch/arm/boot/dts/stm32h743i-disco.dt.yaml: soc: pin-controller: {'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 1476526080, 12288]], 'interrupt-parent': [[11]], 'st,syscfg': [[17, 8]], 'pins-are-numbered': True, 'compatible': ['st,stm32h743-pinctrl'], 'gpio@58020000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[0, 1024]], 'clocks': [[2, 86]], 'st,bank-name': ['GPIOA'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[1024, 1024]], 'clocks': [[2, 85]], 'st,bank-name': ['GPIOB'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[2048, 1024]], 'clocks': [[2, 84]], 'st,bank-name': ['GPIOC'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[3072, 1024]], 'clocks': [[2, 83]], ' st,bank-name': ['GPIOD'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[4096, 1024]], 'clocks': [[2, 82]], 'st,bank-name': ['GPIOE'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[5120, 1024]], 'clocks': [[2, 81]], 'st,bank-name': ['GPIOF'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[6144, 1024]], 'clocks': [[2, 80]], 'st,bank-name': ['GPIOG'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[7168, 1024]], 'clocks': [[2, 79]], 'st,bank-name': ['GPIOH'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[8192, 1024]], 'clocks': [[2, 78]], 'st,bank-name': ['GPIOI'], ' interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[9216, 1024]], 'clocks': [[2, 77]], 'st,bank-name': ['GPIOJ'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[10240, 1024]], 'clocks': [[2, 76]], 'st,bank-name': ['GPIOK'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'i2c1-0': {'pins': {'pinmux': [[5637], [5893]], 'bias-disable': True, 'drive-open-drain': True, 'slew-rate': [[0]]}}, 'rmii-0': {'phandle': [[18]], 'pins': {'pinmux': [[27404], [27916], [27660], [9228], [9484], [1804], [8460], [524], [268]], 'slew-rate': [[2]]}}, 'sdmmc1-b4-0': {'phandle': [[7]], 'pins': {'pinmux': [[10253], [10509], [10765], [11021], [11277], [12813]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}}, 'sdmmc1-b4-od-0': {'phandle': [[8]], 'pins1': {'pinmux': [[10253], [10509], [10765], [11021], [11277]], 'slew -rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}, 'pins2': {'pinmux': [[12813]], 'slew-rate': [[3]], 'drive-open-drain': True, 'bias-disable': True}}, 'sdmmc1-b4-sleep-0': {'phandle': [[9]], 'pins': {'pinmux': [[10257], [10513], [10769], [11025], [11281], [12817]]}}, 'sdmmc1-dir-0': {'pins1': {'pinmux': [[9737], [9993], [6408]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-pull-up': True}, 'pins2': {'pinmux': [[6152]], 'bias-pull-up': True}}, 'sdmmc1-dir-sleep-0': {'pins': {'pinmux': [[9745], [10001], [6417], [6161]]}}, 'usart1-0': {'pins1': {'pinmux': [[7685]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[7941]], 'bias-disable': True}}, 'usart2-0': {'phandle': [[3]], 'pins1': {'pinmux': [[13576]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[13832]], 'bias-disable': True}}, 'usbotg-hs-0': {'pins': {'pinmux': [[29707], [35595], [8203], [1291], [779], [4107], [4363], [6667], [ 6923], [7179], [7435], [5387]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[2]]}}} From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml arch/arm/boot/dts/stm32h743i-disco.dt.yaml: soc: 'i2c@40005C00', 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 5/8] ARM: dts: stm32: add stm32h750-pinctrl.dtsi 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (3 preceding siblings ...) 2021-03-12 6:24 ` [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-12 6:24 ` [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei ` (2 subsequent siblings) 7 siblings, 0 replies; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patch add stm32h750-pinctrl.dtsi which just reference stm32h7-pinctrl.dtsi Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: no changes arch/arm/boot/dts/stm32h750-pinctrl.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 arch/arm/boot/dts/stm32h750-pinctrl.dtsi diff --git a/arch/arm/boot/dts/stm32h750-pinctrl.dtsi b/arch/arm/boot/dts/stm32h750-pinctrl.dtsi new file mode 100644 index 000000000000..24e99970167c --- /dev/null +++ b/arch/arm/boot/dts/stm32h750-pinctrl.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright (C) STMicroelectronics 2021 - All Rights Reserved + * Author: Dillon Min <dillon.minfei@gmail.com> for STMicroelectronics. + */ + +#include "stm32h7-pinctrl.dtsi" + +&pinctrl{ + compatible = "st,stm32h750-pinctrl"; +}; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (4 preceding siblings ...) 2021-03-12 6:24 ` [PATCH v2 5/8] ARM: dts: stm32: add stm32h750-pinctrl.dtsi dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-15 0:25 ` kernel test robot 2021-03-12 6:24 ` [PATCH v2 7/8] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei 2021-03-12 6:24 ` [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support dillon.minfei 7 siblings, 1 reply; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add dts binding usart3 for bt, uart4 for console usart3/uart4 pinctrl in stm32h7-pinctrl.dtsi usart3/uart4 register in stm32h743.dtsi - add dts binding sdmmc2 for wifi sdmmc2 pinctrl in stm32h7-pinctrl.dtsi sdmmc2 register in stm32h743.dtsi - add spi1 pinctrl in stm32h7-pinctrl.dtsi for spi flash - add stm32h750-art-pi.dts to support art-pi board art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: - fix author name/copyright mistake - make item in stm32h750i-art-pi.dts sort by letter arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/stm32h7-pinctrl.dtsi | 87 ++++++++++++ arch/arm/boot/dts/stm32h743.dtsi | 30 +++++ arch/arm/boot/dts/stm32h750.dtsi | 5 + arch/arm/boot/dts/stm32h750i-art-pi.dts | 228 ++++++++++++++++++++++++++++++++ 5 files changed, 351 insertions(+) create mode 100644 arch/arm/boot/dts/stm32h750.dtsi create mode 100644 arch/arm/boot/dts/stm32h750i-art-pi.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 8e5d4ab4e75e..a19c5ab9df84 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1071,6 +1071,7 @@ dtb-$(CONFIG_ARCH_STM32) += \ stm32746g-eval.dtb \ stm32h743i-eval.dtb \ stm32h743i-disco.dtb \ + stm32h750i-art-pi.dtb \ stm32mp153c-dhcom-drc02.dtb \ stm32mp157a-avenger96.dtb \ stm32mp157a-dhcor-avenger96.dtb \ diff --git a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi index 9fcc1e3ba925..0d08225a16de 100644 --- a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi @@ -231,6 +231,50 @@ }; }; + sdmmc2_b4_pins_a: sdmmc2-b4-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC1_D0 */ + <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, AF11)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + }; + + sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */ + <STM32_PINMUX('B', 15, AF9)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, AF9)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, AF9)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, AF11)>; /* SDMMC1_CK */ + slew-rate = <3>; + drive-push-pull; + bias-disable; + }; + pins2{ + pinmux = <STM32_PINMUX('D', 7, AF11)>; /* SDMMC1_CMD */ + slew-rate = <3>; + drive-open-drain; + bias-disable; + }; + }; + + sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { + pins { + pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC1_D0 */ + <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC1_D1 */ + <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC1_D2 */ + <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC1_D3 */ + <STM32_PINMUX('D', 6, ANALOG)>, /* SDMMC1_CK */ + <STM32_PINMUX('D', 7, ANALOG)>; /* SDMMC1_CMD */ + }; + }; + sdmmc1_dir_pins_a: sdmmc1-dir-0 { pins1 { pinmux = <STM32_PINMUX('C', 6, AF8)>, /* SDMMC1_D0DIR */ @@ -281,6 +325,32 @@ }; }; + usart3_pins: usart3-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */ + bias-disable; + }; + }; + + uart4_pins: uart4-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 0, AF8)>; /* UART4_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = <STM32_PINMUX('I', 9, AF8)>; /* UART4_RX */ + bias-disable; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* ULPI_NXT */ @@ -300,6 +370,23 @@ slew-rate = <2>; }; }; + + spi1_pins: spi1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 5, AF5)>, + /* SPI1_CLK */ + <STM32_PINMUX('B', 5, AF5)>; + /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + pins2 { + pinmux = <STM32_PINMUX('G', 9, AF5)>; + /* SPI1_MISO */ + bias-disable; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi index 4ebffb0a45a3..981d44051007 100644 --- a/arch/arm/boot/dts/stm32h743.dtsi +++ b/arch/arm/boot/dts/stm32h743.dtsi @@ -135,6 +135,22 @@ clocks = <&rcc USART2_CK>; }; + usart3: serial@40004800 { + compatible = "st,stm32h7-uart"; + reg = <0x40004800 0x400>; + interrupts = <39>; + status = "disabled"; + clocks = <&rcc USART3_CK>; + }; + + uart4: serial@40004c00 { + compatible = "st,stm32h7-uart"; + reg = <0x40004c00 0x400>; + interrupts = <52>; + status = "disabled"; + clocks = <&rcc UART4_CK>; + }; + i2c1: i2c@40005400 { compatible = "st,stm32f7-i2c"; #address-cells = <1>; @@ -368,6 +384,20 @@ max-frequency = <120000000>; }; + sdmmc2: mmc@48022400 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x10153180>; + reg = <0x48022400 0x400>; + interrupts = <124>; + interrupt-names = "cmd_irq"; + clocks = <&rcc SDMMC2_CK>; + clock-names = "apb_pclk"; + resets = <&rcc STM32H7_AHB2_RESET(SDMMC2)>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <120000000>; + }; + exti: interrupt-controller@58000000 { compatible = "st,stm32h7-exti"; interrupt-controller; diff --git a/arch/arm/boot/dts/stm32h750.dtsi b/arch/arm/boot/dts/stm32h750.dtsi new file mode 100644 index 000000000000..dd9166223c2f --- /dev/null +++ b/arch/arm/boot/dts/stm32h750.dtsi @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ +/* Copyright (C) STMicroelectronics 2021 - All Rights Reserved */ + +#include "stm32h743.dtsi" + diff --git a/arch/arm/boot/dts/stm32h750i-art-pi.dts b/arch/arm/boot/dts/stm32h750i-art-pi.dts new file mode 100644 index 000000000000..7f8bf8679725 --- /dev/null +++ b/arch/arm/boot/dts/stm32h750i-art-pi.dts @@ -0,0 +1,228 @@ +/* + * Copyright 2021 - Dillon Min <dillon.minfei@gmail.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * For art-pi board resources, you can refer to link: + * https://art-pi.gitee.io/website/ + */ + +/dts-v1/; +#include "stm32h750.dtsi" +#include "stm32h750-pinctrl.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "RT-Thread STM32H750i-ART-PI board"; + compatible = "st,stm32h750i-art-pi", "st,stm32h750"; + + chosen { + bootargs = "root=/dev/ram"; + stdout-path = "serial0:2000000n8"; + }; + + memory@c0000000 { + device_type = "memory"; + reg = <0xc0000000 0x2000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x100000>; + linux,dma-default; + }; + }; + + aliases { + serial0 = &uart4; + serial1 = &usart3; + }; + + leds { + compatible = "gpio-leds"; + led-red { + gpios = <&gpioi 8 0>; + }; + led-green { + gpios = <&gpioc 15 0>; + linux,default-trigger = "heartbeat"; + }; + }; + + v3v3: regulator-v3v3 { + compatible = "regulator-fixed"; + regulator-name = "v3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + wlan_pwr: regulator-wlan { + compatible = "regulator-fixed"; + + regulator-name = "wl-reg"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&clk_hse { + clock-frequency = <25000000>; +}; + +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +&mac { + status = "disabled"; + pinctrl-0 = <ðernet_rmii>; + pinctrl-names = "default"; + phy-mode = "rmii"; + phy-handle = <&phy0>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&sdmmc1 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc1_b4_pins_a>; + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; + broken-cd; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&v3v3>; + status = "okay"; +}; + +&sdmmc2 { + pinctrl-names = "default", "opendrain", "sleep"; + pinctrl-0 = <&sdmmc2_b4_pins_a>; + pinctrl-1 = <&sdmmc2_b4_od_pins_a>; + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>; + broken-cd; + non-removable; + st,neg-edge; + bus-width = <4>; + vmmc-supply = <&wlan_pwr>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +&spi1 { + status = "okay"; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>; + dmas = <&dmamux1 37 0x400 0x05>, + <&dmamux1 38 0x400 0x05>; + dma-names = "rx", "tx"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + + partition@0 { + label = "root filesystem"; + reg = <0 0x1000000>; + }; + }; +}; + +&usart2 { + pinctrl-0 = <&usart2_pins>; + pinctrl-names = "default"; + status = "disabled"; +}; + +&usart3 { + /delete-property/st,hw-flow-ctrl; + cts-gpios = <&gpiod 11 GPIO_ACTIVE_LOW>; + rts-gpios = <&gpiod 12 GPIO_ACTIVE_LOW>; + dmas = <&dmamux1 45 0x400 0x05>, + <&dmamux1 46 0x400 0x05>; + dma-names = "rx", "tx"; + status = "okay"; + + bluetooth { + host-wakeup-gpios = <&gpioc 0 GPIO_ACTIVE_HIGH>; + device-wakeup-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; + shutdown-gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>; + compatible = "brcm,bcm43438-bt"; + max-speed = <115200>; + }; +}; + +&uart4 { + pinctrl-0 = <&uart4_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 2021-03-12 6:24 ` [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei @ 2021-03-15 0:25 ` kernel test robot 0 siblings, 0 replies; 14+ messages in thread From: kernel test robot @ 2021-03-15 0:25 UTC (permalink / raw) To: dillon.minfei, robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux Cc: kbuild-all Hi, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on stm32/stm32-next] [also build test WARNING on robh/for-next soc/for-next v5.12-rc2 next-20210312] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/dillon-minfei-gmail-com/ARM-STM32-add-art-pi-stm32h750xbh6-board-support/20210312-142805 base: https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git stm32-next compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0 reproduce: make ARCH=arm dtbs_check If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> "dtcheck warnings: (new ones prefixed by >>)" >> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: pin-controller: {'type': 'object'} is not allowed for {'#address-cells': [[1]], '#size-cells': [[1]], 'ranges': [[0, 1476526080, 12288]], 'interrupt-parent': [[22]], 'st,syscfg': [[28, 8]], 'pins-are-numbered': True, 'compatible': ['st,stm32h750-pinctrl'], 'gpio@58020000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[0, 1024]], 'clocks': [[2, 86]], 'st,bank-name': ['GPIOA'], 'interrupt-controller': True, '#interrupt-cells': [[2]], 'phandle': [[10]]}, 'gpio@58020400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[1024, 1024]], 'clocks': [[2, 85]], 'st,bank-name': ['GPIOB'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58020800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[2048, 1024]], 'clocks': [[2, 84]], 'st,bank-name': ['GPIOC'], 'interrupt-controller': True, '#interrupt-cells': [[2]], 'phandle': [[6]]}, 'gpio@58020c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[3072, 1024]], 'clocks': [[2, 83]], 'st,bank-name': ['GPIOD'], 'interrupt-controller': True, '#interrupt-cells': [[2]], 'phandle': [[4]]}, 'gpio@58021000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[4096, 1024]], 'clocks': [[2, 82]], 'st,bank-name': ['GPIOE'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[5120, 1024]], 'clocks': [[2, 81]], 'st,bank-name': ['GPIOF'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[6144, 1024]], 'clocks': [[2, 80]], 'st,bank-name': ['GPIOG'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58021c00': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[7168, 1024]], 'clocks': [[2, 79]], 'st,bank-name': ['GPIOH'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022000': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[8192, 1 024]], 'clocks': [[2, 78]], 'st,bank-name': ['GPIOI'], 'interrupt-controller': True, '#interrupt-cells': [[2]], 'phandle': [[7]]}, 'gpio@58022400': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[9216, 1024]], 'clocks': [[2, 77]], 'st,bank-name': ['GPIOJ'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'gpio@58022800': {'gpio-controller': True, '#gpio-cells': [[2]], 'reg': [[10240, 1024]], 'clocks': [[2, 76]], 'st,bank-name': ['GPIOK'], 'interrupt-controller': True, '#interrupt-cells': [[2]]}, 'i2c1-0': {'pins': {'pinmux': [[5637], [5893]], 'bias-disable': True, 'drive-open-drain': True, 'slew-rate': [[0]]}}, 'rmii-0': {'phandle': [[29]], 'pins': {'pinmux': [[27404], [27916], [27660], [9228], [9484], [1804], [8460], [524], [268]], 'slew-rate': [[2]]}}, 'sdmmc1-b4-0': {'phandle': [[14]], 'pins': {'pinmux': [[10253], [10509], [10765], [11021], [11277], [12813]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}}, 'sdmmc1-b4-od-0': {'phandle': [[15 ]], 'pins1': {'pinmux': [[10253], [10509], [10765], [11021], [11277]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}, 'pins2': {'pinmux': [[12813]], 'slew-rate': [[3]], 'drive-open-drain': True, 'bias-disable': True}}, 'sdmmc1-b4-sleep-0': {'phandle': [[16]], 'pins': {'pinmux': [[10257], [10513], [10769], [11025], [11281], [12817]]}}, 'sdmmc2-b4-0': {'phandle': [[18]], 'pins': {'pinmux': [[7690], [7946], [4874], [5130], [13836], [14092]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}}, 'sdmmc2-b4-od-0': {'phandle': [[19]], 'pins1': {'pinmux': [[7690], [7946], [4874], [5130], [13836]], 'slew-rate': [[3]], 'drive-push-pull': True, 'bias-disable': True}, 'pins2': {'pinmux': [[14092]], 'slew-rate': [[3]], 'drive-open-drain': True, 'bias-disable': True}}, 'sdmmc2-b4-sleep-0': {'phandle': [[20]], 'pins': {'pinmux': [[7697], [7953], [4881], [5137], [13841], [14097]]}}, 'sdmmc1-dir-0': {'pins1': {'pinmux': [[9737], [9993], [6408]], 'slew-rate': [[3] ], 'drive-push-pull': True, 'bias-pull-up': True}, 'pins2': {'pinmux': [[6152]], 'bias-pull-up': True}}, 'sdmmc1-dir-sleep-0': {'pins': {'pinmux': [[9745], [10001], [6417], [6161]]}}, 'usart1-0': {'pins1': {'pinmux': [[7685]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[7941]], 'bias-disable': True}}, 'usart2-0': {'phandle': [[3]], 'pins1': {'pinmux': [[13576]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[13832]], 'bias-disable': True}}, 'usart3-0': {'pins1': {'pinmux': [[6664]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[6920]], 'bias-disable': True}}, 'uart4-0': {'phandle': [[8]], 'pins1': {'pinmux': [[9]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[0]]}, 'pins2': {'pinmux': [[35081]], 'bias-disable': True}}, 'usbotg-hs-0': {'pins': {'pinmux': [[29707], [35595], [8203], [1291], [779], [4107], [4363], [6667], [6923], [7179], [ 7435], [5387]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[2]]}}, 'spi1-0': {'phandle': [[9]], 'pins1': {'pinmux': [[1286], [5382]], 'bias-disable': True, 'drive-push-pull': True, 'slew-rate': [[2]]}, 'pins2': {'pinmux': [[26886]], 'bias-disable': True}}} From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml >> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00', 'i2c@58001C00' do not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' From schema: /usr/local/lib/python3.9/dist-packages/dtschema/schemas/simple-bus.yaml >> arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: serial@40004800: 'bluetooth' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/serial/st,stm32-uart.yaml --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 7/8] ARM: stm32: Add a new SOC - STM32H750 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (5 preceding siblings ...) 2021-03-12 6:24 ` [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-12 6:24 ` [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support dillon.minfei 7 siblings, 0 replies; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> The STM32H750 is a Cortex-M7 MCU running at 480MHz and containing 128KBytes internal flash, 1MiB SRAM. Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: no changes arch/arm/mach-stm32/board-dt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c index 011d57b488c2..a766310d8dca 100644 --- a/arch/arm/mach-stm32/board-dt.c +++ b/arch/arm/mach-stm32/board-dt.c @@ -17,6 +17,7 @@ static const char *const stm32_compat[] __initconst = { "st,stm32f746", "st,stm32f769", "st,stm32h743", + "st,stm32h750", "st,stm32mp157", NULL }; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei ` (6 preceding siblings ...) 2021-03-12 6:24 ` [PATCH v2 7/8] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei @ 2021-03-12 6:24 ` dillon.minfei 2021-03-29 8:00 ` Alexandre TORGUE 7 siblings, 1 reply; 14+ messages in thread From: dillon.minfei @ 2021-03-12 6:24 UTC (permalink / raw) To: robh+dt, alexandre.torgue, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Cc: dillon min From: dillon min <dillon.minfei@gmail.com> This patch adds STM32H750 pinctrl and GPIO support since stm32h750 has the same pin alternate functions with stm32h743, so just reuse the stm32h743's pinctrl driver Signed-off-by: dillon min <dillon.minfei@gmail.com> --- v2: - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they have same pin alternate functions - add STM32H750 to Kconfig description drivers/pinctrl/stm32/Kconfig | 2 +- drivers/pinctrl/stm32/pinctrl-stm32h743.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig index f36f29113370..fb1ffc94c57f 100644 --- a/drivers/pinctrl/stm32/Kconfig +++ b/drivers/pinctrl/stm32/Kconfig @@ -35,7 +35,7 @@ config PINCTRL_STM32F769 select PINCTRL_STM32 config PINCTRL_STM32H743 - bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 + bool "STMicroelectronics STM32H743/STM32H750 pin control" if COMPILE_TEST && !MACH_STM32H743 depends on OF && HAS_IOMEM default MACH_STM32H743 select PINCTRL_STM32 diff --git a/drivers/pinctrl/stm32/pinctrl-stm32h743.c b/drivers/pinctrl/stm32/pinctrl-stm32h743.c index ffe7b5271506..700206c7bc11 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32h743.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32h743.c @@ -1966,6 +1966,9 @@ static const struct of_device_id stm32h743_pctrl_match[] = { .compatible = "st,stm32h743-pinctrl", .data = &stm32h743_match_data, }, + { .compatible = "st,stm32h750-pinctrl", + .data = &stm32h743_match_data, + }, { } }; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support 2021-03-12 6:24 ` [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support dillon.minfei @ 2021-03-29 8:00 ` Alexandre TORGUE 2021-03-29 8:07 ` dillon min 0 siblings, 1 reply; 14+ messages in thread From: Alexandre TORGUE @ 2021-03-29 8:00 UTC (permalink / raw) To: dillon.minfei, robh+dt, a.fatoum, mcoquelin.stm32, alexandre.torgue, devicetree, linux-stm32, linux-arm-kernel, linux-kernel, linux, vladimir.murzin, afzal.mohd.ma Hi Dillon On 3/12/21 7:24 AM, dillon.minfei@gmail.com wrote: > From: dillon min <dillon.minfei@gmail.com> > > This patch adds STM32H750 pinctrl and GPIO support > since stm32h750 has the same pin alternate functions > with stm32h743, so just reuse the stm32h743's pinctrl > driver > > Signed-off-by: dillon min <dillon.minfei@gmail.com> > --- > v2: > - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they > have same pin alternate functions > - add STM32H750 to Kconfig description > > drivers/pinctrl/stm32/Kconfig | 2 +- > drivers/pinctrl/stm32/pinctrl-stm32h743.c | 3 +++ > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig > index f36f29113370..fb1ffc94c57f 100644 > --- a/drivers/pinctrl/stm32/Kconfig > +++ b/drivers/pinctrl/stm32/Kconfig > @@ -35,7 +35,7 @@ config PINCTRL_STM32F769 > select PINCTRL_STM32 > > config PINCTRL_STM32H743 > - bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 > + bool "STMicroelectronics STM32H743/STM32H750 pin control" if COMPILE_TEST && !MACH_STM32H743 > depends on OF && HAS_IOMEM > default MACH_STM32H743 > select PINCTRL_STM32 > diff --git a/drivers/pinctrl/stm32/pinctrl-stm32h743.c b/drivers/pinctrl/stm32/pinctrl-stm32h743.c > index ffe7b5271506..700206c7bc11 100644 > --- a/drivers/pinctrl/stm32/pinctrl-stm32h743.c > +++ b/drivers/pinctrl/stm32/pinctrl-stm32h743.c > @@ -1966,6 +1966,9 @@ static const struct of_device_id stm32h743_pctrl_match[] = { > .compatible = "st,stm32h743-pinctrl", > .data = &stm32h743_match_data, > }, > + { .compatible = "st,stm32h750-pinctrl", > + .data = &stm32h743_match_data, > + }, If you use exactly the same driver (i.e. same ball out and AF mux) then you don't have to create a new compatible for that. Just use the same than h743.(so you don't have to factorize DT files). Regards Alex > { } > }; > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support 2021-03-29 8:00 ` Alexandre TORGUE @ 2021-03-29 8:07 ` dillon min 2021-03-29 10:13 ` Alexandre TORGUE 0 siblings, 1 reply; 14+ messages in thread From: dillon min @ 2021-03-29 8:07 UTC (permalink / raw) To: Alexandre TORGUE Cc: Rob Herring, Ahmad Fatoum, Maxime Coquelin, Alexandre Torgue, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, linux-stm32, Linux ARM, Linux Kernel Mailing List, linux, Vladimir Murzin, afzal.mohd.ma On Mon, Mar 29, 2021 at 4:00 PM Alexandre TORGUE <alexandre.torgue@foss.st.com> wrote: > > Hi Dillon > > On 3/12/21 7:24 AM, dillon.minfei@gmail.com wrote: > > From: dillon min <dillon.minfei@gmail.com> > > > > This patch adds STM32H750 pinctrl and GPIO support > > since stm32h750 has the same pin alternate functions > > with stm32h743, so just reuse the stm32h743's pinctrl > > driver > > > > Signed-off-by: dillon min <dillon.minfei@gmail.com> > > --- > > v2: > > - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they > > have same pin alternate functions > > - add STM32H750 to Kconfig description > > > > drivers/pinctrl/stm32/Kconfig | 2 +- > > drivers/pinctrl/stm32/pinctrl-stm32h743.c | 3 +++ > > 2 files changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig > > index f36f29113370..fb1ffc94c57f 100644 > > --- a/drivers/pinctrl/stm32/Kconfig > > +++ b/drivers/pinctrl/stm32/Kconfig > > @@ -35,7 +35,7 @@ config PINCTRL_STM32F769 > > select PINCTRL_STM32 > > > > config PINCTRL_STM32H743 > > - bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 > > + bool "STMicroelectronics STM32H743/STM32H750 pin control" if COMPILE_TEST && !MACH_STM32H743 > > depends on OF && HAS_IOMEM > > default MACH_STM32H743 > > select PINCTRL_STM32 > > diff --git a/drivers/pinctrl/stm32/pinctrl-stm32h743.c b/drivers/pinctrl/stm32/pinctrl-stm32h743.c > > index ffe7b5271506..700206c7bc11 100644 > > --- a/drivers/pinctrl/stm32/pinctrl-stm32h743.c > > +++ b/drivers/pinctrl/stm32/pinctrl-stm32h743.c > > @@ -1966,6 +1966,9 @@ static const struct of_device_id stm32h743_pctrl_match[] = { > > .compatible = "st,stm32h743-pinctrl", > > .data = &stm32h743_match_data, > > }, > > + { .compatible = "st,stm32h750-pinctrl", > > + .data = &stm32h743_match_data, > > + }, > > If you use exactly the same driver (i.e. same ball out and AF mux) then > you don't have to create a new compatible for that. Just use the same > than h743.(so you don't have to factorize DT files). Okay, yes they are the total same ball out and AF mux. I will delete it in the next submission. Just a kindly reminder , the newest version of this patchset is [PATCH v6]. Thanks. > > Regards > Alex > > > { } > > }; > > > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support 2021-03-29 8:07 ` dillon min @ 2021-03-29 10:13 ` Alexandre TORGUE 0 siblings, 0 replies; 14+ messages in thread From: Alexandre TORGUE @ 2021-03-29 10:13 UTC (permalink / raw) To: dillon min Cc: Rob Herring, Ahmad Fatoum, Maxime Coquelin, Alexandre Torgue, open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS, linux-stm32, Linux ARM, Linux Kernel Mailing List, linux, Vladimir Murzin, afzal.mohd.ma On 3/29/21 10:07 AM, dillon min wrote: > On Mon, Mar 29, 2021 at 4:00 PM Alexandre TORGUE > <alexandre.torgue@foss.st.com> wrote: >> >> Hi Dillon >> >> On 3/12/21 7:24 AM, dillon.minfei@gmail.com wrote: >>> From: dillon min <dillon.minfei@gmail.com> >>> >>> This patch adds STM32H750 pinctrl and GPIO support >>> since stm32h750 has the same pin alternate functions >>> with stm32h743, so just reuse the stm32h743's pinctrl >>> driver >>> >>> Signed-off-by: dillon min <dillon.minfei@gmail.com> >>> --- >>> v2: >>> - add compatible string st,stm32h750-pinctrl to pinctl-stm32h743.c as they >>> have same pin alternate functions >>> - add STM32H750 to Kconfig description >>> >>> drivers/pinctrl/stm32/Kconfig | 2 +- >>> drivers/pinctrl/stm32/pinctrl-stm32h743.c | 3 +++ >>> 2 files changed, 4 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig >>> index f36f29113370..fb1ffc94c57f 100644 >>> --- a/drivers/pinctrl/stm32/Kconfig >>> +++ b/drivers/pinctrl/stm32/Kconfig >>> @@ -35,7 +35,7 @@ config PINCTRL_STM32F769 >>> select PINCTRL_STM32 >>> >>> config PINCTRL_STM32H743 >>> - bool "STMicroelectronics STM32H743 pin control" if COMPILE_TEST && !MACH_STM32H743 >>> + bool "STMicroelectronics STM32H743/STM32H750 pin control" if COMPILE_TEST && !MACH_STM32H743 >>> depends on OF && HAS_IOMEM >>> default MACH_STM32H743 >>> select PINCTRL_STM32 >>> diff --git a/drivers/pinctrl/stm32/pinctrl-stm32h743.c b/drivers/pinctrl/stm32/pinctrl-stm32h743.c >>> index ffe7b5271506..700206c7bc11 100644 >>> --- a/drivers/pinctrl/stm32/pinctrl-stm32h743.c >>> +++ b/drivers/pinctrl/stm32/pinctrl-stm32h743.c >>> @@ -1966,6 +1966,9 @@ static const struct of_device_id stm32h743_pctrl_match[] = { >>> .compatible = "st,stm32h743-pinctrl", >>> .data = &stm32h743_match_data, >>> }, >>> + { .compatible = "st,stm32h750-pinctrl", >>> + .data = &stm32h743_match_data, >>> + }, >> >> If you use exactly the same driver (i.e. same ball out and AF mux) then >> you don't have to create a new compatible for that. Just use the same >> than h743.(so you don't have to factorize DT files). > Okay, yes they are the total same ball out and AF mux. I will delete > it in the next submission. > Just a kindly reminder , the newest version of this patchset is [PATCH v6]. Yes I'm late :) > > Thanks. >> >> Regards >> Alex >> >>> { } >>> }; >>> >>> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-03-29 21:53 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-12 6:24 [PATCH v2 0/8] ARM: STM32: add art-pi(stm32h750xbh6) board support dillon.minfei 2021-03-12 6:24 ` [PATCH v2 1/8] Documentation: arm: stm32: Add stm32h750 value line doc dillon.minfei 2021-03-12 6:24 ` [PATCH v2 2/8] dt-bindings: arm: stm32: Add compatible strings for ART-PI board dillon.minfei 2021-03-12 6:24 ` [PATCH v2 3/8] dt-bindings: pinctrl: stm32: Add stm32h750 pinctrl dillon.minfei 2021-03-12 6:24 ` [PATCH v2 4/8] ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750 dillon.minfei 2021-03-15 0:25 ` kernel test robot 2021-03-12 6:24 ` [PATCH v2 5/8] ARM: dts: stm32: add stm32h750-pinctrl.dtsi dillon.minfei 2021-03-12 6:24 ` [PATCH v2 6/8] ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6 dillon.minfei 2021-03-15 0:25 ` kernel test robot 2021-03-12 6:24 ` [PATCH v2 7/8] ARM: stm32: Add a new SOC - STM32H750 dillon.minfei 2021-03-12 6:24 ` [PATCH v2 8/8] pinctrl: stm32: Add STM32H750 MCU pinctrl support dillon.minfei 2021-03-29 8:00 ` Alexandre TORGUE 2021-03-29 8:07 ` dillon min 2021-03-29 10:13 ` Alexandre TORGUE
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