From: Jagan Teki <jagan@amarulasolutions.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: devicetree <devicetree@vger.kernel.org>,
David Airlie <airlied@linux.ie>, Chen-Yu Tsai <wens@csie.org>,
Maxime Ripard <mripard@kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-sunxi <linux-sunxi@googlegroups.com>,
dri-devel <dri-devel@lists.freedesktop.org>,
Daniel Vetter <daniel@ffwll.ch>,
Michael Trimarchi <michael@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [linux-sunxi] Re: [PATCH v11 1/7] drm/sun4i: dsi: Fix TCON DRQ set bits
Date: Thu, 3 Oct 2019 12:25:32 +0530 [thread overview]
Message-ID: <CAMty3ZDZBctSRcgfMTc3moTzrJZXL_S-tKKNKyOa4jUKT8rW+Q@mail.gmail.com> (raw)
In-Reply-To: <DB2FB6E5-E4B5-40F4-A05F-9A2303FCA1AE@aosc.io>
On Thu, Oct 3, 2019 at 12:21 PM Icenowy Zheng <icenowy@aosc.io> wrote:
>
>
>
> 于 2019年10月3日 GMT+08:00 下午2:45:21, Jagan Teki <jagan@amarulasolutions.com> 写到:
> >The LCD timing definitions between Linux DRM vs Allwinner are
> >different,
> >below diagram shows this clear differences.
> >
> > Active Front Sync Back
> > Region Porch Porch
> ><-----------------------><----------------><--------------><-------------->
> > //////////////////////|
> > ////////////////////// |
> >////////////////////// |..................
> >................
> > ________________
> ><----- [hv]display ----->
> ><------------- [hv]sync_start ------------>
> ><--------------------- [hv]sync_end ---------------------->
> ><-------------------------------- [hv]total
> >------------------------------>
> >
> ><----- lcd_[xy] --------> <- lcd_[hv]spw ->
> > <---------- lcd_[hv]bp --------->
> ><-------------------------------- lcd_[hv]t
> >------------------------------>
> >
> >The DSI driver misinterpreted the hbp term from the BSP code to refer
> >only to the backporch, when in fact it was backporch + sync. Thus the
> >driver incorrectly used the horizontal front porch plus sync in its
> >calculation of the DRQ set bit value, when it should not have included
> >the sync timing.
> >
> >Including additional sync timings leads to flip_done timed out as:
>
> I don't think attaching this error infomation is useful at all.
Since the error would be common irrespective of panels and it would
trigger from dsi controller, I thought this would be useful for
reference. I have had this conversation in previous version changes,
so I have added it. let me know if have any comments.
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next prev parent reply other threads:[~2019-10-03 6:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-03 6:45 [PATCH v11 0/7] drm/sun4i: dsi: Fixes/updates (A33 reworked!) Jagan Teki
2019-10-03 6:45 ` [PATCH v11 1/7] drm/sun4i: dsi: Fix TCON DRQ set bits Jagan Teki
2019-10-03 6:51 ` Icenowy Zheng
2019-10-03 6:55 ` Jagan Teki [this message]
2019-10-03 13:17 ` Maxime Ripard
2019-10-03 15:16 ` Jagan Teki
2019-10-07 11:19 ` Maxime Ripard
2019-10-03 6:45 ` [PATCH v11 2/7] drm/sun4i: dsi: Update start value in video start delay Jagan Teki
2019-10-03 6:52 ` Icenowy Zheng
2019-10-03 6:45 ` [PATCH v11 3/7] drm/sun4i: dsi: Fix video start delay computation Jagan Teki
2019-10-03 6:45 ` [PATCH v11 4/7] dt-bindings: sun6i-dsi: Add VCC-DSI supply property Jagan Teki
2019-10-03 11:47 ` Maxime Ripard
2019-10-03 13:04 ` Icenowy Zheng
2019-10-03 13:30 ` Maxime Ripard
2019-10-03 6:45 ` [PATCH v11 5/7] drm/sun4i: sun6i_mipi_dsi: Add VCC-DSI regulator support Jagan Teki
2019-10-03 6:55 ` Chen-Yu Tsai
2019-10-03 7:01 ` Jagan Teki
2019-10-03 11:46 ` Maxime Ripard
2019-10-03 6:45 ` [PATCH v11 6/7] drm/panel: Add Bananapi S070WV20-CT16 ICN6211 MIPI-DSI to RGB bridge Jagan Teki
2019-10-03 6:50 ` Jagan Teki
2019-10-03 6:45 ` [PATCH v11 7/7] ARM: dts: sun8i: bananapi-m2m: Enable Bananapi S070WV20-CT16 DSI panel Jagan Teki
2019-10-03 6:50 ` Jagan Teki
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