[PATCH V2 1/2] arm64: dts: freescale: imx8qxp: add cpu opp table

[PATCH V2 1/2] arm64: dts: freescale: imx8qxp: add cpu opp table

[Anson Huang]

Add i.MX8QXP CPU opp table to support cpufreq.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
ChangeLog since V1:
	use operating-points-v2 for OPP table to better fit cpufreq-dt driver;
---
 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 4c3dd95..1e08387 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -34,6 +34,10 @@
 			reg = <0x0 0x0>;
 			enable-method = "psci";
 			next-level-cache = <&A35_L2>;
+			clocks = <&clk IMX_A35_CLK>;
+			clock-latency = <61036>;
+			#cooling-cells = <2>;
+			operating-points-v2 = <&a35_0_opp_table>;
 		};
 
 		A35_1: cpu@1 {
@@ -42,6 +46,7 @@
 			reg = <0x0 0x1>;
 			enable-method = "psci";
 			next-level-cache = <&A35_L2>;
+			operating-points-v2 = <&a35_0_opp_table>;
 		};
 
 		A35_2: cpu@2 {
@@ -50,6 +55,7 @@
 			reg = <0x0 0x2>;
 			enable-method = "psci";
 			next-level-cache = <&A35_L2>;
+			operating-points-v2 = <&a35_0_opp_table>;
 		};
 
 		A35_3: cpu@3 {
@@ -58,6 +64,7 @@
 			reg = <0x0 0x3>;
 			enable-method = "psci";
 			next-level-cache = <&A35_L2>;
+			operating-points-v2 = <&a35_0_opp_table>;
 		};
 
 		A35_L2: l2-cache0 {
@@ -65,6 +72,24 @@
 		};
 	};
 
+	a35_0_opp_table: opp-table {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-900000000 {
+			opp-hz = /bits/ 64 <900000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <150000>;
+		};
+
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1100000>;
+			clock-latency-ns = <150000>;
+			opp-suspend;
+		};
+	};
+
 	gic: interrupt-controller@51a00000 {
 		compatible = "arm,gic-v3";
 		reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */
-- 
2.7.4


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[PATCH V2 2/2] clk: imx: scu: add cpu frequency scaling support

[Anson Huang]

On NXP's i.MX SoCs with system controller inside, CPU frequency
scaling can ONLY be done by system controller firmware, and it
can ONLY be requested from secure mode, so Linux kernel has to
call ARM SMC to trap to ARM-Trusted-Firmware to request system
controller firmware to do CPU frequency scaling.

This patch adds i.MX system controller CPU frequency scaling support,
it reuses cpufreq-dt driver and implement the CPU frequency scaling
inside SCU clock driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
ChangeLog since V1:
	- reuse cpufreq-dt driver for CPU frequency scaling and implement the CPU
	  frequency scaling inside SCU clock driver.
---
 drivers/clk/imx/clk-scu.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/drivers/clk/imx/clk-scu.c b/drivers/clk/imx/clk-scu.c
index 7ccf7ed..65fb63c 100644
--- a/drivers/clk/imx/clk-scu.c
+++ b/drivers/clk/imx/clk-scu.c
@@ -4,14 +4,32 @@
  *   Dong Aisheng <aisheng.dong@nxp.com>
  */
 
+#include <linux/arm-smccc.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/slab.h>
 
 #include "clk-scu.h"
 
+#ifdef CONFIG_CPUFREQ_DT
+#define IMX_SIP_CPUFREQ			0xC2000001
+#define IMX_SIP_SET_CPUFREQ		0x00
+
 static struct imx_sc_ipc *ccm_ipc_handle;
 
+struct imx_sc_cpufreq {
+	const char *clk_name;
+	u32 cluster_id;
+};
+
+static const struct imx_sc_cpufreq imx_sc_cpufreq_data[] = {
+	{
+		.clk_name = "a35_clk",
+		.cluster_id = 0,
+	},
+};
+#endif
+
 /*
  * struct clk_scu - Description of one SCU clock
  * @hw: the common clk_hw
@@ -161,6 +179,35 @@ static int clk_scu_set_rate(struct clk_hw *hw, unsigned long rate,
 	struct imx_sc_msg_req_set_clock_rate msg;
 	struct imx_sc_rpc_msg *hdr = &msg.hdr;
 
+#ifdef CONFIG_CPUFREQ_DT
+	/* CPU clock can ONLY be done by TF-A */
+	if (clk->clk_type == IMX_SC_PM_CLK_CPU) {
+		struct arm_smccc_res res;
+		unsigned int cluster_id;
+		int i;
+
+		for (i = 0; i < ARRAY_SIZE(imx_sc_cpufreq_data); i++) {
+			if (!strcmp(clk_hw_get_name(hw),
+				imx_sc_cpufreq_data[i].clk_name)) {
+				cluster_id = imx_sc_cpufreq_data[i].cluster_id;
+				break;
+			}
+		}
+
+		/*
+		 * As some other clock types have same value as
+		 * IMX_SC_PM_CLK_CPU, so we need to double check
+		 * the clock being scaled is indeed CPU clock which
+		 * matches the table we define.
+		 */
+		if (i < ARRAY_SIZE(imx_sc_cpufreq_data)) {
+			arm_smccc_smc(IMX_SIP_CPUFREQ, IMX_SIP_SET_CPUFREQ,
+				cluster_id, rate, 0, 0, 0, 0, &res);
+			return 0;
+		}
+	}
+#endif
+
 	hdr->ver = IMX_SC_RPC_VERSION;
 	hdr->svc = IMX_SC_RPC_SVC_PM;
 	hdr->func = IMX_SC_PM_FUNC_SET_CLOCK_RATE;
-- 
2.7.4


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Re: [PATCH V2 2/2] clk: imx: scu: add cpu frequency scaling support

[Leonard Crestez]

On Wed, 2019-02-13 at 13:32 +0000, Anson Huang wrote:
> On NXP's i.MX SoCs with system controller inside, CPU frequency
> scaling can ONLY be done by system controller firmware, and it
> can ONLY be requested from secure mode, so Linux kernel has to
> call ARM SMC to trap to ARM-Trusted-Firmware to request system
> controller firmware to do CPU frequency scaling.

> +#ifdef CONFIG_CPUFREQ_DT
> +#define IMX_SIP_CPUFREQ			0xC2000001
> +#define IMX_SIP_SET_CPUFREQ		0x00
> +
>  static struct imx_sc_ipc *ccm_ipc_handle;

Without CONFIG_CPUFREQ_DT the ccm_ipc_handle won't be defined and build
will break.

But is there a good reason for ifdef? In general clock function are
compiled even if no driver is calling them.

> +#ifdef CONFIG_CPUFREQ_DT
> +	/* CPU clock can ONLY be done by TF-A */
> +	if (clk->clk_type == IMX_SC_PM_CLK_CPU) {
> +		struct arm_smccc_res res;
> +		unsigned int cluster_id;
> +		int i;
> +
> +		for (i = 0; i < ARRAY_SIZE(imx_sc_cpufreq_data); i++) {
> +			if (!strcmp(clk_hw_get_name(hw),
> +				imx_sc_cpufreq_data[i].clk_name)) {
> +				cluster_id = imx_sc_cpufreq_data[i].cluster_id;
> +				break;
> +			}
> +		}
> +
> +		/*
> +		 * As some other clock types have same value as
> +		 * IMX_SC_PM_CLK_CPU, so we need to double check
> +		 * the clock being scaled is indeed CPU clock which
> +		 * matches the table we define.
> +		 */
> +		if (i < ARRAY_SIZE(imx_sc_cpufreq_data)) {
> +			arm_smccc_smc(IMX_SIP_CPUFREQ, IMX_SIP_SET_CPUFREQ,
> +				cluster_id, rate, 0, 0, 0, 0, &res);
> +			return 0;
> +		}
> +	}
> +#endif

The code inside the ifdef would look better in a separate
imx_clk_atf_set_rate function. Maybe even separate clk_ops?

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RE: [PATCH V2 2/2] clk: imx: scu: add cpu frequency scaling support

[Anson Huang]

Best Regards!
Anson Huang

> -----Original Message-----
> From: Leonard Crestez
> Sent: 2019年2月13日 21:53
> To: Anson Huang <anson.huang@nxp.com>
> Cc: dl-linux-imx <linux-imx@nxp.com>; robh+dt@kernel.org;
> mark.rutland@arm.com; shawnguo@kernel.org; s.hauer@pengutronix.de;
> kernel@pengutronix.de; festevam@gmail.com; mturquette@baylibre.com;
> sboyd@kernel.org; Aisheng Dong <aisheng.dong@nxp.com>; Daniel Baluta
> <daniel.baluta@nxp.com>; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> clk@vger.kernel.org; viresh.kumar@linaro.org
> Subject: Re: [PATCH V2 2/2] clk: imx: scu: add cpu frequency scaling support
> 
> On Wed, 2019-02-13 at 13:32 +0000, Anson Huang wrote:
> > On NXP's i.MX SoCs with system controller inside, CPU frequency
> > scaling can ONLY be done by system controller firmware, and it can
> > ONLY be requested from secure mode, so Linux kernel has to call ARM
> > SMC to trap to ARM-Trusted-Firmware to request system controller
> > firmware to do CPU frequency scaling.
> 
> > +#ifdef CONFIG_CPUFREQ_DT
> > +#define IMX_SIP_CPUFREQ			0xC2000001
> > +#define IMX_SIP_SET_CPUFREQ		0x00
> > +
> >  static struct imx_sc_ipc *ccm_ipc_handle;
> 
> Without CONFIG_CPUFREQ_DT the ccm_ipc_handle won't be defined and
> build will break.
> 
> But is there a good reason for ifdef? In general clock function are compiled
> even if no driver is calling them.

Oops, this is my mistake to put the ccm_ipc_handle inside the ifdef. Adding
Ifdef is just to save some code if CPUFREQ_DT is NOT defined, but I can remove
it in next version.

> 
> > +#ifdef CONFIG_CPUFREQ_DT
> > +	/* CPU clock can ONLY be done by TF-A */
> > +	if (clk->clk_type == IMX_SC_PM_CLK_CPU) {
> > +		struct arm_smccc_res res;
> > +		unsigned int cluster_id;
> > +		int i;
> > +
> > +		for (i = 0; i < ARRAY_SIZE(imx_sc_cpufreq_data); i++) {
> > +			if (!strcmp(clk_hw_get_name(hw),
> > +				imx_sc_cpufreq_data[i].clk_name)) {
> > +				cluster_id =
> imx_sc_cpufreq_data[i].cluster_id;
> > +				break;
> > +			}
> > +		}
> > +
> > +		/*
> > +		 * As some other clock types have same value as
> > +		 * IMX_SC_PM_CLK_CPU, so we need to double check
> > +		 * the clock being scaled is indeed CPU clock which
> > +		 * matches the table we define.
> > +		 */
> > +		if (i < ARRAY_SIZE(imx_sc_cpufreq_data)) {
> > +			arm_smccc_smc(IMX_SIP_CPUFREQ,
> IMX_SIP_SET_CPUFREQ,
> > +				cluster_id, rate, 0, 0, 0, 0, &res);
> > +			return 0;
> > +		}
> > +	}
> > +#endif
> 
> The code inside the ifdef would look better in a separate
> imx_clk_atf_set_rate function. Maybe even separate clk_ops?
I can add a separate function for CPU clock scaling, adding new clk_ops
changes too much, using a separate function should be good for now?

Thanks.
Anson. 
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