* [PATCH 4/5] arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REF
2019-07-03 7:23 [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus jun.li
@ 2019-07-03 7:23 ` jun.li
2019-07-03 7:23 ` [PATCH 5/5] arm64: dts: imx8mm-evk: enable usb1 and typec support jun.li
2019-07-22 3:34 ` [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: jun.li @ 2019-07-03 7:23 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, Peter.Chen, peng.fan, ping.bai, Anson.Huang,
devicetree, daniel.baluta, mturquette, linux-clk, linux-imx,
kernel, aisheng.dong, leonard.crestez, festevam, s.hauer,
linux-arm-kernel, jun.li
From: Li Jun <jun.li@nxp.com>
Since IMX8MM_CLK_USB_CORE_REF is not used at all, so remove the setting
for it.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 232a741..5d691a5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -743,10 +743,8 @@
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
clock-names = "usb1_ctrl_root_clk";
- assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>,
- <&clk IMX8MM_CLK_USB_CORE_REF>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>,
- <&clk IMX8MM_SYS_PLL1_100M>;
+ assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
fsl,usbphy = <&usbphynop1>;
fsl,usbmisc = <&usbmisc1 0>;
status = "disabled";
@@ -764,10 +762,8 @@
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>;
clock-names = "usb1_ctrl_root_clk";
- assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>,
- <&clk IMX8MM_CLK_USB_CORE_REF>;
- assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>,
- <&clk IMX8MM_SYS_PLL1_100M>;
+ assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>;
fsl,usbphy = <&usbphynop2>;
fsl,usbmisc = <&usbmisc2 0>;
status = "disabled";
--
2.7.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 5/5] arm64: dts: imx8mm-evk: enable usb1 and typec support
2019-07-03 7:23 [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus jun.li
2019-07-03 7:23 ` [PATCH 4/5] arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REF jun.li
@ 2019-07-03 7:23 ` jun.li
2019-07-22 3:34 ` [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus Shawn Guo
2 siblings, 0 replies; 5+ messages in thread
From: jun.li @ 2019-07-03 7:23 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, Peter.Chen, peng.fan, ping.bai, Anson.Huang,
devicetree, daniel.baluta, mturquette, linux-clk, linux-imx,
kernel, aisheng.dong, leonard.crestez, festevam, s.hauer,
linux-arm-kernel, jun.li
From: Li Jun <jun.li@nxp.com>
USB1 port has typec connector with power delivery support:
- Dual data role: host and device.
- Dual power role: source and sink, prefer power sink.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 65 ++++++++++++++++++++++++++++
1 file changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index ee7f2b2..fcfee8b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
@@ -5,6 +5,7 @@
/dts-v1/;
+#include <dt-bindings/usb/pd.h>
#include "imx8mm.dtsi"
/ {
@@ -115,6 +116,21 @@
status = "okay";
};
+&usbotg1 {
+ dr_mode = "otg";
+ hnp-disable;
+ srp-disable;
+ adp-disable;
+ usb-role-switch;
+ status = "okay";
+
+ port {
+ usb1_drd_sw: endpoint {
+ remote-endpoint = <&typec1_dr_sw>;
+ };
+ };
+};
+
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
@@ -257,6 +273,42 @@
};
};
+&i2c2 {
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ ptn5110: tcpc@50 {
+ compatible = "nxp,ptn5110";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_typec1>;
+ reg = <0x50>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <11 8>;
+ status = "okay";
+
+ port {
+ typec1_dr_sw: endpoint {
+ remote-endpoint = <&usb1_drd_sw>;
+ };
+ };
+
+ typec1_con: connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ power-role = "dual";
+ data-role = "dual";
+ try-power-role = "sink";
+ source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
+ sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
+ PDO_VAR(5000, 20000, 3000)>;
+ op-sink-microwatt = <15000000>;
+ self-powered;
+ };
+ };
+};
+
&iomuxc {
pinctrl-names = "default";
@@ -299,6 +351,13 @@
>;
};
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
+ >;
+ };
+
pinctrl_pmic: pmicirq {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41
@@ -320,6 +379,12 @@
>;
};
+ pinctrl_typec1: typec1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
--
2.7.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus
2019-07-03 7:23 [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus jun.li
2019-07-03 7:23 ` [PATCH 4/5] arm64: dts: imx8mm: Remove setting for IMX8MM_CLK_USB_CORE_REF jun.li
2019-07-03 7:23 ` [PATCH 5/5] arm64: dts: imx8mm-evk: enable usb1 and typec support jun.li
@ 2019-07-22 3:34 ` Shawn Guo
2019-07-24 11:09 ` Jun Li
2 siblings, 1 reply; 5+ messages in thread
From: Shawn Guo @ 2019-07-22 3:34 UTC (permalink / raw)
To: jun.li
Cc: mark.rutland, Peter.Chen, peng.fan, ping.bai, Anson.Huang,
devicetree, sboyd, daniel.baluta, s.hauer, linux-clk, robh+dt,
linux-imx, kernel, aisheng.dong, leonard.crestez, festevam,
mturquette, linux-arm-kernel
On Wed, Jul 03, 2019 at 03:23:25PM +0800, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk
> should be usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
I only received 3 patches as a series. In that case, the patches should
have subject prefix like '[PATCH 1/3]' ...
The patches look good to me. Applied all 3, thanks.
Shawn
> ---
> drivers/clk/imx/clk-imx8mm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 6b8e75d..735cf9d 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node)
> clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
> clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
> clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
> - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
> + clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
> clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk", "gpu3d_div", base + 0x44f0, 0);
> clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
> clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk", "usdhc2", base + 0x4520, 0);
> --
> 2.7.4
>
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^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus
2019-07-22 3:34 ` [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus Shawn Guo
@ 2019-07-24 11:09 ` Jun Li
0 siblings, 0 replies; 5+ messages in thread
From: Jun Li @ 2019-07-24 11:09 UTC (permalink / raw)
To: Shawn Guo
Cc: mark.rutland, Peter Chen, Peng Fan, Jacky Bai, Anson Huang,
devicetree, sboyd, Daniel Baluta, s.hauer, linux-clk, robh+dt,
dl-linux-imx, kernel, Aisheng Dong, Leonard Crestez, festevam,
mturquette, linux-arm-kernel
> -----Original Message-----
> From: Shawn Guo <shawnguo@kernel.org>
> Sent: 2019年7月22日 11:34
> To: Jun Li <jun.li@nxp.com>
> Cc: sboyd@kernel.org; robh+dt@kernel.org; mark.rutland@arm.com;
> s.hauer@pengutronix.de; kernel@pengutronix.de; festevam@gmail.com; dl-linux-imx
> <linux-imx@nxp.com>; mturquette@baylibre.com; Peter Chen <peter.chen@nxp.com>;
> Jacky Bai <ping.bai@nxp.com>; Leonard Crestez <leonard.crestez@nxp.com>; Daniel
> Baluta <daniel.baluta@nxp.com>; Anson Huang <anson.huang@nxp.com>; Aisheng
> Dong <aisheng.dong@nxp.com>; Peng Fan <peng.fan@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-clk@vger.kernel.org
> Subject: Re: [PATCH 3/5] clk: imx8mm: correct the usb1_ctrl parent to be usb_bus
>
> On Wed, Jul 03, 2019 at 03:23:25PM +0800, jun.li@nxp.com wrote:
> > From: Li Jun <jun.li@nxp.com>
> >
> > Per latest imx8mm datasheet of CCM, the parent of usb1_ctrl_root_clk
> > should be usb_bus.
> >
> > Signed-off-by: Li Jun <jun.li@nxp.com>
>
> I only received 3 patches as a series. In that case, the patches should have subject prefix
> like '[PATCH 1/3]' ...
Another 2 patches are for driver, so I didn't send them to you, yes, I should use
the subject prefix like '[PATCH 1/3]' to avoid confusing, will pay attention this.
Thanks
Li Jun
>
> The patches look good to me. Applied all 3, thanks.
>
> Shawn
>
> > ---
> > drivers/clk/imx/clk-imx8mm.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/imx/clk-imx8mm.c
> > b/drivers/clk/imx/clk-imx8mm.c index 6b8e75d..735cf9d 100644
> > --- a/drivers/clk/imx/clk-imx8mm.c
> > +++ b/drivers/clk/imx/clk-imx8mm.c
> > @@ -631,7 +631,7 @@ static int __init imx8mm_clocks_init(struct device_node
> *ccm_node)
> > clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2",
> base + 0x44a0, 0);
> > clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3",
> base + 0x44b0, 0);
> > clks[IMX8MM_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4",
> base + 0x44c0, 0);
> > - clks[IMX8MM_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk",
> "usb_core_ref", base + 0x44d0, 0);
> > + clks[IMX8MM_CLK_USB1_CTRL_ROOT] =
> > +imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
> > clks[IMX8MM_CLK_GPU3D_ROOT] = imx_clk_gate4("gpu3d_root_clk",
> "gpu3d_div", base + 0x44f0, 0);
> > clks[IMX8MM_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk",
> "usdhc1", base + 0x4510, 0);
> > clks[IMX8MM_CLK_USDHC2_ROOT] = imx_clk_gate4("usdhc2_root_clk",
> > "usdhc2", base + 0x4520, 0);
> > --
> > 2.7.4
> >
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^ permalink raw reply [flat|nested] 5+ messages in thread