* Re: [RFC net-next 0/2] split phylink PCS operations and add PCS support for dpaa2
[not found] <20200317144944.GP25745@shell.armlinux.org.uk>
@ 2020-03-26 14:57 ` Russell King - ARM Linux admin
2020-03-26 15:04 ` Andrew Lunn
[not found] ` <E1jEDaS-0008JO-Po@rmk-PC.armlinux.org.uk>
1 sibling, 1 reply; 5+ messages in thread
From: Russell King - ARM Linux admin @ 2020-03-26 14:57 UTC (permalink / raw)
To: Andrew Lunn, Florian Fainelli, Heiner Kallweit
Cc: Mark Rutland, devicetree, netdev, Li Yang, Rob Herring,
Ioana Ciornei, Shawn Guo, David S. Miller, linux-arm-kernel
Hi,
Was there any conclusion on this 5 patch series, and whether I should
submit it for net-next?
The discussion around patch 2 seems to have tailed off, and no one
seems to have replied to patches 3 to 5.
Thanks.
On Tue, Mar 17, 2020 at 02:49:44PM +0000, Russell King - ARM Linux admin wrote:
> This series splits the phylink_mac_ops structure so that PCS can be
> supported separately with their own PCS operations, and illustrates
> the use of the helpers in the previous patch series (net: add phylink
> support for PCS) in the DPAA2 driver.
>
> This is prototype code, not intended to be merged yet, and is merely
> being sent for illustrative purposes only.
>
> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 144 +++++++++++++++
> drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 226 ++++++++++++++++++++++-
> drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h | 1 +
> drivers/net/phy/phylink.c | 102 ++++++----
> include/linux/phylink.h | 11 ++
> 5 files changed, 446 insertions(+), 38 deletions(-)
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RFC net-next 0/2] split phylink PCS operations and add PCS support for dpaa2
2020-03-26 14:57 ` [RFC net-next 0/2] split phylink PCS operations and add PCS support for dpaa2 Russell King - ARM Linux admin
@ 2020-03-26 15:04 ` Andrew Lunn
0 siblings, 0 replies; 5+ messages in thread
From: Andrew Lunn @ 2020-03-26 15:04 UTC (permalink / raw)
To: Russell King - ARM Linux admin
Cc: Mark Rutland, devicetree, Florian Fainelli, netdev, Li Yang,
Rob Herring, Ioana Ciornei, Shawn Guo, David S. Miller,
linux-arm-kernel, Heiner Kallweit
On Thu, Mar 26, 2020 at 02:57:50PM +0000, Russell King - ARM Linux admin wrote:
> Hi,
>
> Was there any conclusion on this 5 patch series, and whether I should
> submit it for net-next?
Hi Russell
The basic idea seems sound. So i suggest re-submitting without the RFC
tag, and let people comment on it again.
Andrew
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^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
[not found] ` <E1jEDaS-0008JO-Po@rmk-PC.armlinux.org.uk>
@ 2020-03-26 21:14 ` Ioana Ciornei
2020-03-26 21:21 ` Russell King - ARM Linux admin
0 siblings, 1 reply; 5+ messages in thread
From: Ioana Ciornei @ 2020-03-26 21:14 UTC (permalink / raw)
To: Russell King, Andrew Lunn, Florian Fainelli, Heiner Kallweit
Cc: Mark Rutland, devicetree, netdev, Leo Li, Rob Herring, Shawn Guo,
David S. Miller, linux-arm-kernel
> Subject: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
>
> *NOT FOR MERGING*
>
> Add PCS MDIO nodes for the LX2160A, which will be used when the MAC is in
> PHY mode and is using in-band negotiation.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
> .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 144 ++++++++++++++++++
> 1 file changed, 144 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index e5ee5591e52b..732af33eec18 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -960,6 +960,132 @@
> status = "disabled";
> };
>
> + pcs_mdio1: mdio@8c07000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c07000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
Are the PCS MDIO buses shareable? I am asking this because in case of QSGMII our structure is a little bit quirky.
There are 4 MACs but all PCSs sit on the first MACs internal MDIO bus only. The other 3 internal MDIO buses are empty.
> +
> + pcs_mdio2: mdio@8c0b000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c0b000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio3: mdio@8c0f000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c0f000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio4: mdio@8c13000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c13000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio5: mdio@8c17000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c17000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio6: mdio@8c1b000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c1b000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio7: mdio@8c1f000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c1f000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio8: mdio@8c23000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c23000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio9: mdio@8c27000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c27000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio10: mdio@8c2b000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c2b000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio11: mdio@8c2f000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c2f000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio12: mdio@8c33000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c33000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio13: mdio@8c37000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c37000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio14: mdio@8c3b000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c3b000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio15: mdio@8c3f000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c3f000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio16: mdio@8c43000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c43000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio17: mdio@8c47000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c47000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
> + pcs_mdio18: mdio@8c4b000 {
> + compatible = "fsl,fman-memac-mdio";
> + reg = <0x0 0x8c4b000 0x0 0x1000>;
> + little-endian;
> + status = "disabled";
> + };
> +
Please sort the nodes alphabetically.
> fsl_mc: fsl-mc@80c000000 {
> compatible = "fsl,qoriq-mc";
> reg = <0x00000008 0x0c000000 0 0x40>, @@ -988,91
> +1114,109 @@
> dpmac1: dpmac@1 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x1>;
> + pcs-mdio = <&pcs_mdio1>;
> };
>
> dpmac2: dpmac@2 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x2>;
> + pcs-mdio = <&pcs_mdio2>;
> };
>
> dpmac3: dpmac@3 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x3>;
> + pcs-mdio = <&pcs_mdio3>;
> };
>
> dpmac4: dpmac@4 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x4>;
> + pcs-mdio = <&pcs_mdio4>;
> };
>
> dpmac5: dpmac@5 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x5>;
> + pcs-mdio = <&pcs_mdio5>;
> };
>
> dpmac6: dpmac@6 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x6>;
> + pcs-mdio = <&pcs_mdio6>;
> };
>
> dpmac7: dpmac@7 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x7>;
> + pcs-mdio = <&pcs_mdio7>;
> };
>
> dpmac8: dpmac@8 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x8>;
> + pcs-mdio = <&pcs_mdio8>;
> };
>
> dpmac9: dpmac@9 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x9>;
> + pcs-mdio = <&pcs_mdio9>;
> };
>
> dpmac10: dpmac@a {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xa>;
> + pcs-mdio = <&pcs_mdio10>;
> };
>
> dpmac11: dpmac@b {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xb>;
> + pcs-mdio = <&pcs_mdio11>;
> };
>
> dpmac12: dpmac@c {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xc>;
> + pcs-mdio = <&pcs_mdio12>;
> };
>
> dpmac13: dpmac@d {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xd>;
> + pcs-mdio = <&pcs_mdio13>;
> };
>
> dpmac14: dpmac@e {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xe>;
> + pcs-mdio = <&pcs_mdio14>;
> };
>
> dpmac15: dpmac@f {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0xf>;
> + pcs-mdio = <&pcs_mdio15>;
> };
>
> dpmac16: dpmac@10 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x10>;
> + pcs-mdio = <&pcs_mdio16>;
> };
>
> dpmac17: dpmac@11 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x11>;
> + pcs-mdio = <&pcs_mdio17>;
> };
>
> dpmac18: dpmac@12 {
> compatible = "fsl,qoriq-mc-dpmac";
> reg = <0x12>;
> + pcs-mdio = <&pcs_mdio18>;
> };
> };
> };
> --
> 2.20.1
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
2020-03-26 21:14 ` [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes Ioana Ciornei
@ 2020-03-26 21:21 ` Russell King - ARM Linux admin
2020-03-26 21:26 ` Ioana Ciornei
0 siblings, 1 reply; 5+ messages in thread
From: Russell King - ARM Linux admin @ 2020-03-26 21:21 UTC (permalink / raw)
To: Ioana Ciornei
Cc: Mark Rutland, Andrew Lunn, Florian Fainelli, devicetree, netdev,
Leo Li, Rob Herring, Shawn Guo, David S. Miller,
linux-arm-kernel, Heiner Kallweit
On Thu, Mar 26, 2020 at 09:14:13PM +0000, Ioana Ciornei wrote:
> > Subject: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
> >
> > *NOT FOR MERGING*
> >
> > Add PCS MDIO nodes for the LX2160A, which will be used when the MAC is in
> > PHY mode and is using in-band negotiation.
> >
> > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> > ---
> > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 144 ++++++++++++++++++
> > 1 file changed, 144 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > index e5ee5591e52b..732af33eec18 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > @@ -960,6 +960,132 @@
> > status = "disabled";
> > };
> >
> > + pcs_mdio1: mdio@8c07000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c07000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
>
> Are the PCS MDIO buses shareable? I am asking this because in case of QSGMII our structure is a little bit quirky.
> There are 4 MACs but all PCSs sit on the first MACs internal MDIO bus only. The other 3 internal MDIO buses are empty.
I haven't looked at QSGMII yet, I've only considered single-lane setups
and only implemented that. For _this_ part, it doesn't matter as this
is just declaring where the hardware is. I think that matters more for
the dpmac nodes.
> > +
> > + pcs_mdio2: mdio@8c0b000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c0b000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio3: mdio@8c0f000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c0f000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio4: mdio@8c13000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c13000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio5: mdio@8c17000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c17000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio6: mdio@8c1b000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c1b000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio7: mdio@8c1f000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c1f000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio8: mdio@8c23000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c23000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio9: mdio@8c27000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c27000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio10: mdio@8c2b000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c2b000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio11: mdio@8c2f000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c2f000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio12: mdio@8c33000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c33000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio13: mdio@8c37000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c37000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio14: mdio@8c3b000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c3b000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio15: mdio@8c3f000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c3f000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio16: mdio@8c43000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c43000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio17: mdio@8c47000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c47000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
> > + pcs_mdio18: mdio@8c4b000 {
> > + compatible = "fsl,fman-memac-mdio";
> > + reg = <0x0 0x8c4b000 0x0 0x1000>;
> > + little-endian;
> > + status = "disabled";
> > + };
> > +
>
> Please sort the nodes alphabetically.
Huh? The nodes in this file are already sorted according to address,
and this patch preserves that sorting. The hex address field also
happens to be alphabetical.
Or do you mean the label for these modes - I've never heard of sorting
by label for a SoC file.
> > fsl_mc: fsl-mc@80c000000 {
> > compatible = "fsl,qoriq-mc";
> > reg = <0x00000008 0x0c000000 0 0x40>, @@ -988,91
> > +1114,109 @@
> > dpmac1: dpmac@1 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x1>;
> > + pcs-mdio = <&pcs_mdio1>;
> > };
> >
> > dpmac2: dpmac@2 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x2>;
> > + pcs-mdio = <&pcs_mdio2>;
> > };
> >
> > dpmac3: dpmac@3 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x3>;
> > + pcs-mdio = <&pcs_mdio3>;
> > };
> >
> > dpmac4: dpmac@4 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x4>;
> > + pcs-mdio = <&pcs_mdio4>;
> > };
> >
> > dpmac5: dpmac@5 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x5>;
> > + pcs-mdio = <&pcs_mdio5>;
> > };
> >
> > dpmac6: dpmac@6 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x6>;
> > + pcs-mdio = <&pcs_mdio6>;
> > };
> >
> > dpmac7: dpmac@7 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x7>;
> > + pcs-mdio = <&pcs_mdio7>;
> > };
> >
> > dpmac8: dpmac@8 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x8>;
> > + pcs-mdio = <&pcs_mdio8>;
> > };
> >
> > dpmac9: dpmac@9 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x9>;
> > + pcs-mdio = <&pcs_mdio9>;
> > };
> >
> > dpmac10: dpmac@a {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xa>;
> > + pcs-mdio = <&pcs_mdio10>;
> > };
> >
> > dpmac11: dpmac@b {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xb>;
> > + pcs-mdio = <&pcs_mdio11>;
> > };
> >
> > dpmac12: dpmac@c {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xc>;
> > + pcs-mdio = <&pcs_mdio12>;
> > };
> >
> > dpmac13: dpmac@d {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xd>;
> > + pcs-mdio = <&pcs_mdio13>;
> > };
> >
> > dpmac14: dpmac@e {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xe>;
> > + pcs-mdio = <&pcs_mdio14>;
> > };
> >
> > dpmac15: dpmac@f {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0xf>;
> > + pcs-mdio = <&pcs_mdio15>;
> > };
> >
> > dpmac16: dpmac@10 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x10>;
> > + pcs-mdio = <&pcs_mdio16>;
> > };
> >
> > dpmac17: dpmac@11 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x11>;
> > + pcs-mdio = <&pcs_mdio17>;
> > };
> >
> > dpmac18: dpmac@12 {
> > compatible = "fsl,qoriq-mc-dpmac";
> > reg = <0x12>;
> > + pcs-mdio = <&pcs_mdio18>;
> > };
> > };
> > };
> > --
> > 2.20.1
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
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^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
2020-03-26 21:21 ` Russell King - ARM Linux admin
@ 2020-03-26 21:26 ` Ioana Ciornei
0 siblings, 0 replies; 5+ messages in thread
From: Ioana Ciornei @ 2020-03-26 21:26 UTC (permalink / raw)
To: Russell King - ARM Linux admin
Cc: Mark Rutland, Andrew Lunn, Florian Fainelli, devicetree, netdev,
Leo Li, Rob Herring, Shawn Guo, David S. Miller,
linux-arm-kernel, Heiner Kallweit
> Subject: Re: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
>
> On Thu, Mar 26, 2020 at 09:14:13PM +0000, Ioana Ciornei wrote:
> > > Subject: [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes
> > >
> > > *NOT FOR MERGING*
> > >
> > > Add PCS MDIO nodes for the LX2160A, which will be used when the MAC
> > > is in PHY mode and is using in-band negotiation.
> > >
> > > Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> > > ---
> > > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 144
> > > ++++++++++++++++++
> > > 1 file changed, 144 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > index e5ee5591e52b..732af33eec18 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > > @@ -960,6 +960,132 @@
> > > status = "disabled";
> > > };
> > >
> > > + pcs_mdio1: mdio@8c07000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c07000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> >
> > Are the PCS MDIO buses shareable? I am asking this because in case of QSGMII
> our structure is a little bit quirky.
> > There are 4 MACs but all PCSs sit on the first MACs internal MDIO bus only. The
> other 3 internal MDIO buses are empty.
>
> I haven't looked at QSGMII yet, I've only considered single-lane setups and only
> implemented that. For _this_ part, it doesn't matter as this is just declaring
> where the hardware is. I think that matters more for the dpmac nodes.
Sorry for misplacing the comment.
I am going to take a look tomorrow and see how workable this approach is going to be in the long term since I have a board with QSGMII handy.
>
> > > +
> > > + pcs_mdio2: mdio@8c0b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c0b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio3: mdio@8c0f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c0f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio4: mdio@8c13000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c13000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio5: mdio@8c17000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c17000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio6: mdio@8c1b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c1b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio7: mdio@8c1f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c1f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio8: mdio@8c23000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c23000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio9: mdio@8c27000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c27000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio10: mdio@8c2b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c2b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio11: mdio@8c2f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c2f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio12: mdio@8c33000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c33000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio13: mdio@8c37000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c37000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio14: mdio@8c3b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c3b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio15: mdio@8c3f000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c3f000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio16: mdio@8c43000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c43000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio17: mdio@8c47000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c47000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> > > + pcs_mdio18: mdio@8c4b000 {
> > > + compatible = "fsl,fman-memac-mdio";
> > > + reg = <0x0 0x8c4b000 0x0 0x1000>;
> > > + little-endian;
> > > + status = "disabled";
> > > + };
> > > +
> >
> > Please sort the nodes alphabetically.
>
> Huh? The nodes in this file are already sorted according to address, and this
> patch preserves that sorting. The hex address field also happens to be
> alphabetical.
>
> Or do you mean the label for these modes - I've never heard of sorting by label
> for a SoC file.
Uhh, I remember now. For some reason I thought this was a board file.
Ioana
[snip]
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-03-26 14:57 ` [RFC net-next 0/2] split phylink PCS operations and add PCS support for dpaa2 Russell King - ARM Linux admin
2020-03-26 15:04 ` Andrew Lunn
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2020-03-26 21:14 ` [RFC net-next 3/5] arm64: dts: lx2160a: add PCS MDIO nodes Ioana Ciornei
2020-03-26 21:21 ` Russell King - ARM Linux admin
2020-03-26 21:26 ` Ioana Ciornei
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